1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/ioport.h>
28#include <linux/errno.h>
29#include <linux/firmware.h>
30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/major.h>
37#include <linux/string.h>
38#include <linux/fcntl.h>
39#include <linux/ptrace.h>
40#include <linux/serial.h>
41#include <linux/tty_driver.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/bitops.h>
46#include <linux/slab.h>
47#include <linux/ratelimit.h>
48
49#include <asm/io.h>
50#include <asm/uaccess.h>
51
52#include "moxa.h"
53
54#define MOXA_VERSION "6.0k"
55
56#define MOXA_FW_HDRLEN 32
57
58#define MOXAMAJOR 172
59
60#define MAX_BOARDS 4
61#define MAX_PORTS_PER_BOARD 32
62#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
63
64#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
65 (brd)->boardType == MOXA_BOARD_C320_PCI)
66
67
68
69
70#define MOXA_BUS_TYPE_ISA 0
71#define MOXA_BUS_TYPE_PCI 1
72
73enum {
74 MOXA_BOARD_C218_PCI = 1,
75 MOXA_BOARD_C218_ISA,
76 MOXA_BOARD_C320_PCI,
77 MOXA_BOARD_C320_ISA,
78 MOXA_BOARD_CP204J,
79};
80
81static char *moxa_brdname[] =
82{
83 "C218 Turbo PCI series",
84 "C218 Turbo ISA series",
85 "C320 Turbo PCI series",
86 "C320 Turbo ISA series",
87 "CP-204J series",
88};
89
90#ifdef CONFIG_PCI
91static struct pci_device_id moxa_pcibrds[] = {
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
93 .driver_data = MOXA_BOARD_C218_PCI },
94 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
95 .driver_data = MOXA_BOARD_C320_PCI },
96 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
97 .driver_data = MOXA_BOARD_CP204J },
98 { 0 }
99};
100MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
101#endif
102
103struct moxa_port;
104
105static struct moxa_board_conf {
106 int boardType;
107 int numPorts;
108 int busType;
109
110 unsigned int ready;
111
112 struct moxa_port *ports;
113
114 void __iomem *basemem;
115 void __iomem *intNdx;
116 void __iomem *intPend;
117 void __iomem *intTable;
118} moxa_boards[MAX_BOARDS];
119
120struct mxser_mstatus {
121 tcflag_t cflag;
122 int cts;
123 int dsr;
124 int ri;
125 int dcd;
126};
127
128struct moxaq_str {
129 int inq;
130 int outq;
131};
132
133struct moxa_port {
134 struct tty_port port;
135 struct moxa_board_conf *board;
136 void __iomem *tableAddr;
137
138 int type;
139 int cflag;
140 unsigned long statusflags;
141
142 u8 DCDState;
143 u8 lineCtrl;
144 u8 lowChkFlag;
145};
146
147struct mon_str {
148 int tick;
149 int rxcnt[MAX_PORTS];
150 int txcnt[MAX_PORTS];
151};
152
153
154#define TXSTOPPED 1
155#define LOWWAIT 2
156#define EMPTYWAIT 3
157
158
159#define WAKEUP_CHARS 256
160
161static int ttymajor = MOXAMAJOR;
162static struct mon_str moxaLog;
163static unsigned int moxaFuncTout = HZ / 2;
164static unsigned int moxaLowWaterChk;
165static DEFINE_MUTEX(moxa_openlock);
166static DEFINE_SPINLOCK(moxa_lock);
167
168static unsigned long baseaddr[MAX_BOARDS];
169static unsigned int type[MAX_BOARDS];
170static unsigned int numports[MAX_BOARDS];
171static struct tty_port moxa_service_port;
172
173MODULE_AUTHOR("William Chen");
174MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
175MODULE_LICENSE("GPL");
176MODULE_FIRMWARE("c218tunx.cod");
177MODULE_FIRMWARE("cp204unx.cod");
178MODULE_FIRMWARE("c320tunx.cod");
179
180module_param_array(type, uint, NULL, 0);
181MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
182module_param_array(baseaddr, ulong, NULL, 0);
183MODULE_PARM_DESC(baseaddr, "base address");
184module_param_array(numports, uint, NULL, 0);
185MODULE_PARM_DESC(numports, "numports (ignored for C218)");
186
187module_param(ttymajor, int, 0);
188
189
190
191
192static int moxa_open(struct tty_struct *, struct file *);
193static void moxa_close(struct tty_struct *, struct file *);
194static int moxa_write(struct tty_struct *, const unsigned char *, int);
195static int moxa_write_room(struct tty_struct *);
196static void moxa_flush_buffer(struct tty_struct *);
197static int moxa_chars_in_buffer(struct tty_struct *);
198static void moxa_set_termios(struct tty_struct *, struct ktermios *);
199static void moxa_stop(struct tty_struct *);
200static void moxa_start(struct tty_struct *);
201static void moxa_hangup(struct tty_struct *);
202static int moxa_tiocmget(struct tty_struct *tty);
203static int moxa_tiocmset(struct tty_struct *tty,
204 unsigned int set, unsigned int clear);
205static void moxa_poll(unsigned long);
206static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
207static void moxa_shutdown(struct tty_port *);
208static int moxa_carrier_raised(struct tty_port *);
209static void moxa_dtr_rts(struct tty_port *, int);
210
211
212
213static void MoxaPortEnable(struct moxa_port *);
214static void MoxaPortDisable(struct moxa_port *);
215static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
216static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
217static void MoxaPortLineCtrl(struct moxa_port *, int, int);
218static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
219static int MoxaPortLineStatus(struct moxa_port *);
220static void MoxaPortFlushData(struct moxa_port *, int);
221static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
222static int MoxaPortReadData(struct moxa_port *);
223static int MoxaPortTxQueue(struct moxa_port *);
224static int MoxaPortRxQueue(struct moxa_port *);
225static int MoxaPortTxFree(struct moxa_port *);
226static void MoxaPortTxDisable(struct moxa_port *);
227static void MoxaPortTxEnable(struct moxa_port *);
228static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
229static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
230static void MoxaSetFifo(struct moxa_port *port, int enable);
231
232
233
234
235
236static DEFINE_SPINLOCK(moxafunc_lock);
237
238static void moxa_wait_finish(void __iomem *ofsAddr)
239{
240 unsigned long end = jiffies + moxaFuncTout;
241
242 while (readw(ofsAddr + FuncCode) != 0)
243 if (time_after(jiffies, end))
244 return;
245 if (readw(ofsAddr + FuncCode) != 0)
246 printk_ratelimited(KERN_WARNING "moxa function expired\n");
247}
248
249static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
250{
251 unsigned long flags;
252 spin_lock_irqsave(&moxafunc_lock, flags);
253 writew(arg, ofsAddr + FuncArg);
254 writew(cmd, ofsAddr + FuncCode);
255 moxa_wait_finish(ofsAddr);
256 spin_unlock_irqrestore(&moxafunc_lock, flags);
257}
258
259static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
260{
261 unsigned long flags;
262 u16 ret;
263 spin_lock_irqsave(&moxafunc_lock, flags);
264 writew(arg, ofsAddr + FuncArg);
265 writew(cmd, ofsAddr + FuncCode);
266 moxa_wait_finish(ofsAddr);
267 ret = readw(ofsAddr + FuncArg);
268 spin_unlock_irqrestore(&moxafunc_lock, flags);
269 return ret;
270}
271
272static void moxa_low_water_check(void __iomem *ofsAddr)
273{
274 u16 rptr, wptr, mask, len;
275
276 if (readb(ofsAddr + FlagStat) & Xoff_state) {
277 rptr = readw(ofsAddr + RXrptr);
278 wptr = readw(ofsAddr + RXwptr);
279 mask = readw(ofsAddr + RX_mask);
280 len = (wptr - rptr) & mask;
281 if (len <= Low_water)
282 moxafunc(ofsAddr, FC_SendXon, 0);
283 }
284}
285
286
287
288
289
290static int moxa_ioctl(struct tty_struct *tty,
291 unsigned int cmd, unsigned long arg)
292{
293 struct moxa_port *ch = tty->driver_data;
294 void __user *argp = (void __user *)arg;
295 int status, ret = 0;
296
297 if (tty->index == MAX_PORTS) {
298 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
299 cmd != MOXA_GETMSTATUS)
300 return -EINVAL;
301 } else if (!ch)
302 return -ENODEV;
303
304 switch (cmd) {
305 case MOXA_GETDATACOUNT:
306 moxaLog.tick = jiffies;
307 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
308 ret = -EFAULT;
309 break;
310 case MOXA_FLUSH_QUEUE:
311 MoxaPortFlushData(ch, arg);
312 break;
313 case MOXA_GET_IOQUEUE: {
314 struct moxaq_str __user *argm = argp;
315 struct moxaq_str tmp;
316 struct moxa_port *p;
317 unsigned int i, j;
318
319 for (i = 0; i < MAX_BOARDS; i++) {
320 p = moxa_boards[i].ports;
321 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
322 memset(&tmp, 0, sizeof(tmp));
323 spin_lock_bh(&moxa_lock);
324 if (moxa_boards[i].ready) {
325 tmp.inq = MoxaPortRxQueue(p);
326 tmp.outq = MoxaPortTxQueue(p);
327 }
328 spin_unlock_bh(&moxa_lock);
329 if (copy_to_user(argm, &tmp, sizeof(tmp)))
330 return -EFAULT;
331 }
332 }
333 break;
334 } case MOXA_GET_OQUEUE:
335 status = MoxaPortTxQueue(ch);
336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
338 case MOXA_GET_IQUEUE:
339 status = MoxaPortRxQueue(ch);
340 ret = put_user(status, (unsigned long __user *)argp);
341 break;
342 case MOXA_GETMSTATUS: {
343 struct mxser_mstatus __user *argm = argp;
344 struct mxser_mstatus tmp;
345 struct moxa_port *p;
346 unsigned int i, j;
347
348 for (i = 0; i < MAX_BOARDS; i++) {
349 p = moxa_boards[i].ports;
350 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
351 struct tty_struct *ttyp;
352 memset(&tmp, 0, sizeof(tmp));
353 spin_lock_bh(&moxa_lock);
354 if (!moxa_boards[i].ready) {
355 spin_unlock_bh(&moxa_lock);
356 goto copy;
357 }
358
359 status = MoxaPortLineStatus(p);
360 spin_unlock_bh(&moxa_lock);
361
362 if (status & 1)
363 tmp.cts = 1;
364 if (status & 2)
365 tmp.dsr = 1;
366 if (status & 4)
367 tmp.dcd = 1;
368
369 ttyp = tty_port_tty_get(&p->port);
370 if (!ttyp)
371 tmp.cflag = p->cflag;
372 else
373 tmp.cflag = ttyp->termios.c_cflag;
374 tty_kref_put(ttyp);
375copy:
376 if (copy_to_user(argm, &tmp, sizeof(tmp)))
377 return -EFAULT;
378 }
379 }
380 break;
381 }
382 case TIOCGSERIAL:
383 mutex_lock(&ch->port.mutex);
384 ret = moxa_get_serial_info(ch, argp);
385 mutex_unlock(&ch->port.mutex);
386 break;
387 case TIOCSSERIAL:
388 mutex_lock(&ch->port.mutex);
389 ret = moxa_set_serial_info(ch, argp);
390 mutex_unlock(&ch->port.mutex);
391 break;
392 default:
393 ret = -ENOIOCTLCMD;
394 }
395 return ret;
396}
397
398static int moxa_break_ctl(struct tty_struct *tty, int state)
399{
400 struct moxa_port *port = tty->driver_data;
401
402 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
403 Magic_code);
404 return 0;
405}
406
407static const struct tty_operations moxa_ops = {
408 .open = moxa_open,
409 .close = moxa_close,
410 .write = moxa_write,
411 .write_room = moxa_write_room,
412 .flush_buffer = moxa_flush_buffer,
413 .chars_in_buffer = moxa_chars_in_buffer,
414 .ioctl = moxa_ioctl,
415 .set_termios = moxa_set_termios,
416 .stop = moxa_stop,
417 .start = moxa_start,
418 .hangup = moxa_hangup,
419 .break_ctl = moxa_break_ctl,
420 .tiocmget = moxa_tiocmget,
421 .tiocmset = moxa_tiocmset,
422};
423
424static const struct tty_port_operations moxa_port_ops = {
425 .carrier_raised = moxa_carrier_raised,
426 .dtr_rts = moxa_dtr_rts,
427 .shutdown = moxa_shutdown,
428};
429
430static struct tty_driver *moxaDriver;
431static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
432
433
434
435
436
437static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
438{
439 switch (brd->boardType) {
440 case MOXA_BOARD_C218_ISA:
441 case MOXA_BOARD_C218_PCI:
442 if (model != 1)
443 goto err;
444 break;
445 case MOXA_BOARD_CP204J:
446 if (model != 3)
447 goto err;
448 break;
449 default:
450 if (model != 2)
451 goto err;
452 break;
453 }
454 return 0;
455err:
456 return -EINVAL;
457}
458
459static int moxa_check_fw(const void *ptr)
460{
461 const __le16 *lptr = ptr;
462
463 if (*lptr != cpu_to_le16(0x7980))
464 return -EINVAL;
465
466 return 0;
467}
468
469static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
470 size_t len)
471{
472 void __iomem *baseAddr = brd->basemem;
473 u16 tmp;
474
475 writeb(HW_reset, baseAddr + Control_reg);
476 msleep(10);
477 memset_io(baseAddr, 0, 4096);
478 memcpy_toio(baseAddr, buf, len);
479 writeb(0, baseAddr + Control_reg);
480
481 msleep(2000);
482
483 switch (brd->boardType) {
484 case MOXA_BOARD_C218_ISA:
485 case MOXA_BOARD_C218_PCI:
486 tmp = readw(baseAddr + C218_key);
487 if (tmp != C218_KeyCode)
488 goto err;
489 break;
490 case MOXA_BOARD_CP204J:
491 tmp = readw(baseAddr + C218_key);
492 if (tmp != CP204J_KeyCode)
493 goto err;
494 break;
495 default:
496 tmp = readw(baseAddr + C320_key);
497 if (tmp != C320_KeyCode)
498 goto err;
499 tmp = readw(baseAddr + C320_status);
500 if (tmp != STS_init) {
501 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
502 "module not found\n");
503 return -EIO;
504 }
505 break;
506 }
507
508 return 0;
509err:
510 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
511 return -EIO;
512}
513
514static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
515 size_t len)
516{
517 void __iomem *baseAddr = brd->basemem;
518
519 if (len < 7168) {
520 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
521 return -EINVAL;
522 }
523
524 writew(len - 7168 - 2, baseAddr + C320bapi_len);
525 writeb(1, baseAddr + Control_reg);
526 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
527 writeb(2, baseAddr + Control_reg);
528 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
529
530 return 0;
531}
532
533static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
534 size_t len)
535{
536 void __iomem *baseAddr = brd->basemem;
537 const __le16 *uptr = ptr;
538 size_t wlen, len2, j;
539 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
540 unsigned int i, retry;
541 u16 usum, keycode;
542
543 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
544 C218_KeyCode;
545
546 switch (brd->boardType) {
547 case MOXA_BOARD_CP204J:
548 case MOXA_BOARD_C218_ISA:
549 case MOXA_BOARD_C218_PCI:
550 key = C218_key;
551 loadbuf = C218_LoadBuf;
552 loadlen = C218DLoad_len;
553 checksum = C218check_sum;
554 checksum_ok = C218chksum_ok;
555 break;
556 default:
557 key = C320_key;
558 keycode = C320_KeyCode;
559 loadbuf = C320_LoadBuf;
560 loadlen = C320DLoad_len;
561 checksum = C320check_sum;
562 checksum_ok = C320chksum_ok;
563 break;
564 }
565
566 usum = 0;
567 wlen = len >> 1;
568 for (i = 0; i < wlen; i++)
569 usum += le16_to_cpu(uptr[i]);
570 retry = 0;
571 do {
572 wlen = len >> 1;
573 j = 0;
574 while (wlen) {
575 len2 = (wlen > 2048) ? 2048 : wlen;
576 wlen -= len2;
577 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
578 j += len2 << 1;
579
580 writew(len2, baseAddr + loadlen);
581 writew(0, baseAddr + key);
582 for (i = 0; i < 100; i++) {
583 if (readw(baseAddr + key) == keycode)
584 break;
585 msleep(10);
586 }
587 if (readw(baseAddr + key) != keycode)
588 return -EIO;
589 }
590 writew(0, baseAddr + loadlen);
591 writew(usum, baseAddr + checksum);
592 writew(0, baseAddr + key);
593 for (i = 0; i < 100; i++) {
594 if (readw(baseAddr + key) == keycode)
595 break;
596 msleep(10);
597 }
598 retry++;
599 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
600 if (readb(baseAddr + checksum_ok) != 1)
601 return -EIO;
602
603 writew(0, baseAddr + key);
604 for (i = 0; i < 600; i++) {
605 if (readw(baseAddr + Magic_no) == Magic_code)
606 break;
607 msleep(10);
608 }
609 if (readw(baseAddr + Magic_no) != Magic_code)
610 return -EIO;
611
612 if (MOXA_IS_320(brd)) {
613 if (brd->busType == MOXA_BUS_TYPE_PCI) {
614 writew(0x3800, baseAddr + TMS320_PORT1);
615 writew(0x3900, baseAddr + TMS320_PORT2);
616 writew(28499, baseAddr + TMS320_CLOCK);
617 } else {
618 writew(0x3200, baseAddr + TMS320_PORT1);
619 writew(0x3400, baseAddr + TMS320_PORT2);
620 writew(19999, baseAddr + TMS320_CLOCK);
621 }
622 }
623 writew(1, baseAddr + Disable_IRQ);
624 writew(0, baseAddr + Magic_no);
625 for (i = 0; i < 500; i++) {
626 if (readw(baseAddr + Magic_no) == Magic_code)
627 break;
628 msleep(10);
629 }
630 if (readw(baseAddr + Magic_no) != Magic_code)
631 return -EIO;
632
633 if (MOXA_IS_320(brd)) {
634 j = readw(baseAddr + Module_cnt);
635 if (j <= 0)
636 return -EIO;
637 brd->numPorts = j * 8;
638 writew(j, baseAddr + Module_no);
639 writew(0, baseAddr + Magic_no);
640 for (i = 0; i < 600; i++) {
641 if (readw(baseAddr + Magic_no) == Magic_code)
642 break;
643 msleep(10);
644 }
645 if (readw(baseAddr + Magic_no) != Magic_code)
646 return -EIO;
647 }
648 brd->intNdx = baseAddr + IRQindex;
649 brd->intPend = baseAddr + IRQpending;
650 brd->intTable = baseAddr + IRQtable;
651
652 return 0;
653}
654
655static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
656 size_t len)
657{
658 void __iomem *ofsAddr, *baseAddr = brd->basemem;
659 struct moxa_port *port;
660 int retval, i;
661
662 if (len % 2) {
663 printk(KERN_ERR "MOXA: bios length is not even\n");
664 return -EINVAL;
665 }
666
667 retval = moxa_real_load_code(brd, ptr, len);
668 if (retval)
669 return retval;
670
671 switch (brd->boardType) {
672 case MOXA_BOARD_C218_ISA:
673 case MOXA_BOARD_C218_PCI:
674 case MOXA_BOARD_CP204J:
675 port = brd->ports;
676 for (i = 0; i < brd->numPorts; i++, port++) {
677 port->board = brd;
678 port->DCDState = 0;
679 port->tableAddr = baseAddr + Extern_table +
680 Extern_size * i;
681 ofsAddr = port->tableAddr;
682 writew(C218rx_mask, ofsAddr + RX_mask);
683 writew(C218tx_mask, ofsAddr + TX_mask);
684 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
685 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
686
687 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
688 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
689
690 }
691 break;
692 default:
693 port = brd->ports;
694 for (i = 0; i < brd->numPorts; i++, port++) {
695 port->board = brd;
696 port->DCDState = 0;
697 port->tableAddr = baseAddr + Extern_table +
698 Extern_size * i;
699 ofsAddr = port->tableAddr;
700 switch (brd->numPorts) {
701 case 8:
702 writew(C320p8rx_mask, ofsAddr + RX_mask);
703 writew(C320p8tx_mask, ofsAddr + TX_mask);
704 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
705 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
706 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
707 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
708
709 break;
710 case 16:
711 writew(C320p16rx_mask, ofsAddr + RX_mask);
712 writew(C320p16tx_mask, ofsAddr + TX_mask);
713 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
714 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
715 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
716 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
717 break;
718
719 case 24:
720 writew(C320p24rx_mask, ofsAddr + RX_mask);
721 writew(C320p24tx_mask, ofsAddr + TX_mask);
722 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
723 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
724 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
725 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
726 break;
727 case 32:
728 writew(C320p32rx_mask, ofsAddr + RX_mask);
729 writew(C320p32tx_mask, ofsAddr + TX_mask);
730 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
731 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
732 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
733 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
734 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
735 break;
736 }
737 }
738 break;
739 }
740 return 0;
741}
742
743static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
744{
745 const void *ptr = fw->data;
746 char rsn[64];
747 u16 lens[5];
748 size_t len;
749 unsigned int a, lenp, lencnt;
750 int ret = -EINVAL;
751 struct {
752 __le32 magic;
753 u8 reserved1[2];
754 u8 type;
755 u8 model;
756 u8 reserved2[8];
757 __le16 len[5];
758 } const *hdr = ptr;
759
760 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
761
762 if (fw->size < MOXA_FW_HDRLEN) {
763 strcpy(rsn, "too short (even header won't fit)");
764 goto err;
765 }
766 if (hdr->magic != cpu_to_le32(0x30343034)) {
767 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
768 goto err;
769 }
770 if (hdr->type != 3) {
771 sprintf(rsn, "not for linux, type is %u", hdr->type);
772 goto err;
773 }
774 if (moxa_check_fw_model(brd, hdr->model)) {
775 sprintf(rsn, "not for this card, model is %u", hdr->model);
776 goto err;
777 }
778
779 len = MOXA_FW_HDRLEN;
780 lencnt = hdr->model == 2 ? 5 : 3;
781 for (a = 0; a < ARRAY_SIZE(lens); a++) {
782 lens[a] = le16_to_cpu(hdr->len[a]);
783 if (lens[a] && len + lens[a] <= fw->size &&
784 moxa_check_fw(&fw->data[len]))
785 printk(KERN_WARNING "MOXA firmware: unexpected input "
786 "at offset %u, but going on\n", (u32)len);
787 if (!lens[a] && a < lencnt) {
788 sprintf(rsn, "too few entries in fw file");
789 goto err;
790 }
791 len += lens[a];
792 }
793
794 if (len != fw->size) {
795 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
796 (u32)len);
797 goto err;
798 }
799
800 ptr += MOXA_FW_HDRLEN;
801 lenp = 0;
802
803 strcpy(rsn, "read above");
804
805 ret = moxa_load_bios(brd, ptr, lens[lenp]);
806 if (ret)
807 goto err;
808
809
810 ptr += lens[lenp] + lens[lenp + 1];
811 lenp += 2;
812
813 if (hdr->model == 2) {
814 ret = moxa_load_320b(brd, ptr, lens[lenp]);
815 if (ret)
816 goto err;
817
818 ptr += lens[lenp] + lens[lenp + 1];
819 lenp += 2;
820 }
821
822 ret = moxa_load_code(brd, ptr, lens[lenp]);
823 if (ret)
824 goto err;
825
826 return 0;
827err:
828 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
829 return ret;
830}
831
832static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
833{
834 const struct firmware *fw;
835 const char *file;
836 struct moxa_port *p;
837 unsigned int i, first_idx;
838 int ret;
839
840 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
841 GFP_KERNEL);
842 if (brd->ports == NULL) {
843 printk(KERN_ERR "cannot allocate memory for ports\n");
844 ret = -ENOMEM;
845 goto err;
846 }
847
848 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
849 tty_port_init(&p->port);
850 p->port.ops = &moxa_port_ops;
851 p->type = PORT_16550A;
852 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
853 }
854
855 switch (brd->boardType) {
856 case MOXA_BOARD_C218_ISA:
857 case MOXA_BOARD_C218_PCI:
858 file = "c218tunx.cod";
859 break;
860 case MOXA_BOARD_CP204J:
861 file = "cp204unx.cod";
862 break;
863 default:
864 file = "c320tunx.cod";
865 break;
866 }
867
868 ret = request_firmware(&fw, file, dev);
869 if (ret) {
870 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
871 "you've placed '%s' file into your firmware "
872 "loader directory (e.g. /lib/firmware)\n",
873 file);
874 goto err_free;
875 }
876
877 ret = moxa_load_fw(brd, fw);
878
879 release_firmware(fw);
880
881 if (ret)
882 goto err_free;
883
884 spin_lock_bh(&moxa_lock);
885 brd->ready = 1;
886 if (!timer_pending(&moxaTimer))
887 mod_timer(&moxaTimer, jiffies + HZ / 50);
888 spin_unlock_bh(&moxa_lock);
889
890 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
891 for (i = 0; i < brd->numPorts; i++)
892 tty_port_register_device(&brd->ports[i].port, moxaDriver,
893 first_idx + i, dev);
894
895 return 0;
896err_free:
897 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
898 tty_port_destroy(&brd->ports[i].port);
899 kfree(brd->ports);
900err:
901 return ret;
902}
903
904static void moxa_board_deinit(struct moxa_board_conf *brd)
905{
906 unsigned int a, opened, first_idx;
907
908 mutex_lock(&moxa_openlock);
909 spin_lock_bh(&moxa_lock);
910 brd->ready = 0;
911 spin_unlock_bh(&moxa_lock);
912
913
914 for (a = 0; a < brd->numPorts; a++)
915 if (tty_port_initialized(&brd->ports[a].port))
916 tty_port_tty_hangup(&brd->ports[a].port, false);
917
918 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
919 tty_port_destroy(&brd->ports[a].port);
920
921 while (1) {
922 opened = 0;
923 for (a = 0; a < brd->numPorts; a++)
924 if (tty_port_initialized(&brd->ports[a].port))
925 opened++;
926 mutex_unlock(&moxa_openlock);
927 if (!opened)
928 break;
929 msleep(50);
930 mutex_lock(&moxa_openlock);
931 }
932
933 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
934 for (a = 0; a < brd->numPorts; a++)
935 tty_unregister_device(moxaDriver, first_idx + a);
936
937 iounmap(brd->basemem);
938 brd->basemem = NULL;
939 kfree(brd->ports);
940}
941
942#ifdef CONFIG_PCI
943static int moxa_pci_probe(struct pci_dev *pdev,
944 const struct pci_device_id *ent)
945{
946 struct moxa_board_conf *board;
947 unsigned int i;
948 int board_type = ent->driver_data;
949 int retval;
950
951 retval = pci_enable_device(pdev);
952 if (retval) {
953 dev_err(&pdev->dev, "can't enable pci device\n");
954 goto err;
955 }
956
957 for (i = 0; i < MAX_BOARDS; i++)
958 if (moxa_boards[i].basemem == NULL)
959 break;
960
961 retval = -ENODEV;
962 if (i >= MAX_BOARDS) {
963 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
964 "found. Board is ignored.\n", MAX_BOARDS);
965 goto err;
966 }
967
968 board = &moxa_boards[i];
969
970 retval = pci_request_region(pdev, 2, "moxa-base");
971 if (retval) {
972 dev_err(&pdev->dev, "can't request pci region 2\n");
973 goto err;
974 }
975
976 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
977 if (board->basemem == NULL) {
978 dev_err(&pdev->dev, "can't remap io space 2\n");
979 retval = -ENOMEM;
980 goto err_reg;
981 }
982
983 board->boardType = board_type;
984 switch (board_type) {
985 case MOXA_BOARD_C218_ISA:
986 case MOXA_BOARD_C218_PCI:
987 board->numPorts = 8;
988 break;
989
990 case MOXA_BOARD_CP204J:
991 board->numPorts = 4;
992 break;
993 default:
994 board->numPorts = 0;
995 break;
996 }
997 board->busType = MOXA_BUS_TYPE_PCI;
998
999 retval = moxa_init_board(board, &pdev->dev);
1000 if (retval)
1001 goto err_base;
1002
1003 pci_set_drvdata(pdev, board);
1004
1005 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
1006 moxa_brdname[board_type - 1], board->numPorts);
1007
1008 return 0;
1009err_base:
1010 iounmap(board->basemem);
1011 board->basemem = NULL;
1012err_reg:
1013 pci_release_region(pdev, 2);
1014err:
1015 return retval;
1016}
1017
1018static void moxa_pci_remove(struct pci_dev *pdev)
1019{
1020 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1021
1022 moxa_board_deinit(brd);
1023
1024 pci_release_region(pdev, 2);
1025}
1026
1027static struct pci_driver moxa_pci_driver = {
1028 .name = "moxa",
1029 .id_table = moxa_pcibrds,
1030 .probe = moxa_pci_probe,
1031 .remove = moxa_pci_remove
1032};
1033#endif
1034
1035static int __init moxa_init(void)
1036{
1037 unsigned int isabrds = 0;
1038 int retval = 0;
1039 struct moxa_board_conf *brd = moxa_boards;
1040 unsigned int i;
1041
1042 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1043 MOXA_VERSION);
1044
1045 tty_port_init(&moxa_service_port);
1046
1047 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1048 TTY_DRIVER_REAL_RAW |
1049 TTY_DRIVER_DYNAMIC_DEV);
1050 if (IS_ERR(moxaDriver))
1051 return PTR_ERR(moxaDriver);
1052
1053 moxaDriver->name = "ttyMX";
1054 moxaDriver->major = ttymajor;
1055 moxaDriver->minor_start = 0;
1056 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1057 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1058 moxaDriver->init_termios = tty_std_termios;
1059 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1060 moxaDriver->init_termios.c_ispeed = 9600;
1061 moxaDriver->init_termios.c_ospeed = 9600;
1062 tty_set_operations(moxaDriver, &moxa_ops);
1063
1064 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1065
1066 if (tty_register_driver(moxaDriver)) {
1067 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1068 put_tty_driver(moxaDriver);
1069 return -1;
1070 }
1071
1072
1073
1074 for (i = 0; i < MAX_BOARDS; i++) {
1075 if (!baseaddr[i])
1076 break;
1077 if (type[i] == MOXA_BOARD_C218_ISA ||
1078 type[i] == MOXA_BOARD_C320_ISA) {
1079 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1080 isabrds + 1, moxa_brdname[type[i] - 1],
1081 baseaddr[i]);
1082 brd->boardType = type[i];
1083 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1084 numports[i];
1085 brd->busType = MOXA_BUS_TYPE_ISA;
1086 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
1087 if (!brd->basemem) {
1088 printk(KERN_ERR "MOXA: can't remap %lx\n",
1089 baseaddr[i]);
1090 continue;
1091 }
1092 if (moxa_init_board(brd, NULL)) {
1093 iounmap(brd->basemem);
1094 brd->basemem = NULL;
1095 continue;
1096 }
1097
1098 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1099 "ready (%u ports, firmware loaded)\n",
1100 baseaddr[i], brd->numPorts);
1101
1102 brd++;
1103 isabrds++;
1104 }
1105 }
1106
1107#ifdef CONFIG_PCI
1108 retval = pci_register_driver(&moxa_pci_driver);
1109 if (retval) {
1110 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1111 if (isabrds)
1112 retval = 0;
1113 }
1114#endif
1115
1116 return retval;
1117}
1118
1119static void __exit moxa_exit(void)
1120{
1121 unsigned int i;
1122
1123#ifdef CONFIG_PCI
1124 pci_unregister_driver(&moxa_pci_driver);
1125#endif
1126
1127 for (i = 0; i < MAX_BOARDS; i++)
1128 if (moxa_boards[i].ready)
1129 moxa_board_deinit(&moxa_boards[i]);
1130
1131 del_timer_sync(&moxaTimer);
1132
1133 if (tty_unregister_driver(moxaDriver))
1134 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1135 "serial driver\n");
1136 put_tty_driver(moxaDriver);
1137}
1138
1139module_init(moxa_init);
1140module_exit(moxa_exit);
1141
1142static void moxa_shutdown(struct tty_port *port)
1143{
1144 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1145 MoxaPortDisable(ch);
1146 MoxaPortFlushData(ch, 2);
1147}
1148
1149static int moxa_carrier_raised(struct tty_port *port)
1150{
1151 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1152 int dcd;
1153
1154 spin_lock_irq(&port->lock);
1155 dcd = ch->DCDState;
1156 spin_unlock_irq(&port->lock);
1157 return dcd;
1158}
1159
1160static void moxa_dtr_rts(struct tty_port *port, int onoff)
1161{
1162 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1163 MoxaPortLineCtrl(ch, onoff, onoff);
1164}
1165
1166
1167static int moxa_open(struct tty_struct *tty, struct file *filp)
1168{
1169 struct moxa_board_conf *brd;
1170 struct moxa_port *ch;
1171 int port;
1172
1173 port = tty->index;
1174 if (port == MAX_PORTS) {
1175 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1176 }
1177 if (mutex_lock_interruptible(&moxa_openlock))
1178 return -ERESTARTSYS;
1179 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1180 if (!brd->ready) {
1181 mutex_unlock(&moxa_openlock);
1182 return -ENODEV;
1183 }
1184
1185 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1186 mutex_unlock(&moxa_openlock);
1187 return -ENODEV;
1188 }
1189
1190 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1191 ch->port.count++;
1192 tty->driver_data = ch;
1193 tty_port_tty_set(&ch->port, tty);
1194 mutex_lock(&ch->port.mutex);
1195 if (!tty_port_initialized(&ch->port)) {
1196 ch->statusflags = 0;
1197 moxa_set_tty_param(tty, &tty->termios);
1198 MoxaPortLineCtrl(ch, 1, 1);
1199 MoxaPortEnable(ch);
1200 MoxaSetFifo(ch, ch->type == PORT_16550A);
1201 tty_port_set_initialized(&ch->port, 1);
1202 }
1203 mutex_unlock(&ch->port.mutex);
1204 mutex_unlock(&moxa_openlock);
1205
1206 return tty_port_block_til_ready(&ch->port, tty, filp);
1207}
1208
1209static void moxa_close(struct tty_struct *tty, struct file *filp)
1210{
1211 struct moxa_port *ch = tty->driver_data;
1212 ch->cflag = tty->termios.c_cflag;
1213 tty_port_close(&ch->port, tty, filp);
1214}
1215
1216static int moxa_write(struct tty_struct *tty,
1217 const unsigned char *buf, int count)
1218{
1219 struct moxa_port *ch = tty->driver_data;
1220 unsigned long flags;
1221 int len;
1222
1223 if (ch == NULL)
1224 return 0;
1225
1226 spin_lock_irqsave(&moxa_lock, flags);
1227 len = MoxaPortWriteData(tty, buf, count);
1228 spin_unlock_irqrestore(&moxa_lock, flags);
1229
1230 set_bit(LOWWAIT, &ch->statusflags);
1231 return len;
1232}
1233
1234static int moxa_write_room(struct tty_struct *tty)
1235{
1236 struct moxa_port *ch;
1237
1238 if (tty->stopped)
1239 return 0;
1240 ch = tty->driver_data;
1241 if (ch == NULL)
1242 return 0;
1243 return MoxaPortTxFree(ch);
1244}
1245
1246static void moxa_flush_buffer(struct tty_struct *tty)
1247{
1248 struct moxa_port *ch = tty->driver_data;
1249
1250 if (ch == NULL)
1251 return;
1252 MoxaPortFlushData(ch, 1);
1253 tty_wakeup(tty);
1254}
1255
1256static int moxa_chars_in_buffer(struct tty_struct *tty)
1257{
1258 struct moxa_port *ch = tty->driver_data;
1259 int chars;
1260
1261 chars = MoxaPortTxQueue(ch);
1262 if (chars)
1263
1264
1265
1266
1267 set_bit(EMPTYWAIT, &ch->statusflags);
1268 return chars;
1269}
1270
1271static int moxa_tiocmget(struct tty_struct *tty)
1272{
1273 struct moxa_port *ch = tty->driver_data;
1274 int flag = 0, dtr, rts;
1275
1276 MoxaPortGetLineOut(ch, &dtr, &rts);
1277 if (dtr)
1278 flag |= TIOCM_DTR;
1279 if (rts)
1280 flag |= TIOCM_RTS;
1281 dtr = MoxaPortLineStatus(ch);
1282 if (dtr & 1)
1283 flag |= TIOCM_CTS;
1284 if (dtr & 2)
1285 flag |= TIOCM_DSR;
1286 if (dtr & 4)
1287 flag |= TIOCM_CD;
1288 return flag;
1289}
1290
1291static int moxa_tiocmset(struct tty_struct *tty,
1292 unsigned int set, unsigned int clear)
1293{
1294 struct moxa_port *ch;
1295 int dtr, rts;
1296
1297 mutex_lock(&moxa_openlock);
1298 ch = tty->driver_data;
1299 if (!ch) {
1300 mutex_unlock(&moxa_openlock);
1301 return -EINVAL;
1302 }
1303
1304 MoxaPortGetLineOut(ch, &dtr, &rts);
1305 if (set & TIOCM_RTS)
1306 rts = 1;
1307 if (set & TIOCM_DTR)
1308 dtr = 1;
1309 if (clear & TIOCM_RTS)
1310 rts = 0;
1311 if (clear & TIOCM_DTR)
1312 dtr = 0;
1313 MoxaPortLineCtrl(ch, dtr, rts);
1314 mutex_unlock(&moxa_openlock);
1315 return 0;
1316}
1317
1318static void moxa_set_termios(struct tty_struct *tty,
1319 struct ktermios *old_termios)
1320{
1321 struct moxa_port *ch = tty->driver_data;
1322
1323 if (ch == NULL)
1324 return;
1325 moxa_set_tty_param(tty, old_termios);
1326 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1327 wake_up_interruptible(&ch->port.open_wait);
1328}
1329
1330static void moxa_stop(struct tty_struct *tty)
1331{
1332 struct moxa_port *ch = tty->driver_data;
1333
1334 if (ch == NULL)
1335 return;
1336 MoxaPortTxDisable(ch);
1337 set_bit(TXSTOPPED, &ch->statusflags);
1338}
1339
1340
1341static void moxa_start(struct tty_struct *tty)
1342{
1343 struct moxa_port *ch = tty->driver_data;
1344
1345 if (ch == NULL)
1346 return;
1347
1348 if (!test_bit(TXSTOPPED, &ch->statusflags))
1349 return;
1350
1351 MoxaPortTxEnable(ch);
1352 clear_bit(TXSTOPPED, &ch->statusflags);
1353}
1354
1355static void moxa_hangup(struct tty_struct *tty)
1356{
1357 struct moxa_port *ch = tty->driver_data;
1358 tty_port_hangup(&ch->port);
1359}
1360
1361static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1362{
1363 unsigned long flags;
1364 dcd = !!dcd;
1365
1366 spin_lock_irqsave(&p->port.lock, flags);
1367 if (dcd != p->DCDState) {
1368 p->DCDState = dcd;
1369 spin_unlock_irqrestore(&p->port.lock, flags);
1370 if (!dcd)
1371 tty_port_tty_hangup(&p->port, true);
1372 }
1373 else
1374 spin_unlock_irqrestore(&p->port.lock, flags);
1375}
1376
1377static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1378 u16 __iomem *ip)
1379{
1380 struct tty_struct *tty = tty_port_tty_get(&p->port);
1381 void __iomem *ofsAddr;
1382 unsigned int inited = tty_port_initialized(&p->port);
1383 u16 intr;
1384
1385 if (tty) {
1386 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1387 MoxaPortTxQueue(p) == 0) {
1388 clear_bit(EMPTYWAIT, &p->statusflags);
1389 tty_wakeup(tty);
1390 }
1391 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
1392 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1393 clear_bit(LOWWAIT, &p->statusflags);
1394 tty_wakeup(tty);
1395 }
1396
1397 if (inited && !tty_throttled(tty) &&
1398 MoxaPortRxQueue(p) > 0) {
1399 MoxaPortReadData(p);
1400 tty_schedule_flip(&p->port);
1401 }
1402 } else {
1403 clear_bit(EMPTYWAIT, &p->statusflags);
1404 MoxaPortFlushData(p, 0);
1405 }
1406
1407 if (!handle)
1408 goto put;
1409
1410 intr = readw(ip);
1411 if (intr == 0)
1412 goto put;
1413
1414 writew(0, ip);
1415 ofsAddr = p->tableAddr;
1416 if (intr & IntrTx)
1417 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1418 ofsAddr + HostStat);
1419
1420 if (!inited)
1421 goto put;
1422
1423 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) {
1424 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1425 tty_schedule_flip(&p->port);
1426 }
1427
1428 if (intr & IntrLine)
1429 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1430put:
1431 tty_kref_put(tty);
1432
1433 return 0;
1434}
1435
1436static void moxa_poll(unsigned long ignored)
1437{
1438 struct moxa_board_conf *brd;
1439 u16 __iomem *ip;
1440 unsigned int card, port, served = 0;
1441
1442 spin_lock(&moxa_lock);
1443 for (card = 0; card < MAX_BOARDS; card++) {
1444 brd = &moxa_boards[card];
1445 if (!brd->ready)
1446 continue;
1447
1448 served++;
1449
1450 ip = NULL;
1451 if (readb(brd->intPend) == 0xff)
1452 ip = brd->intTable + readb(brd->intNdx);
1453
1454 for (port = 0; port < brd->numPorts; port++)
1455 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1456
1457 if (ip)
1458 writeb(0, brd->intPend);
1459
1460 if (moxaLowWaterChk) {
1461 struct moxa_port *p = brd->ports;
1462 for (port = 0; port < brd->numPorts; port++, p++)
1463 if (p->lowChkFlag) {
1464 p->lowChkFlag = 0;
1465 moxa_low_water_check(p->tableAddr);
1466 }
1467 }
1468 }
1469 moxaLowWaterChk = 0;
1470
1471 if (served)
1472 mod_timer(&moxaTimer, jiffies + HZ / 50);
1473 spin_unlock(&moxa_lock);
1474}
1475
1476
1477
1478static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1479{
1480 register struct ktermios *ts = &tty->termios;
1481 struct moxa_port *ch = tty->driver_data;
1482 int rts, cts, txflow, rxflow, xany, baud;
1483
1484 rts = cts = txflow = rxflow = xany = 0;
1485 if (ts->c_cflag & CRTSCTS)
1486 rts = cts = 1;
1487 if (ts->c_iflag & IXON)
1488 txflow = 1;
1489 if (ts->c_iflag & IXOFF)
1490 rxflow = 1;
1491 if (ts->c_iflag & IXANY)
1492 xany = 1;
1493
1494
1495 ts->c_cflag &= ~CMSPAR;
1496 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1497 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1498 if (baud == -1)
1499 baud = tty_termios_baud_rate(old_termios);
1500
1501 tty_encode_baud_rate(tty, baud, baud);
1502}
1503
1504
1505
1506
1507
1508static void MoxaPortFlushData(struct moxa_port *port, int mode)
1509{
1510 void __iomem *ofsAddr;
1511 if (mode < 0 || mode > 2)
1512 return;
1513 ofsAddr = port->tableAddr;
1514 moxafunc(ofsAddr, FC_FlushQueue, mode);
1515 if (mode != 1) {
1516 port->lowChkFlag = 0;
1517 moxa_low_water_check(ofsAddr);
1518 }
1519}
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713static void MoxaPortEnable(struct moxa_port *port)
1714{
1715 void __iomem *ofsAddr;
1716 u16 lowwater = 512;
1717
1718 ofsAddr = port->tableAddr;
1719 writew(lowwater, ofsAddr + Low_water);
1720 if (MOXA_IS_320(port->board))
1721 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1722 else
1723 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1724 ofsAddr + HostStat);
1725
1726 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1727 moxafunc(ofsAddr, FC_FlushQueue, 2);
1728
1729 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1730 MoxaPortLineStatus(port);
1731}
1732
1733static void MoxaPortDisable(struct moxa_port *port)
1734{
1735 void __iomem *ofsAddr = port->tableAddr;
1736
1737 moxafunc(ofsAddr, FC_SetFlowCtl, 0);
1738 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1739 writew(0, ofsAddr + HostStat);
1740 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1741}
1742
1743static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1744{
1745 void __iomem *ofsAddr = port->tableAddr;
1746 unsigned int clock, val;
1747 speed_t max;
1748
1749 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1750 if (baud < 50)
1751 return 0;
1752 if (baud > max)
1753 baud = max;
1754 clock = 921600;
1755 val = clock / baud;
1756 moxafunc(ofsAddr, FC_SetBaud, val);
1757 baud = clock / val;
1758 return baud;
1759}
1760
1761static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1762 speed_t baud)
1763{
1764 void __iomem *ofsAddr;
1765 tcflag_t mode = 0;
1766
1767 ofsAddr = port->tableAddr;
1768
1769 mode = termio->c_cflag & CSIZE;
1770 if (mode == CS5)
1771 mode = MX_CS5;
1772 else if (mode == CS6)
1773 mode = MX_CS6;
1774 else if (mode == CS7)
1775 mode = MX_CS7;
1776 else if (mode == CS8)
1777 mode = MX_CS8;
1778
1779 if (termio->c_cflag & CSTOPB) {
1780 if (mode == MX_CS5)
1781 mode |= MX_STOP15;
1782 else
1783 mode |= MX_STOP2;
1784 } else
1785 mode |= MX_STOP1;
1786
1787 if (termio->c_cflag & PARENB) {
1788 if (termio->c_cflag & PARODD)
1789 mode |= MX_PARODD;
1790 else
1791 mode |= MX_PAREVEN;
1792 } else
1793 mode |= MX_PARNONE;
1794
1795 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1796
1797 if (MOXA_IS_320(port->board) && baud >= 921600)
1798 return -1;
1799
1800 baud = MoxaPortSetBaud(port, baud);
1801
1802 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1803 spin_lock_irq(&moxafunc_lock);
1804 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1805 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1806 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1807 moxa_wait_finish(ofsAddr);
1808 spin_unlock_irq(&moxafunc_lock);
1809
1810 }
1811 return baud;
1812}
1813
1814static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1815 int *rtsState)
1816{
1817 if (dtrState)
1818 *dtrState = !!(port->lineCtrl & DTR_ON);
1819 if (rtsState)
1820 *rtsState = !!(port->lineCtrl & RTS_ON);
1821
1822 return 0;
1823}
1824
1825static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1826{
1827 u8 mode = 0;
1828
1829 if (dtr)
1830 mode |= DTR_ON;
1831 if (rts)
1832 mode |= RTS_ON;
1833 port->lineCtrl = mode;
1834 moxafunc(port->tableAddr, FC_LineControl, mode);
1835}
1836
1837static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1838 int txflow, int rxflow, int txany)
1839{
1840 int mode = 0;
1841
1842 if (rts)
1843 mode |= RTS_FlowCtl;
1844 if (cts)
1845 mode |= CTS_FlowCtl;
1846 if (txflow)
1847 mode |= Tx_FlowCtl;
1848 if (rxflow)
1849 mode |= Rx_FlowCtl;
1850 if (txany)
1851 mode |= IXM_IXANY;
1852 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1853}
1854
1855static int MoxaPortLineStatus(struct moxa_port *port)
1856{
1857 void __iomem *ofsAddr;
1858 int val;
1859
1860 ofsAddr = port->tableAddr;
1861 if (MOXA_IS_320(port->board))
1862 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1863 else
1864 val = readw(ofsAddr + FlagStat) >> 4;
1865 val &= 0x0B;
1866 if (val & 8)
1867 val |= 4;
1868 moxa_new_dcdstate(port, val & 8);
1869 val &= 7;
1870 return val;
1871}
1872
1873static int MoxaPortWriteData(struct tty_struct *tty,
1874 const unsigned char *buffer, int len)
1875{
1876 struct moxa_port *port = tty->driver_data;
1877 void __iomem *baseAddr, *ofsAddr, *ofs;
1878 unsigned int c, total;
1879 u16 head, tail, tx_mask, spage, epage;
1880 u16 pageno, pageofs, bufhead;
1881
1882 ofsAddr = port->tableAddr;
1883 baseAddr = port->board->basemem;
1884 tx_mask = readw(ofsAddr + TX_mask);
1885 spage = readw(ofsAddr + Page_txb);
1886 epage = readw(ofsAddr + EndPage_txb);
1887 tail = readw(ofsAddr + TXwptr);
1888 head = readw(ofsAddr + TXrptr);
1889 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1890 if (c > len)
1891 c = len;
1892 moxaLog.txcnt[port->port.tty->index] += c;
1893 total = c;
1894 if (spage == epage) {
1895 bufhead = readw(ofsAddr + Ofs_txb);
1896 writew(spage, baseAddr + Control_reg);
1897 while (c > 0) {
1898 if (head > tail)
1899 len = head - tail - 1;
1900 else
1901 len = tx_mask + 1 - tail;
1902 len = (c > len) ? len : c;
1903 ofs = baseAddr + DynPage_addr + bufhead + tail;
1904 memcpy_toio(ofs, buffer, len);
1905 buffer += len;
1906 tail = (tail + len) & tx_mask;
1907 c -= len;
1908 }
1909 } else {
1910 pageno = spage + (tail >> 13);
1911 pageofs = tail & Page_mask;
1912 while (c > 0) {
1913 len = Page_size - pageofs;
1914 if (len > c)
1915 len = c;
1916 writeb(pageno, baseAddr + Control_reg);
1917 ofs = baseAddr + DynPage_addr + pageofs;
1918 memcpy_toio(ofs, buffer, len);
1919 buffer += len;
1920 if (++pageno == epage)
1921 pageno = spage;
1922 pageofs = 0;
1923 c -= len;
1924 }
1925 tail = (tail + total) & tx_mask;
1926 }
1927 writew(tail, ofsAddr + TXwptr);
1928 writeb(1, ofsAddr + CD180TXirq);
1929 return total;
1930}
1931
1932static int MoxaPortReadData(struct moxa_port *port)
1933{
1934 struct tty_struct *tty = port->port.tty;
1935 unsigned char *dst;
1936 void __iomem *baseAddr, *ofsAddr, *ofs;
1937 unsigned int count, len, total;
1938 u16 tail, rx_mask, spage, epage;
1939 u16 pageno, pageofs, bufhead, head;
1940
1941 ofsAddr = port->tableAddr;
1942 baseAddr = port->board->basemem;
1943 head = readw(ofsAddr + RXrptr);
1944 tail = readw(ofsAddr + RXwptr);
1945 rx_mask = readw(ofsAddr + RX_mask);
1946 spage = readw(ofsAddr + Page_rxb);
1947 epage = readw(ofsAddr + EndPage_rxb);
1948 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1949 if (count == 0)
1950 return 0;
1951
1952 total = count;
1953 moxaLog.rxcnt[tty->index] += total;
1954 if (spage == epage) {
1955 bufhead = readw(ofsAddr + Ofs_rxb);
1956 writew(spage, baseAddr + Control_reg);
1957 while (count > 0) {
1958 ofs = baseAddr + DynPage_addr + bufhead + head;
1959 len = (tail >= head) ? (tail - head) :
1960 (rx_mask + 1 - head);
1961 len = tty_prepare_flip_string(&port->port, &dst,
1962 min(len, count));
1963 memcpy_fromio(dst, ofs, len);
1964 head = (head + len) & rx_mask;
1965 count -= len;
1966 }
1967 } else {
1968 pageno = spage + (head >> 13);
1969 pageofs = head & Page_mask;
1970 while (count > 0) {
1971 writew(pageno, baseAddr + Control_reg);
1972 ofs = baseAddr + DynPage_addr + pageofs;
1973 len = tty_prepare_flip_string(&port->port, &dst,
1974 min(Page_size - pageofs, count));
1975 memcpy_fromio(dst, ofs, len);
1976
1977 count -= len;
1978 pageofs = (pageofs + len) & Page_mask;
1979 if (pageofs == 0 && ++pageno == epage)
1980 pageno = spage;
1981 }
1982 head = (head + total) & rx_mask;
1983 }
1984 writew(head, ofsAddr + RXrptr);
1985 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1986 moxaLowWaterChk = 1;
1987 port->lowChkFlag = 1;
1988 }
1989 return total;
1990}
1991
1992
1993static int MoxaPortTxQueue(struct moxa_port *port)
1994{
1995 void __iomem *ofsAddr = port->tableAddr;
1996 u16 rptr, wptr, mask;
1997
1998 rptr = readw(ofsAddr + TXrptr);
1999 wptr = readw(ofsAddr + TXwptr);
2000 mask = readw(ofsAddr + TX_mask);
2001 return (wptr - rptr) & mask;
2002}
2003
2004static int MoxaPortTxFree(struct moxa_port *port)
2005{
2006 void __iomem *ofsAddr = port->tableAddr;
2007 u16 rptr, wptr, mask;
2008
2009 rptr = readw(ofsAddr + TXrptr);
2010 wptr = readw(ofsAddr + TXwptr);
2011 mask = readw(ofsAddr + TX_mask);
2012 return mask - ((wptr - rptr) & mask);
2013}
2014
2015static int MoxaPortRxQueue(struct moxa_port *port)
2016{
2017 void __iomem *ofsAddr = port->tableAddr;
2018 u16 rptr, wptr, mask;
2019
2020 rptr = readw(ofsAddr + RXrptr);
2021 wptr = readw(ofsAddr + RXwptr);
2022 mask = readw(ofsAddr + RX_mask);
2023 return (wptr - rptr) & mask;
2024}
2025
2026static void MoxaPortTxDisable(struct moxa_port *port)
2027{
2028 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2029}
2030
2031static void MoxaPortTxEnable(struct moxa_port *port)
2032{
2033 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2034}
2035
2036static int moxa_get_serial_info(struct moxa_port *info,
2037 struct serial_struct __user *retinfo)
2038{
2039 struct serial_struct tmp = {
2040 .type = info->type,
2041 .line = info->port.tty->index,
2042 .flags = info->port.flags,
2043 .baud_base = 921600,
2044 .close_delay = info->port.close_delay
2045 };
2046 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
2047}
2048
2049
2050static int moxa_set_serial_info(struct moxa_port *info,
2051 struct serial_struct __user *new_info)
2052{
2053 struct serial_struct new_serial;
2054
2055 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2056 return -EFAULT;
2057
2058 if (new_serial.irq != 0 || new_serial.port != 0 ||
2059 new_serial.custom_divisor != 0 ||
2060 new_serial.baud_base != 921600)
2061 return -EPERM;
2062
2063 if (!capable(CAP_SYS_ADMIN)) {
2064 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
2065 (info->port.flags & ~ASYNC_USR_MASK)))
2066 return -EPERM;
2067 } else
2068 info->port.close_delay = new_serial.close_delay * HZ / 100;
2069
2070 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
2071 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
2072
2073 MoxaSetFifo(info, new_serial.type == PORT_16550A);
2074
2075 info->type = new_serial.type;
2076 return 0;
2077}
2078
2079
2080
2081
2082
2083
2084
2085static void MoxaSetFifo(struct moxa_port *port, int enable)
2086{
2087 void __iomem *ofsAddr = port->tableAddr;
2088
2089 if (!enable) {
2090 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2091 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2092 } else {
2093 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2094 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2095 }
2096}
2097