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24#include <linux/delay.h>
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/mutex.h>
29
30#include <sound/core.h>
31#include <sound/info.h>
32#include <sound/tlv.h>
33
34#include "ice1712.h"
35#include "envy24ht.h"
36#include "pontis.h"
37
38
39#define WM_DEV 0x34
40#define CS_DEV 0x20
41
42
43#define WM_HP_ATTEN_L 0x00
44#define WM_HP_ATTEN_R 0x01
45#define WM_HP_MASTER 0x02
46
47#define WM_DAC_ATTEN_L 0x03
48#define WM_DAC_ATTEN_R 0x04
49#define WM_DAC_MASTER 0x05
50#define WM_PHASE_SWAP 0x06
51#define WM_DAC_CTRL1 0x07
52#define WM_DAC_MUTE 0x08
53#define WM_DAC_CTRL2 0x09
54#define WM_DAC_INT 0x0a
55#define WM_ADC_INT 0x0b
56#define WM_MASTER_CTRL 0x0c
57#define WM_POWERDOWN 0x0d
58#define WM_ADC_ATTEN_L 0x0e
59#define WM_ADC_ATTEN_R 0x0f
60#define WM_ALC_CTRL1 0x10
61#define WM_ALC_CTRL2 0x11
62#define WM_ALC_CTRL3 0x12
63#define WM_NOISE_GATE 0x13
64#define WM_LIMITER 0x14
65#define WM_ADC_MUX 0x15
66#define WM_OUT_MUX 0x16
67#define WM_RESET 0x17
68
69
70
71
72#define PONTIS_CS_CS (1<<4)
73#define PONTIS_CS_CLK (1<<5)
74#define PONTIS_CS_RDATA (1<<6)
75#define PONTIS_CS_WDATA (1<<7)
76
77
78
79
80
81static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
82{
83 reg <<= 1;
84 return ((unsigned short)ice->akm[0].images[reg] << 8) |
85 ice->akm[0].images[reg + 1];
86}
87
88
89
90
91static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
92{
93 unsigned short cval;
94 cval = (reg << 9) | val;
95 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
96}
97
98static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
99{
100 wm_put_nocache(ice, reg, val);
101 reg <<= 1;
102 ice->akm[0].images[reg] = val >> 8;
103 ice->akm[0].images[reg + 1] = val;
104}
105
106
107
108
109
110#define DAC_0dB 0xff
111#define DAC_RES 128
112#define DAC_MIN (DAC_0dB - DAC_RES)
113
114static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
115{
116 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
117 uinfo->count = 2;
118 uinfo->value.integer.min = 0;
119 uinfo->value.integer.max = DAC_RES;
120 return 0;
121}
122
123static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
124{
125 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
126 unsigned short val;
127 int i;
128
129 mutex_lock(&ice->gpio_mutex);
130 for (i = 0; i < 2; i++) {
131 val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
132 val = val > DAC_MIN ? (val - DAC_MIN) : 0;
133 ucontrol->value.integer.value[i] = val;
134 }
135 mutex_unlock(&ice->gpio_mutex);
136 return 0;
137}
138
139static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
140{
141 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
142 unsigned short oval, nval;
143 int i, idx, change = 0;
144
145 mutex_lock(&ice->gpio_mutex);
146 for (i = 0; i < 2; i++) {
147 nval = ucontrol->value.integer.value[i];
148 nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
149 idx = WM_DAC_ATTEN_L + i;
150 oval = wm_get(ice, idx) & 0xff;
151 if (oval != nval) {
152 wm_put(ice, idx, nval);
153 wm_put_nocache(ice, idx, nval | 0x100);
154 change = 1;
155 }
156 }
157 mutex_unlock(&ice->gpio_mutex);
158 return change;
159}
160
161
162
163
164
165#define ADC_0dB 0xcf
166#define ADC_RES 128
167#define ADC_MIN (ADC_0dB - ADC_RES)
168
169static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
170{
171 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
172 uinfo->count = 2;
173 uinfo->value.integer.min = 0;
174 uinfo->value.integer.max = ADC_RES;
175 return 0;
176}
177
178static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
179{
180 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
181 unsigned short val;
182 int i;
183
184 mutex_lock(&ice->gpio_mutex);
185 for (i = 0; i < 2; i++) {
186 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
187 val = val > ADC_MIN ? (val - ADC_MIN) : 0;
188 ucontrol->value.integer.value[i] = val;
189 }
190 mutex_unlock(&ice->gpio_mutex);
191 return 0;
192}
193
194static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
195{
196 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
197 unsigned short ovol, nvol;
198 int i, idx, change = 0;
199
200 mutex_lock(&ice->gpio_mutex);
201 for (i = 0; i < 2; i++) {
202 nvol = ucontrol->value.integer.value[i];
203 nvol = nvol ? (nvol + ADC_MIN) : 0;
204 idx = WM_ADC_ATTEN_L + i;
205 ovol = wm_get(ice, idx) & 0xff;
206 if (ovol != nvol) {
207 wm_put(ice, idx, nvol);
208 change = 1;
209 }
210 }
211 mutex_unlock(&ice->gpio_mutex);
212 return change;
213}
214
215
216
217
218#define wm_adc_mux_info snd_ctl_boolean_mono_info
219
220static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
221{
222 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
223 int bit = kcontrol->private_value;
224
225 mutex_lock(&ice->gpio_mutex);
226 ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
227 mutex_unlock(&ice->gpio_mutex);
228 return 0;
229}
230
231static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
232{
233 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
234 int bit = kcontrol->private_value;
235 unsigned short oval, nval;
236 int change;
237
238 mutex_lock(&ice->gpio_mutex);
239 nval = oval = wm_get(ice, WM_ADC_MUX);
240 if (ucontrol->value.integer.value[0])
241 nval |= (1 << bit);
242 else
243 nval &= ~(1 << bit);
244 change = nval != oval;
245 if (change) {
246 wm_put(ice, WM_ADC_MUX, nval);
247 }
248 mutex_unlock(&ice->gpio_mutex);
249 return change;
250}
251
252
253
254
255#define wm_bypass_info snd_ctl_boolean_mono_info
256
257static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
258{
259 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
260
261 mutex_lock(&ice->gpio_mutex);
262 ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
263 mutex_unlock(&ice->gpio_mutex);
264 return 0;
265}
266
267static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
268{
269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
270 unsigned short val, oval;
271 int change = 0;
272
273 mutex_lock(&ice->gpio_mutex);
274 val = oval = wm_get(ice, WM_OUT_MUX);
275 if (ucontrol->value.integer.value[0])
276 val |= 0x04;
277 else
278 val &= ~0x04;
279 if (val != oval) {
280 wm_put(ice, WM_OUT_MUX, val);
281 change = 1;
282 }
283 mutex_unlock(&ice->gpio_mutex);
284 return change;
285}
286
287
288
289
290#define wm_chswap_info snd_ctl_boolean_mono_info
291
292static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
293{
294 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
295
296 mutex_lock(&ice->gpio_mutex);
297 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
298 mutex_unlock(&ice->gpio_mutex);
299 return 0;
300}
301
302static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
303{
304 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
305 unsigned short val, oval;
306 int change = 0;
307
308 mutex_lock(&ice->gpio_mutex);
309 oval = wm_get(ice, WM_DAC_CTRL1);
310 val = oval & 0x0f;
311 if (ucontrol->value.integer.value[0])
312 val |= 0x60;
313 else
314 val |= 0x90;
315 if (val != oval) {
316 wm_put(ice, WM_DAC_CTRL1, val);
317 wm_put_nocache(ice, WM_DAC_CTRL1, val);
318 change = 1;
319 }
320 mutex_unlock(&ice->gpio_mutex);
321 return change;
322}
323
324
325
326
327static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
328{
329 unsigned int tmp = snd_ice1712_gpio_read(ice);
330 if (val)
331 tmp |= bit;
332 else
333 tmp &= ~bit;
334 snd_ice1712_gpio_write(ice, tmp);
335}
336
337static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
338{
339 int i;
340 for (i = 0; i < 8; i++) {
341 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
342 udelay(1);
343 set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
344 udelay(1);
345 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
346 udelay(1);
347 data <<= 1;
348 }
349}
350
351static unsigned int spi_read_byte(struct snd_ice1712 *ice)
352{
353 int i;
354 unsigned int val = 0;
355
356 for (i = 0; i < 8; i++) {
357 val <<= 1;
358 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
359 udelay(1);
360 if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
361 val |= 1;
362 udelay(1);
363 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
364 udelay(1);
365 }
366 return val;
367}
368
369
370static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
371{
372 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
373 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
374 set_gpio_bit(ice, PONTIS_CS_CS, 0);
375 spi_send_byte(ice, dev & ~1);
376 spi_send_byte(ice, reg);
377 spi_send_byte(ice, data);
378
379 set_gpio_bit(ice, PONTIS_CS_CS, 1);
380 udelay(1);
381
382 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
383 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
384}
385
386static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
387{
388 unsigned int val;
389 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
390 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
391 set_gpio_bit(ice, PONTIS_CS_CS, 0);
392 spi_send_byte(ice, dev & ~1);
393 spi_send_byte(ice, reg);
394
395 set_gpio_bit(ice, PONTIS_CS_CS, 1);
396 udelay(1);
397 set_gpio_bit(ice, PONTIS_CS_CS, 0);
398 spi_send_byte(ice, dev | 1);
399 val = spi_read_byte(ice);
400
401 set_gpio_bit(ice, PONTIS_CS_CS, 1);
402 udelay(1);
403
404 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
405 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
406 return val;
407}
408
409
410
411
412
413static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
414{
415 static const char * const texts[] = {
416 "Coax",
417 "Optical",
418 "CD",
419 };
420 return snd_ctl_enum_info(uinfo, 1, 3, texts);
421}
422
423static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
424{
425 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
426
427 mutex_lock(&ice->gpio_mutex);
428 ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
429 mutex_unlock(&ice->gpio_mutex);
430 return 0;
431}
432
433static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
434{
435 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
436 unsigned char val;
437 int change = 0;
438
439 mutex_lock(&ice->gpio_mutex);
440 if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
441 ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
442 val = 0x80 | (ice->gpio.saved[0] << 3);
443 spi_write(ice, CS_DEV, 0x04, val);
444 change = 1;
445 }
446 mutex_unlock(&ice->gpio_mutex);
447 return change;
448}
449
450
451
452
453
454static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
455{
456 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
457 uinfo->count = 1;
458 uinfo->value.integer.min = 0;
459 uinfo->value.integer.max = 0xffff;
460 return 0;
461}
462
463static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
464{
465 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
466 mutex_lock(&ice->gpio_mutex);
467
468 ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
469 mutex_unlock(&ice->gpio_mutex);
470 return 0;
471}
472
473static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
474{
475 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
476 unsigned int val;
477 int changed;
478 mutex_lock(&ice->gpio_mutex);
479
480 val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
481 changed = val != ice->gpio.write_mask;
482 ice->gpio.write_mask = val;
483 mutex_unlock(&ice->gpio_mutex);
484 return changed;
485}
486
487static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
488{
489 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
490 mutex_lock(&ice->gpio_mutex);
491
492 ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
493 mutex_unlock(&ice->gpio_mutex);
494 return 0;
495}
496
497static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
498{
499 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
500 unsigned int val;
501 int changed;
502 mutex_lock(&ice->gpio_mutex);
503
504 val = ucontrol->value.integer.value[0] & 0xff0f;
505 changed = (val != ice->gpio.direction);
506 ice->gpio.direction = val;
507 mutex_unlock(&ice->gpio_mutex);
508 return changed;
509}
510
511static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
512{
513 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
514 mutex_lock(&ice->gpio_mutex);
515 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
516 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
517 ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
518 mutex_unlock(&ice->gpio_mutex);
519 return 0;
520}
521
522static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
523{
524 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
525 unsigned int val, nval;
526 int changed = 0;
527 mutex_lock(&ice->gpio_mutex);
528 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
529 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
530 val = snd_ice1712_gpio_read(ice) & 0xffff;
531 nval = ucontrol->value.integer.value[0] & 0xffff;
532 if (val != nval) {
533 snd_ice1712_gpio_write(ice, nval);
534 changed = 1;
535 }
536 mutex_unlock(&ice->gpio_mutex);
537 return changed;
538}
539
540static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1);
541
542
543
544
545
546static struct snd_kcontrol_new pontis_controls[] = {
547 {
548 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
549 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
550 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
551 .name = "PCM Playback Volume",
552 .info = wm_dac_vol_info,
553 .get = wm_dac_vol_get,
554 .put = wm_dac_vol_put,
555 .tlv = { .p = db_scale_volume },
556 },
557 {
558 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
559 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
560 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
561 .name = "Capture Volume",
562 .info = wm_adc_vol_info,
563 .get = wm_adc_vol_get,
564 .put = wm_adc_vol_put,
565 .tlv = { .p = db_scale_volume },
566 },
567 {
568 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
569 .name = "CD Capture Switch",
570 .info = wm_adc_mux_info,
571 .get = wm_adc_mux_get,
572 .put = wm_adc_mux_put,
573 .private_value = 0,
574 },
575 {
576 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
577 .name = "Line Capture Switch",
578 .info = wm_adc_mux_info,
579 .get = wm_adc_mux_get,
580 .put = wm_adc_mux_put,
581 .private_value = 1,
582 },
583 {
584 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
585 .name = "Analog Bypass Switch",
586 .info = wm_bypass_info,
587 .get = wm_bypass_get,
588 .put = wm_bypass_put,
589 },
590 {
591 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
592 .name = "Swap Output Channels",
593 .info = wm_chswap_info,
594 .get = wm_chswap_get,
595 .put = wm_chswap_put,
596 },
597 {
598 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
599 .name = "IEC958 Input Source",
600 .info = cs_source_info,
601 .get = cs_source_get,
602 .put = cs_source_put,
603 },
604
605 {
606 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
607 .name = "GPIO Mask",
608 .info = pontis_gpio_mask_info,
609 .get = pontis_gpio_mask_get,
610 .put = pontis_gpio_mask_put,
611 },
612 {
613 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
614 .name = "GPIO Direction",
615 .info = pontis_gpio_mask_info,
616 .get = pontis_gpio_dir_get,
617 .put = pontis_gpio_dir_put,
618 },
619 {
620 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
621 .name = "GPIO Data",
622 .info = pontis_gpio_mask_info,
623 .get = pontis_gpio_data_get,
624 .put = pontis_gpio_data_put,
625 },
626};
627
628
629
630
631
632static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
633{
634 struct snd_ice1712 *ice = entry->private_data;
635 char line[64];
636 unsigned int reg, val;
637 mutex_lock(&ice->gpio_mutex);
638 while (!snd_info_get_line(buffer, line, sizeof(line))) {
639 if (sscanf(line, "%x %x", ®, &val) != 2)
640 continue;
641 if (reg <= 0x17 && val <= 0xffff)
642 wm_put(ice, reg, val);
643 }
644 mutex_unlock(&ice->gpio_mutex);
645}
646
647static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
648{
649 struct snd_ice1712 *ice = entry->private_data;
650 int reg, val;
651
652 mutex_lock(&ice->gpio_mutex);
653 for (reg = 0; reg <= 0x17; reg++) {
654 val = wm_get(ice, reg);
655 snd_iprintf(buffer, "%02x = %04x\n", reg, val);
656 }
657 mutex_unlock(&ice->gpio_mutex);
658}
659
660static void wm_proc_init(struct snd_ice1712 *ice)
661{
662 struct snd_info_entry *entry;
663 if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
664 snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
665 entry->mode |= S_IWUSR;
666 entry->c.text.write = wm_proc_regs_write;
667 }
668}
669
670static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
671{
672 struct snd_ice1712 *ice = entry->private_data;
673 int reg, val;
674
675 mutex_lock(&ice->gpio_mutex);
676 for (reg = 0; reg <= 0x26; reg++) {
677 val = spi_read(ice, CS_DEV, reg);
678 snd_iprintf(buffer, "%02x = %02x\n", reg, val);
679 }
680 val = spi_read(ice, CS_DEV, 0x7f);
681 snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
682 mutex_unlock(&ice->gpio_mutex);
683}
684
685static void cs_proc_init(struct snd_ice1712 *ice)
686{
687 struct snd_info_entry *entry;
688 if (! snd_card_proc_new(ice->card, "cs_codec", &entry))
689 snd_info_set_text_ops(entry, ice, cs_proc_regs_read);
690}
691
692
693static int pontis_add_controls(struct snd_ice1712 *ice)
694{
695 unsigned int i;
696 int err;
697
698 for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
699 err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
700 if (err < 0)
701 return err;
702 }
703
704 wm_proc_init(ice);
705 cs_proc_init(ice);
706
707 return 0;
708}
709
710
711
712
713
714static int pontis_init(struct snd_ice1712 *ice)
715{
716 static const unsigned short wm_inits[] = {
717
718 WM_ADC_MUX, 0x00c0,
719 WM_DAC_MUTE, 0x0001,
720 WM_DAC_CTRL1, 0x0000,
721
722 WM_POWERDOWN, 0x0008,
723 WM_RESET, 0x0000,
724 };
725 static const unsigned short wm_inits2[] = {
726 WM_MASTER_CTRL, 0x0022,
727 WM_DAC_INT, 0x0022,
728 WM_ADC_INT, 0x0022,
729 WM_DAC_CTRL1, 0x0090,
730 WM_OUT_MUX, 0x0001,
731 WM_HP_ATTEN_L, 0x0179,
732 WM_HP_ATTEN_R, 0x0179,
733 WM_DAC_ATTEN_L, 0x0000,
734 WM_DAC_ATTEN_L, 0x0100,
735 WM_DAC_ATTEN_R, 0x0000,
736 WM_DAC_ATTEN_R, 0x0100,
737
738 WM_PHASE_SWAP, 0x0000,
739 WM_DAC_CTRL2, 0x0000,
740 WM_ADC_ATTEN_L, 0x0000,
741 WM_ADC_ATTEN_R, 0x0000,
742#if 0
743 WM_ALC_CTRL1, 0x007b,
744 WM_ALC_CTRL2, 0x0000,
745 WM_ALC_CTRL3, 0x0000,
746 WM_NOISE_GATE, 0x0000,
747#endif
748 WM_DAC_MUTE, 0x0000,
749 WM_ADC_MUX, 0x0003,
750 };
751 static const unsigned char cs_inits[] = {
752 0x04, 0x80,
753 0x05, 0x05,
754 0x01, 0x00,
755 0x02, 0x00,
756 0x03, 0x00,
757 };
758 unsigned int i;
759
760 ice->vt1720 = 1;
761 ice->num_total_dacs = 2;
762 ice->num_total_adcs = 2;
763
764
765 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
766 if (! ice->akm)
767 return -ENOMEM;
768 ice->akm_codecs = 1;
769
770
771
772
773 ice->gpio.saved[0] = 0;
774
775
776 for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
777 wm_put(ice, wm_inits[i], wm_inits[i+1]);
778 schedule_timeout_uninterruptible(1);
779 for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
780 wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
781
782
783
784 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
785 mdelay(5);
786
787 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
788
789 for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
790 spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
791
792 return 0;
793}
794
795
796
797
798
799
800
801static unsigned char pontis_eeprom[] = {
802 [ICE_EEP2_SYSCONF] = 0x08,
803 [ICE_EEP2_ACLINK] = 0x80,
804 [ICE_EEP2_I2S] = 0xf8,
805 [ICE_EEP2_SPDIF] = 0xc3,
806 [ICE_EEP2_GPIO_DIR] = 0x07,
807 [ICE_EEP2_GPIO_DIR1] = 0x00,
808 [ICE_EEP2_GPIO_DIR2] = 0x00,
809 [ICE_EEP2_GPIO_MASK] = 0x0f,
810 [ICE_EEP2_GPIO_MASK1] = 0xff,
811 [ICE_EEP2_GPIO_MASK2] = 0x00,
812 [ICE_EEP2_GPIO_STATE] = 0x06,
813 [ICE_EEP2_GPIO_STATE1] = 0x00,
814 [ICE_EEP2_GPIO_STATE2] = 0x00,
815};
816
817
818struct snd_ice1712_card_info snd_vt1720_pontis_cards[] = {
819 {
820 .subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
821 .name = "Pontis MS300",
822 .model = "ms300",
823 .chip_init = pontis_init,
824 .build_controls = pontis_add_controls,
825 .eeprom_size = sizeof(pontis_eeprom),
826 .eeprom_data = pontis_eeprom,
827 },
828 { }
829};
830