LXR linux/arch/sh/kernel/cpu/clock-cpg.c

   1// SPDX-License-Identifier: GPL-2.0
   2#include <linux/clk.h>
   3#include <linux/compiler.h>
   4#include <linux/slab.h>
   5#include <linux/io.h>
   6#include <linux/clkdev.h>
   7#include <asm/clock.h>
   8
   9static struct clk master_clk = {
  10        .flags          = CLK_ENABLE_ON_INIT,
  11        .rate           = CONFIG_SH_PCLK_FREQ,
  12};
  13
  14static struct clk peripheral_clk = {
  15        .parent         = &master_clk,
  16        .flags          = CLK_ENABLE_ON_INIT,
  17};
  18
  19static struct clk bus_clk = {
  20        .parent         = &master_clk,
  21        .flags          = CLK_ENABLE_ON_INIT,
  22};
  23
  24static struct clk cpu_clk = {
  25        .parent         = &master_clk,
  26        .flags          = CLK_ENABLE_ON_INIT,
  27};
  28
  29/*
  30 * The ordering of these clocks matters, do not change it.
  31 */
  32static struct clk *onchip_clocks[] = {
  33        &master_clk,
  34        &peripheral_clk,
  35        &bus_clk,
  36        &cpu_clk,
  37};
  38
  39static struct clk_lookup lookups[] = {
  40        /* main clocks */
  41        CLKDEV_CON_ID("master_clk", &master_clk),
  42        CLKDEV_CON_ID("peripheral_clk", &peripheral_clk),
  43        CLKDEV_CON_ID("bus_clk", &bus_clk),
  44        CLKDEV_CON_ID("cpu_clk", &cpu_clk),
  45};
  46
  47int __init __deprecated cpg_clk_init(void)
  48{
  49        int i, ret = 0;
  50
  51        for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
  52                struct clk *clk = onchip_clocks[i];
  53                arch_init_clk_ops(&clk->ops, i);
  54                if (clk->ops)
  55                        ret |= clk_register(clk);
  56        }
  57
  58        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
  59
  60        clk_add_alias("fck", "sh-tmu-sh3.0", "peripheral_clk", NULL);
  61        clk_add_alias("fck", "sh-tmu.0", "peripheral_clk", NULL);
  62        clk_add_alias("fck", "sh-tmu.1", "peripheral_clk", NULL);
  63        clk_add_alias("fck", "sh-tmu.2", "peripheral_clk", NULL);
  64        clk_add_alias("fck", "sh-mtu2", "peripheral_clk", NULL);
  65        clk_add_alias("fck", "sh-cmt-16.0", "peripheral_clk", NULL);
  66        clk_add_alias("fck", "sh-cmt-32.0", "peripheral_clk", NULL);
  67
  68        return ret;
  69}
  70
  71/*
  72 * Placeholder for compatibility, until the lazy CPUs do this
  73 * on their own.
  74 */
  75int __init __weak arch_clk_init(void)
  76{
  77        return cpg_clk_init();
  78}
  79