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47#include <dt-bindings/firmware/imx/rsrc.h>
48#include <linux/firmware/imx/sci.h>
49#include <linux/io.h>
50#include <linux/module.h>
51#include <linux/of.h>
52#include <linux/of_address.h>
53#include <linux/of_platform.h>
54#include <linux/platform_device.h>
55#include <linux/pm.h>
56#include <linux/pm_domain.h>
57#include <linux/slab.h>
58
59
60struct imx_sc_msg_req_set_resource_power_mode {
61 struct imx_sc_rpc_msg hdr;
62 u16 resource;
63 u8 mode;
64} __packed;
65
66#define IMX_SCU_PD_NAME_SIZE 20
67struct imx_sc_pm_domain {
68 struct generic_pm_domain pd;
69 char name[IMX_SCU_PD_NAME_SIZE];
70 u32 rsrc;
71};
72
73struct imx_sc_pd_range {
74 char *name;
75 u32 rsrc;
76 u8 num;
77 bool postfix;
78};
79
80struct imx_sc_pd_soc {
81 const struct imx_sc_pd_range *pd_ranges;
82 u8 num_ranges;
83};
84
85static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
86
87 { "lsio-pwm", IMX_SC_R_PWM_0, 8, 1 },
88 { "lsio-gpio", IMX_SC_R_GPIO_0, 8, 1 },
89 { "lsio-gpt", IMX_SC_R_GPT_0, 5, 1 },
90 { "lsio-kpp", IMX_SC_R_KPP, 1, 0 },
91 { "lsio-fspi", IMX_SC_R_FSPI_0, 2, 1 },
92 { "lsio-mu", IMX_SC_R_MU_0A, 14, 1 },
93
94
95 { "con-usb", IMX_SC_R_USB_0, 2, 1 },
96 { "con-usb0phy", IMX_SC_R_USB_0_PHY, 1, 0 },
97 { "con-usb2", IMX_SC_R_USB_2, 1, 0 },
98 { "con-usb2phy", IMX_SC_R_USB_2_PHY, 1, 0 },
99 { "con-sdhc", IMX_SC_R_SDHC_0, 3, 1 },
100 { "con-enet", IMX_SC_R_ENET_0, 2, 1 },
101 { "con-nand", IMX_SC_R_NAND, 1, 0 },
102 { "con-mlb", IMX_SC_R_MLB_0, 1, 1 },
103
104
105 { "adma-audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, 0 },
106 { "adma-audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, 0 },
107 { "adma-audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, 0 },
108 { "adma-dma0-ch", IMX_SC_R_DMA_0_CH0, 16, 1 },
109 { "adma-dma1-ch", IMX_SC_R_DMA_1_CH0, 16, 1 },
110 { "adma-dma2-ch", IMX_SC_R_DMA_2_CH0, 5, 1 },
111 { "adma-asrc0", IMX_SC_R_ASRC_0, 1, 0 },
112 { "adma-asrc1", IMX_SC_R_ASRC_1, 1, 0 },
113 { "adma-esai0", IMX_SC_R_ESAI_0, 1, 0 },
114 { "adma-spdif0", IMX_SC_R_SPDIF_0, 1, 0 },
115 { "adma-sai", IMX_SC_R_SAI_0, 3, 1 },
116 { "adma-amix", IMX_SC_R_AMIX, 1, 0 },
117 { "adma-mqs0", IMX_SC_R_MQS_0, 1, 0 },
118 { "adma-dsp", IMX_SC_R_DSP, 1, 0 },
119 { "adma-dsp-ram", IMX_SC_R_DSP_RAM, 1, 0 },
120 { "adma-can", IMX_SC_R_CAN_0, 3, 1 },
121 { "adma-ftm", IMX_SC_R_FTM_0, 2, 1 },
122 { "adma-lpi2c", IMX_SC_R_I2C_0, 4, 1 },
123 { "adma-adc", IMX_SC_R_ADC_0, 1, 1 },
124 { "adma-lcd", IMX_SC_R_LCD_0, 1, 1 },
125 { "adma-lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, 1 },
126 { "adma-lpuart", IMX_SC_R_UART_0, 4, 1 },
127 { "adma-lpspi", IMX_SC_R_SPI_0, 4, 1 },
128
129
130 { "vpu", IMX_SC_R_VPU, 1, 0 },
131 { "vpu-pid", IMX_SC_R_VPU_PID0, 8, 1 },
132 { "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, 0 },
133 { "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, 0 },
134
135
136 { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, 1 },
137
138
139 { "hsio-pcie-b", IMX_SC_R_PCIE_B, 1, 0 },
140 { "hsio-serdes-1", IMX_SC_R_SERDES_1, 1, 0 },
141 { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, 0 },
142
143
144 { "mipi0", IMX_SC_R_MIPI_0, 1, 0 },
145 { "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, 0 },
146 { "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, 1 },
147 { "lvds0", IMX_SC_R_LVDS_0, 1, 0 },
148
149
150 { "dc0", IMX_SC_R_DC_0, 1, 0 },
151 { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, 1 },
152};
153
154static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
155 .pd_ranges = imx8qxp_scu_pd_ranges,
156 .num_ranges = ARRAY_SIZE(imx8qxp_scu_pd_ranges),
157};
158
159static struct imx_sc_ipc *pm_ipc_handle;
160
161static inline struct imx_sc_pm_domain *
162to_imx_sc_pd(struct generic_pm_domain *genpd)
163{
164 return container_of(genpd, struct imx_sc_pm_domain, pd);
165}
166
167static int imx_sc_pd_power(struct generic_pm_domain *domain, bool power_on)
168{
169 struct imx_sc_msg_req_set_resource_power_mode msg;
170 struct imx_sc_rpc_msg *hdr = &msg.hdr;
171 struct imx_sc_pm_domain *pd;
172 int ret;
173
174 pd = to_imx_sc_pd(domain);
175
176 hdr->ver = IMX_SC_RPC_VERSION;
177 hdr->svc = IMX_SC_RPC_SVC_PM;
178 hdr->func = IMX_SC_PM_FUNC_SET_RESOURCE_POWER_MODE;
179 hdr->size = 2;
180
181 msg.resource = pd->rsrc;
182 msg.mode = power_on ? IMX_SC_PM_PW_MODE_ON : IMX_SC_PM_PW_MODE_LP;
183
184 ret = imx_scu_call_rpc(pm_ipc_handle, &msg, true);
185 if (ret)
186 dev_err(&domain->dev, "failed to power %s resource %d ret %d\n",
187 power_on ? "up" : "off", pd->rsrc, ret);
188
189 return ret;
190}
191
192static int imx_sc_pd_power_on(struct generic_pm_domain *domain)
193{
194 return imx_sc_pd_power(domain, true);
195}
196
197static int imx_sc_pd_power_off(struct generic_pm_domain *domain)
198{
199 return imx_sc_pd_power(domain, false);
200}
201
202static struct generic_pm_domain *imx_scu_pd_xlate(struct of_phandle_args *spec,
203 void *data)
204{
205 struct generic_pm_domain *domain = ERR_PTR(-ENOENT);
206 struct genpd_onecell_data *pd_data = data;
207 unsigned int i;
208
209 for (i = 0; i < pd_data->num_domains; i++) {
210 struct imx_sc_pm_domain *sc_pd;
211
212 sc_pd = to_imx_sc_pd(pd_data->domains[i]);
213 if (sc_pd->rsrc == spec->args[0]) {
214 domain = &sc_pd->pd;
215 break;
216 }
217 }
218
219 return domain;
220}
221
222static struct imx_sc_pm_domain *
223imx_scu_add_pm_domain(struct device *dev, int idx,
224 const struct imx_sc_pd_range *pd_ranges)
225{
226 struct imx_sc_pm_domain *sc_pd;
227 int ret;
228
229 sc_pd = devm_kzalloc(dev, sizeof(*sc_pd), GFP_KERNEL);
230 if (!sc_pd)
231 return ERR_PTR(-ENOMEM);
232
233 sc_pd->rsrc = pd_ranges->rsrc + idx;
234 sc_pd->pd.power_off = imx_sc_pd_power_off;
235 sc_pd->pd.power_on = imx_sc_pd_power_on;
236
237 if (pd_ranges->postfix)
238 snprintf(sc_pd->name, sizeof(sc_pd->name),
239 "%s%i", pd_ranges->name, idx);
240 else
241 snprintf(sc_pd->name, sizeof(sc_pd->name),
242 "%s", pd_ranges->name);
243
244 sc_pd->pd.name = sc_pd->name;
245
246 if (sc_pd->rsrc >= IMX_SC_R_LAST) {
247 dev_warn(dev, "invalid pd %s rsrc id %d found",
248 sc_pd->name, sc_pd->rsrc);
249
250 devm_kfree(dev, sc_pd);
251 return NULL;
252 }
253
254 ret = pm_genpd_init(&sc_pd->pd, NULL, true);
255 if (ret) {
256 dev_warn(dev, "failed to init pd %s rsrc id %d",
257 sc_pd->name, sc_pd->rsrc);
258 devm_kfree(dev, sc_pd);
259 return NULL;
260 }
261
262 return sc_pd;
263}
264
265static int imx_scu_init_pm_domains(struct device *dev,
266 const struct imx_sc_pd_soc *pd_soc)
267{
268 const struct imx_sc_pd_range *pd_ranges = pd_soc->pd_ranges;
269 struct generic_pm_domain **domains;
270 struct genpd_onecell_data *pd_data;
271 struct imx_sc_pm_domain *sc_pd;
272 u32 count = 0;
273 int i, j;
274
275 for (i = 0; i < pd_soc->num_ranges; i++)
276 count += pd_ranges[i].num;
277
278 domains = devm_kcalloc(dev, count, sizeof(*domains), GFP_KERNEL);
279 if (!domains)
280 return -ENOMEM;
281
282 pd_data = devm_kzalloc(dev, sizeof(*pd_data), GFP_KERNEL);
283 if (!pd_data)
284 return -ENOMEM;
285
286 count = 0;
287 for (i = 0; i < pd_soc->num_ranges; i++) {
288 for (j = 0; j < pd_ranges[i].num; j++) {
289 sc_pd = imx_scu_add_pm_domain(dev, j, &pd_ranges[i]);
290 if (IS_ERR_OR_NULL(sc_pd))
291 continue;
292
293 domains[count++] = &sc_pd->pd;
294 dev_dbg(dev, "added power domain %s\n", sc_pd->pd.name);
295 }
296 }
297
298 pd_data->domains = domains;
299 pd_data->num_domains = count;
300 pd_data->xlate = imx_scu_pd_xlate;
301
302 of_genpd_add_provider_onecell(dev->of_node, pd_data);
303
304 return 0;
305}
306
307static int imx_sc_pd_probe(struct platform_device *pdev)
308{
309 const struct imx_sc_pd_soc *pd_soc;
310 int ret;
311
312 ret = imx_scu_get_handle(&pm_ipc_handle);
313 if (ret)
314 return ret;
315
316 pd_soc = of_device_get_match_data(&pdev->dev);
317 if (!pd_soc)
318 return -ENODEV;
319
320 return imx_scu_init_pm_domains(&pdev->dev, pd_soc);
321}
322
323static const struct of_device_id imx_sc_pd_match[] = {
324 { .compatible = "fsl,imx8qxp-scu-pd", &imx8qxp_scu_pd},
325 { }
326};
327
328static struct platform_driver imx_sc_pd_driver = {
329 .driver = {
330 .name = "imx-scu-pd",
331 .of_match_table = imx_sc_pd_match,
332 },
333 .probe = imx_sc_pd_probe,
334};
335builtin_platform_driver(imx_sc_pd_driver);
336
337MODULE_AUTHOR("Dong Aisheng <aisheng.dong@nxp.com>");
338MODULE_DESCRIPTION("IMX SCU Power Domain driver");
339MODULE_LICENSE("GPL v2");
340