LXR linux/drivers/gpu/drm/amd/display/dc/i2caux/i2c_sw

   1/*
   2 * Copyright 2012-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __DAL_I2C_SW_ENGINE_H__
  27#define __DAL_I2C_SW_ENGINE_H__
  28
  29enum {
  30        I2C_SW_RETRIES = 10,
  31        I2C_SW_SCL_READ_RETRIES = 128,
  32        /* following value is in microseconds */
  33        I2C_SW_TIMEOUT_DELAY = 3000
  34};
  35
  36struct i2c_sw_engine;
  37
  38struct i2c_sw_engine {
  39        struct i2c_engine base;
  40        uint32_t clock_delay;
  41        /* Values below are in KHz */
  42        uint32_t speed;
  43        uint32_t default_speed;
  44};
  45
  46struct i2c_sw_engine_create_arg {
  47        uint32_t default_speed;
  48        struct dc_context *ctx;
  49};
  50
  51void dal_i2c_sw_engine_construct(
  52        struct i2c_sw_engine *engine,
  53        const struct i2c_sw_engine_create_arg *arg);
  54
  55bool dal_i2caux_i2c_sw_engine_acquire_engine(
  56        struct i2c_engine *engine,
  57        struct ddc *ddc_handle);
  58
  59void dal_i2c_sw_engine_destruct(
  60        struct i2c_sw_engine *engine);
  61
  62struct i2c_engine *dal_i2c_sw_engine_create(
  63        const struct i2c_sw_engine_create_arg *arg);
  64enum i2caux_engine_type dal_i2c_sw_engine_get_engine_type(
  65        const struct engine *engine);
  66bool dal_i2c_sw_engine_submit_request(
  67        struct engine *ptr,
  68        struct i2caux_transaction_request *i2caux_request,
  69        bool middle_of_transaction);
  70uint32_t dal_i2c_sw_engine_get_speed(
  71        const struct i2c_engine *engine);
  72void dal_i2c_sw_engine_set_speed(
  73        struct i2c_engine *ptr,
  74        uint32_t speed);
  75void dal_i2c_sw_engine_submit_channel_request(
  76        struct i2c_engine *ptr,
  77        struct i2c_request_transaction_data *req);
  78enum i2c_channel_operation_result dal_i2c_sw_engine_get_channel_status(
  79        struct i2c_engine *engine,
  80        uint8_t *returned_bytes);
  81#endif
  82