LXR linux/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h

   1/*
   2 * Copyright 2012-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __DAL_DCHUBBUB_H__
  27#define __DAL_DCHUBBUB_H__
  28
  29
  30enum dcc_control {
  31        dcc_control__256_256_xxx,
  32        dcc_control__128_128_xxx,
  33        dcc_control__256_64_64,
  34};
  35
  36enum segment_order {
  37        segment_order__na,
  38        segment_order__contiguous,
  39        segment_order__non_contiguous,
  40};
  41
  42
  43struct hubbub_funcs {
  44        void (*update_dchub)(
  45                        struct hubbub *hubbub,
  46                        struct dchub_init_data *dh_data);
  47
  48        bool (*get_dcc_compression_cap)(struct hubbub *hubbub,
  49                        const struct dc_dcc_surface_param *input,
  50                        struct dc_surface_dcc_cap *output);
  51
  52        bool (*dcc_support_swizzle)(
  53                        enum swizzle_mode_values swizzle,
  54                        unsigned int bytes_per_element,
  55                        enum segment_order *segment_order_horz,
  56                        enum segment_order *segment_order_vert);
  57
  58        bool (*dcc_support_pixel_format)(
  59                        enum surface_pixel_format format,
  60                        unsigned int *bytes_per_element);
  61};
  62
  63
  64#endif
  65