LXR linux/drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c

   1/*
   2 * Copyright 2015 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 */
  23
  24#include <linux/types.h>
  25#include "atom-types.h"
  26#include "atombios.h"
  27#include "pppcielanes.h"
  28
  29/** \file
  30 * Functions related to PCIe lane changes.
  31 */
  32
  33/* For converting from number of lanes to lane bits.  */
  34static const unsigned char pp_r600_encode_lanes[] = {
  35        0,          /*  0 Not Supported  */
  36        1,          /*  1 Lane  */
  37        2,          /*  2 Lanes  */
  38        0,          /*  3 Not Supported  */
  39        3,          /*  4 Lanes  */
  40        0,          /*  5 Not Supported  */
  41        0,          /*  6 Not Supported  */
  42        0,          /*  7 Not Supported  */
  43        4,          /*  8 Lanes  */
  44        0,          /*  9 Not Supported  */
  45        0,          /* 10 Not Supported  */
  46        0,          /* 11 Not Supported  */
  47        5,          /* 12 Lanes (Not actually supported)  */
  48        0,          /* 13 Not Supported  */
  49        0,          /* 14 Not Supported  */
  50        0,          /* 15 Not Supported  */
  51        6           /* 16 Lanes  */
  52};
  53
  54static const unsigned char pp_r600_decoded_lanes[8] = { 16, 1, 2, 4, 8, 12, 16, };
  55
  56uint8_t encode_pcie_lane_width(uint32_t num_lanes)
  57{
  58        return pp_r600_encode_lanes[num_lanes];
  59}
  60
  61uint8_t decode_pcie_lane_width(uint32_t num_lanes)
  62{
  63        return pp_r600_decoded_lanes[num_lanes];
  64}
  65