linux/drivers/gpu/drm/exynos/exynos_drm_g2d.c
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   1/*
   2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
   3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License version 2 as
   7 * published by the Free Software Foundationr
   8 */
   9
  10#include <linux/kernel.h>
  11#include <linux/clk.h>
  12#include <linux/component.h>
  13#include <linux/err.h>
  14#include <linux/interrupt.h>
  15#include <linux/io.h>
  16#include <linux/platform_device.h>
  17#include <linux/pm_runtime.h>
  18#include <linux/slab.h>
  19#include <linux/workqueue.h>
  20#include <linux/dma-mapping.h>
  21#include <linux/of.h>
  22
  23#include <drm/drmP.h>
  24#include <drm/exynos_drm.h>
  25#include "exynos_drm_drv.h"
  26#include "exynos_drm_g2d.h"
  27#include "exynos_drm_gem.h"
  28
  29#define G2D_HW_MAJOR_VER                4
  30#define G2D_HW_MINOR_VER                1
  31
  32/* vaild register range set from user: 0x0104 ~ 0x0880 */
  33#define G2D_VALID_START                 0x0104
  34#define G2D_VALID_END                   0x0880
  35
  36/* general registers */
  37#define G2D_SOFT_RESET                  0x0000
  38#define G2D_INTEN                       0x0004
  39#define G2D_INTC_PEND                   0x000C
  40#define G2D_DMA_SFR_BASE_ADDR           0x0080
  41#define G2D_DMA_COMMAND                 0x0084
  42#define G2D_DMA_STATUS                  0x008C
  43#define G2D_DMA_HOLD_CMD                0x0090
  44
  45/* command registers */
  46#define G2D_BITBLT_START                0x0100
  47
  48/* registers for base address */
  49#define G2D_SRC_BASE_ADDR               0x0304
  50#define G2D_SRC_STRIDE                  0x0308
  51#define G2D_SRC_COLOR_MODE              0x030C
  52#define G2D_SRC_LEFT_TOP                0x0310
  53#define G2D_SRC_RIGHT_BOTTOM            0x0314
  54#define G2D_SRC_PLANE2_BASE_ADDR        0x0318
  55#define G2D_DST_BASE_ADDR               0x0404
  56#define G2D_DST_STRIDE                  0x0408
  57#define G2D_DST_COLOR_MODE              0x040C
  58#define G2D_DST_LEFT_TOP                0x0410
  59#define G2D_DST_RIGHT_BOTTOM            0x0414
  60#define G2D_DST_PLANE2_BASE_ADDR        0x0418
  61#define G2D_PAT_BASE_ADDR               0x0500
  62#define G2D_MSK_BASE_ADDR               0x0520
  63
  64/* G2D_SOFT_RESET */
  65#define G2D_SFRCLEAR                    (1 << 1)
  66#define G2D_R                           (1 << 0)
  67
  68/* G2D_INTEN */
  69#define G2D_INTEN_ACF                   (1 << 3)
  70#define G2D_INTEN_UCF                   (1 << 2)
  71#define G2D_INTEN_GCF                   (1 << 1)
  72#define G2D_INTEN_SCF                   (1 << 0)
  73
  74/* G2D_INTC_PEND */
  75#define G2D_INTP_ACMD_FIN               (1 << 3)
  76#define G2D_INTP_UCMD_FIN               (1 << 2)
  77#define G2D_INTP_GCMD_FIN               (1 << 1)
  78#define G2D_INTP_SCMD_FIN               (1 << 0)
  79
  80/* G2D_DMA_COMMAND */
  81#define G2D_DMA_HALT                    (1 << 2)
  82#define G2D_DMA_CONTINUE                (1 << 1)
  83#define G2D_DMA_START                   (1 << 0)
  84
  85/* G2D_DMA_STATUS */
  86#define G2D_DMA_LIST_DONE_COUNT         (0xFF << 17)
  87#define G2D_DMA_BITBLT_DONE_COUNT       (0xFFFF << 1)
  88#define G2D_DMA_DONE                    (1 << 0)
  89#define G2D_DMA_LIST_DONE_COUNT_OFFSET  17
  90
  91/* G2D_DMA_HOLD_CMD */
  92#define G2D_USER_HOLD                   (1 << 2)
  93#define G2D_LIST_HOLD                   (1 << 1)
  94#define G2D_BITBLT_HOLD                 (1 << 0)
  95
  96/* G2D_BITBLT_START */
  97#define G2D_START_CASESEL               (1 << 2)
  98#define G2D_START_NHOLT                 (1 << 1)
  99#define G2D_START_BITBLT                (1 << 0)
 100
 101/* buffer color format */
 102#define G2D_FMT_XRGB8888                0
 103#define G2D_FMT_ARGB8888                1
 104#define G2D_FMT_RGB565                  2
 105#define G2D_FMT_XRGB1555                3
 106#define G2D_FMT_ARGB1555                4
 107#define G2D_FMT_XRGB4444                5
 108#define G2D_FMT_ARGB4444                6
 109#define G2D_FMT_PACKED_RGB888           7
 110#define G2D_FMT_A8                      11
 111#define G2D_FMT_L8                      12
 112
 113/* buffer valid length */
 114#define G2D_LEN_MIN                     1
 115#define G2D_LEN_MAX                     8000
 116
 117#define G2D_CMDLIST_SIZE                (PAGE_SIZE / 4)
 118#define G2D_CMDLIST_NUM                 64
 119#define G2D_CMDLIST_POOL_SIZE           (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
 120#define G2D_CMDLIST_DATA_NUM            (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
 121
 122/* maximum buffer pool size of userptr is 64MB as default */
 123#define MAX_POOL                (64 * 1024 * 1024)
 124
 125enum {
 126        BUF_TYPE_GEM = 1,
 127        BUF_TYPE_USERPTR,
 128};
 129
 130enum g2d_reg_type {
 131        REG_TYPE_NONE = -1,
 132        REG_TYPE_SRC,
 133        REG_TYPE_SRC_PLANE2,
 134        REG_TYPE_DST,
 135        REG_TYPE_DST_PLANE2,
 136        REG_TYPE_PAT,
 137        REG_TYPE_MSK,
 138        MAX_REG_TYPE_NR
 139};
 140
 141enum g2d_flag_bits {
 142        /*
 143         * If set, suspends the runqueue worker after the currently
 144         * processed node is finished.
 145         */
 146        G2D_BIT_SUSPEND_RUNQUEUE,
 147        /*
 148         * If set, indicates that the engine is currently busy.
 149         */
 150        G2D_BIT_ENGINE_BUSY,
 151};
 152
 153/* cmdlist data structure */
 154struct g2d_cmdlist {
 155        u32             head;
 156        unsigned long   data[G2D_CMDLIST_DATA_NUM];
 157        u32             last;   /* last data offset */
 158};
 159
 160/*
 161 * A structure of buffer description
 162 *
 163 * @format: color format
 164 * @stride: buffer stride/pitch in bytes
 165 * @left_x: the x coordinates of left top corner
 166 * @top_y: the y coordinates of left top corner
 167 * @right_x: the x coordinates of right bottom corner
 168 * @bottom_y: the y coordinates of right bottom corner
 169 *
 170 */
 171struct g2d_buf_desc {
 172        unsigned int    format;
 173        unsigned int    stride;
 174        unsigned int    left_x;
 175        unsigned int    top_y;
 176        unsigned int    right_x;
 177        unsigned int    bottom_y;
 178};
 179
 180/*
 181 * A structure of buffer information
 182 *
 183 * @map_nr: manages the number of mapped buffers
 184 * @reg_types: stores regitster type in the order of requested command
 185 * @handles: stores buffer handle in its reg_type position
 186 * @types: stores buffer type in its reg_type position
 187 * @descs: stores buffer description in its reg_type position
 188 *
 189 */
 190struct g2d_buf_info {
 191        unsigned int            map_nr;
 192        enum g2d_reg_type       reg_types[MAX_REG_TYPE_NR];
 193        void                    *obj[MAX_REG_TYPE_NR];
 194        unsigned int            types[MAX_REG_TYPE_NR];
 195        struct g2d_buf_desc     descs[MAX_REG_TYPE_NR];
 196};
 197
 198struct drm_exynos_pending_g2d_event {
 199        struct drm_pending_event        base;
 200        struct drm_exynos_g2d_event     event;
 201};
 202
 203struct g2d_cmdlist_userptr {
 204        struct list_head        list;
 205        dma_addr_t              dma_addr;
 206        unsigned long           userptr;
 207        unsigned long           size;
 208        struct frame_vector     *vec;
 209        struct sg_table         *sgt;
 210        atomic_t                refcount;
 211        bool                    in_pool;
 212        bool                    out_of_list;
 213};
 214struct g2d_cmdlist_node {
 215        struct list_head        list;
 216        struct g2d_cmdlist      *cmdlist;
 217        dma_addr_t              dma_addr;
 218        struct g2d_buf_info     buf_info;
 219
 220        struct drm_exynos_pending_g2d_event     *event;
 221};
 222
 223struct g2d_runqueue_node {
 224        struct list_head        list;
 225        struct list_head        run_cmdlist;
 226        struct list_head        event_list;
 227        struct drm_file         *filp;
 228        pid_t                   pid;
 229        struct completion       complete;
 230        int                     async;
 231};
 232
 233struct g2d_data {
 234        struct device                   *dev;
 235        struct clk                      *gate_clk;
 236        void __iomem                    *regs;
 237        int                             irq;
 238        struct workqueue_struct         *g2d_workq;
 239        struct work_struct              runqueue_work;
 240        struct drm_device               *drm_dev;
 241        unsigned long                   flags;
 242
 243        /* cmdlist */
 244        struct g2d_cmdlist_node         *cmdlist_node;
 245        struct list_head                free_cmdlist;
 246        struct mutex                    cmdlist_mutex;
 247        dma_addr_t                      cmdlist_pool;
 248        void                            *cmdlist_pool_virt;
 249        unsigned long                   cmdlist_dma_attrs;
 250
 251        /* runqueue*/
 252        struct g2d_runqueue_node        *runqueue_node;
 253        struct list_head                runqueue;
 254        struct mutex                    runqueue_mutex;
 255        struct kmem_cache               *runqueue_slab;
 256
 257        unsigned long                   current_pool;
 258        unsigned long                   max_pool;
 259};
 260
 261static inline void g2d_hw_reset(struct g2d_data *g2d)
 262{
 263        writel(G2D_R | G2D_SFRCLEAR, g2d->regs + G2D_SOFT_RESET);
 264        clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
 265}
 266
 267static int g2d_init_cmdlist(struct g2d_data *g2d)
 268{
 269        struct device *dev = g2d->dev;
 270        struct g2d_cmdlist_node *node = g2d->cmdlist_node;
 271        int nr;
 272        int ret;
 273        struct g2d_buf_info *buf_info;
 274
 275        g2d->cmdlist_dma_attrs = DMA_ATTR_WRITE_COMBINE;
 276
 277        g2d->cmdlist_pool_virt = dma_alloc_attrs(to_dma_dev(g2d->drm_dev),
 278                                                G2D_CMDLIST_POOL_SIZE,
 279                                                &g2d->cmdlist_pool, GFP_KERNEL,
 280                                                g2d->cmdlist_dma_attrs);
 281        if (!g2d->cmdlist_pool_virt) {
 282                dev_err(dev, "failed to allocate dma memory\n");
 283                return -ENOMEM;
 284        }
 285
 286        node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
 287        if (!node) {
 288                ret = -ENOMEM;
 289                goto err;
 290        }
 291
 292        for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
 293                unsigned int i;
 294
 295                node[nr].cmdlist =
 296                        g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
 297                node[nr].dma_addr =
 298                        g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
 299
 300                buf_info = &node[nr].buf_info;
 301                for (i = 0; i < MAX_REG_TYPE_NR; i++)
 302                        buf_info->reg_types[i] = REG_TYPE_NONE;
 303
 304                list_add_tail(&node[nr].list, &g2d->free_cmdlist);
 305        }
 306
 307        return 0;
 308
 309err:
 310        dma_free_attrs(to_dma_dev(g2d->drm_dev), G2D_CMDLIST_POOL_SIZE,
 311                        g2d->cmdlist_pool_virt,
 312                        g2d->cmdlist_pool, g2d->cmdlist_dma_attrs);
 313        return ret;
 314}
 315
 316static void g2d_fini_cmdlist(struct g2d_data *g2d)
 317{
 318        kfree(g2d->cmdlist_node);
 319
 320        if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) {
 321                dma_free_attrs(to_dma_dev(g2d->drm_dev),
 322                                G2D_CMDLIST_POOL_SIZE,
 323                                g2d->cmdlist_pool_virt,
 324                                g2d->cmdlist_pool, g2d->cmdlist_dma_attrs);
 325        }
 326}
 327
 328static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
 329{
 330        struct device *dev = g2d->dev;
 331        struct g2d_cmdlist_node *node;
 332
 333        mutex_lock(&g2d->cmdlist_mutex);
 334        if (list_empty(&g2d->free_cmdlist)) {
 335                dev_err(dev, "there is no free cmdlist\n");
 336                mutex_unlock(&g2d->cmdlist_mutex);
 337                return NULL;
 338        }
 339
 340        node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
 341                                list);
 342        list_del_init(&node->list);
 343        mutex_unlock(&g2d->cmdlist_mutex);
 344
 345        return node;
 346}
 347
 348static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
 349{
 350        mutex_lock(&g2d->cmdlist_mutex);
 351        list_move_tail(&node->list, &g2d->free_cmdlist);
 352        mutex_unlock(&g2d->cmdlist_mutex);
 353}
 354
 355static void g2d_add_cmdlist_to_inuse(struct drm_exynos_file_private *file_priv,
 356                                     struct g2d_cmdlist_node *node)
 357{
 358        struct g2d_cmdlist_node *lnode;
 359
 360        if (list_empty(&file_priv->inuse_cmdlist))
 361                goto add_to_list;
 362
 363        /* this links to base address of new cmdlist */
 364        lnode = list_entry(file_priv->inuse_cmdlist.prev,
 365                                struct g2d_cmdlist_node, list);
 366        lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
 367
 368add_to_list:
 369        list_add_tail(&node->list, &file_priv->inuse_cmdlist);
 370
 371        if (node->event)
 372                list_add_tail(&node->event->base.link, &file_priv->event_list);
 373}
 374
 375static void g2d_userptr_put_dma_addr(struct g2d_data *g2d,
 376                                        void *obj,
 377                                        bool force)
 378{
 379        struct g2d_cmdlist_userptr *g2d_userptr = obj;
 380        struct page **pages;
 381
 382        if (!obj)
 383                return;
 384
 385        if (force)
 386                goto out;
 387
 388        atomic_dec(&g2d_userptr->refcount);
 389
 390        if (atomic_read(&g2d_userptr->refcount) > 0)
 391                return;
 392
 393        if (g2d_userptr->in_pool)
 394                return;
 395
 396out:
 397        dma_unmap_sg(to_dma_dev(g2d->drm_dev), g2d_userptr->sgt->sgl,
 398                        g2d_userptr->sgt->nents, DMA_BIDIRECTIONAL);
 399
 400        pages = frame_vector_pages(g2d_userptr->vec);
 401        if (!IS_ERR(pages)) {
 402                int i;
 403
 404                for (i = 0; i < frame_vector_count(g2d_userptr->vec); i++)
 405                        set_page_dirty_lock(pages[i]);
 406        }
 407        put_vaddr_frames(g2d_userptr->vec);
 408        frame_vector_destroy(g2d_userptr->vec);
 409
 410        if (!g2d_userptr->out_of_list)
 411                list_del_init(&g2d_userptr->list);
 412
 413        sg_free_table(g2d_userptr->sgt);
 414        kfree(g2d_userptr->sgt);
 415        kfree(g2d_userptr);
 416}
 417
 418static dma_addr_t *g2d_userptr_get_dma_addr(struct g2d_data *g2d,
 419                                        unsigned long userptr,
 420                                        unsigned long size,
 421                                        struct drm_file *filp,
 422                                        void **obj)
 423{
 424        struct drm_exynos_file_private *file_priv = filp->driver_priv;
 425        struct g2d_cmdlist_userptr *g2d_userptr;
 426        struct sg_table *sgt;
 427        unsigned long start, end;
 428        unsigned int npages, offset;
 429        int ret;
 430
 431        if (!size) {
 432                DRM_ERROR("invalid userptr size.\n");
 433                return ERR_PTR(-EINVAL);
 434        }
 435
 436        /* check if userptr already exists in userptr_list. */
 437        list_for_each_entry(g2d_userptr, &file_priv->userptr_list, list) {
 438                if (g2d_userptr->userptr == userptr) {
 439                        /*
 440                         * also check size because there could be same address
 441                         * and different size.
 442                         */
 443                        if (g2d_userptr->size == size) {
 444                                atomic_inc(&g2d_userptr->refcount);
 445                                *obj = g2d_userptr;
 446
 447                                return &g2d_userptr->dma_addr;
 448                        }
 449
 450                        /*
 451                         * at this moment, maybe g2d dma is accessing this
 452                         * g2d_userptr memory region so just remove this
 453                         * g2d_userptr object from userptr_list not to be
 454                         * referred again and also except it the userptr
 455                         * pool to be released after the dma access completion.
 456                         */
 457                        g2d_userptr->out_of_list = true;
 458                        g2d_userptr->in_pool = false;
 459                        list_del_init(&g2d_userptr->list);
 460
 461                        break;
 462                }
 463        }
 464
 465        g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
 466        if (!g2d_userptr)
 467                return ERR_PTR(-ENOMEM);
 468
 469        atomic_set(&g2d_userptr->refcount, 1);
 470        g2d_userptr->size = size;
 471
 472        start = userptr & PAGE_MASK;
 473        offset = userptr & ~PAGE_MASK;
 474        end = PAGE_ALIGN(userptr + size);
 475        npages = (end - start) >> PAGE_SHIFT;
 476        g2d_userptr->vec = frame_vector_create(npages);
 477        if (!g2d_userptr->vec) {
 478                ret = -ENOMEM;
 479                goto err_free;
 480        }
 481
 482        ret = get_vaddr_frames(start, npages, FOLL_FORCE | FOLL_WRITE,
 483                g2d_userptr->vec);
 484        if (ret != npages) {
 485                DRM_ERROR("failed to get user pages from userptr.\n");
 486                if (ret < 0)
 487                        goto err_destroy_framevec;
 488                ret = -EFAULT;
 489                goto err_put_framevec;
 490        }
 491        if (frame_vector_to_pages(g2d_userptr->vec) < 0) {
 492                ret = -EFAULT;
 493                goto err_put_framevec;
 494        }
 495
 496        sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
 497        if (!sgt) {
 498                ret = -ENOMEM;
 499                goto err_put_framevec;
 500        }
 501
 502        ret = sg_alloc_table_from_pages(sgt,
 503                                        frame_vector_pages(g2d_userptr->vec),
 504                                        npages, offset, size, GFP_KERNEL);
 505        if (ret < 0) {
 506                DRM_ERROR("failed to get sgt from pages.\n");
 507                goto err_free_sgt;
 508        }
 509
 510        g2d_userptr->sgt = sgt;
 511
 512        if (!dma_map_sg(to_dma_dev(g2d->drm_dev), sgt->sgl, sgt->nents,
 513                                DMA_BIDIRECTIONAL)) {
 514                DRM_ERROR("failed to map sgt with dma region.\n");
 515                ret = -ENOMEM;
 516                goto err_sg_free_table;
 517        }
 518
 519        g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
 520        g2d_userptr->userptr = userptr;
 521
 522        list_add_tail(&g2d_userptr->list, &file_priv->userptr_list);
 523
 524        if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
 525                g2d->current_pool += npages << PAGE_SHIFT;
 526                g2d_userptr->in_pool = true;
 527        }
 528
 529        *obj = g2d_userptr;
 530
 531        return &g2d_userptr->dma_addr;
 532
 533err_sg_free_table:
 534        sg_free_table(sgt);
 535
 536err_free_sgt:
 537        kfree(sgt);
 538
 539err_put_framevec:
 540        put_vaddr_frames(g2d_userptr->vec);
 541
 542err_destroy_framevec:
 543        frame_vector_destroy(g2d_userptr->vec);
 544
 545err_free:
 546        kfree(g2d_userptr);
 547
 548        return ERR_PTR(ret);
 549}
 550
 551static void g2d_userptr_free_all(struct g2d_data *g2d, struct drm_file *filp)
 552{
 553        struct drm_exynos_file_private *file_priv = filp->driver_priv;
 554        struct g2d_cmdlist_userptr *g2d_userptr, *n;
 555
 556        list_for_each_entry_safe(g2d_userptr, n, &file_priv->userptr_list, list)
 557                if (g2d_userptr->in_pool)
 558                        g2d_userptr_put_dma_addr(g2d, g2d_userptr, true);
 559
 560        g2d->current_pool = 0;
 561}
 562
 563static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
 564{
 565        enum g2d_reg_type reg_type;
 566
 567        switch (reg_offset) {
 568        case G2D_SRC_BASE_ADDR:
 569        case G2D_SRC_STRIDE:
 570        case G2D_SRC_COLOR_MODE:
 571        case G2D_SRC_LEFT_TOP:
 572        case G2D_SRC_RIGHT_BOTTOM:
 573                reg_type = REG_TYPE_SRC;
 574                break;
 575        case G2D_SRC_PLANE2_BASE_ADDR:
 576                reg_type = REG_TYPE_SRC_PLANE2;
 577                break;
 578        case G2D_DST_BASE_ADDR:
 579        case G2D_DST_STRIDE:
 580        case G2D_DST_COLOR_MODE:
 581        case G2D_DST_LEFT_TOP:
 582        case G2D_DST_RIGHT_BOTTOM:
 583                reg_type = REG_TYPE_DST;
 584                break;
 585        case G2D_DST_PLANE2_BASE_ADDR:
 586                reg_type = REG_TYPE_DST_PLANE2;
 587                break;
 588        case G2D_PAT_BASE_ADDR:
 589                reg_type = REG_TYPE_PAT;
 590                break;
 591        case G2D_MSK_BASE_ADDR:
 592                reg_type = REG_TYPE_MSK;
 593                break;
 594        default:
 595                reg_type = REG_TYPE_NONE;
 596                DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
 597                break;
 598        }
 599
 600        return reg_type;
 601}
 602
 603static unsigned long g2d_get_buf_bpp(unsigned int format)
 604{
 605        unsigned long bpp;
 606
 607        switch (format) {
 608        case G2D_FMT_XRGB8888:
 609        case G2D_FMT_ARGB8888:
 610                bpp = 4;
 611                break;
 612        case G2D_FMT_RGB565:
 613        case G2D_FMT_XRGB1555:
 614        case G2D_FMT_ARGB1555:
 615        case G2D_FMT_XRGB4444:
 616        case G2D_FMT_ARGB4444:
 617                bpp = 2;
 618                break;
 619        case G2D_FMT_PACKED_RGB888:
 620                bpp = 3;
 621                break;
 622        default:
 623                bpp = 1;
 624                break;
 625        }
 626
 627        return bpp;
 628}
 629
 630static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
 631                                                enum g2d_reg_type reg_type,
 632                                                unsigned long size)
 633{
 634        int width, height;
 635        unsigned long bpp, last_pos;
 636
 637        /*
 638         * check source and destination buffers only.
 639         * so the others are always valid.
 640         */
 641        if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
 642                return true;
 643
 644        /* This check also makes sure that right_x > left_x. */
 645        width = (int)buf_desc->right_x - (int)buf_desc->left_x;
 646        if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
 647                DRM_ERROR("width[%d] is out of range!\n", width);
 648                return false;
 649        }
 650
 651        /* This check also makes sure that bottom_y > top_y. */
 652        height = (int)buf_desc->bottom_y - (int)buf_desc->top_y;
 653        if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
 654                DRM_ERROR("height[%d] is out of range!\n", height);
 655                return false;
 656        }
 657
 658        bpp = g2d_get_buf_bpp(buf_desc->format);
 659
 660        /* Compute the position of the last byte that the engine accesses. */
 661        last_pos = ((unsigned long)buf_desc->bottom_y - 1) *
 662                (unsigned long)buf_desc->stride +
 663                (unsigned long)buf_desc->right_x * bpp - 1;
 664
 665        /*
 666         * Since right_x > left_x and bottom_y > top_y we already know
 667         * that the first_pos < last_pos (first_pos being the position
 668         * of the first byte the engine accesses), it just remains to
 669         * check if last_pos is smaller then the buffer size.
 670         */
 671
 672        if (last_pos >= size) {
 673                DRM_ERROR("last engine access position [%lu] "
 674                        "is out of range [%lu]!\n", last_pos, size);
 675                return false;
 676        }
 677
 678        return true;
 679}
 680
 681static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
 682                                struct g2d_cmdlist_node *node,
 683                                struct drm_device *drm_dev,
 684                                struct drm_file *file)
 685{
 686        struct g2d_cmdlist *cmdlist = node->cmdlist;
 687        struct g2d_buf_info *buf_info = &node->buf_info;
 688        int offset;
 689        int ret;
 690        int i;
 691
 692        for (i = 0; i < buf_info->map_nr; i++) {
 693                struct g2d_buf_desc *buf_desc;
 694                enum g2d_reg_type reg_type;
 695                int reg_pos;
 696                unsigned long handle;
 697                dma_addr_t *addr;
 698
 699                reg_pos = cmdlist->last - 2 * (i + 1);
 700
 701                offset = cmdlist->data[reg_pos];
 702                handle = cmdlist->data[reg_pos + 1];
 703
 704                reg_type = g2d_get_reg_type(offset);
 705                if (reg_type == REG_TYPE_NONE) {
 706                        ret = -EFAULT;
 707                        goto err;
 708                }
 709
 710                buf_desc = &buf_info->descs[reg_type];
 711
 712                if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
 713                        struct exynos_drm_gem *exynos_gem;
 714
 715                        exynos_gem = exynos_drm_gem_get(file, handle);
 716                        if (!exynos_gem) {
 717                                ret = -EFAULT;
 718                                goto err;
 719                        }
 720
 721                        if (!g2d_check_buf_desc_is_valid(buf_desc,
 722                                                         reg_type, exynos_gem->size)) {
 723                                exynos_drm_gem_put(exynos_gem);
 724                                ret = -EFAULT;
 725                                goto err;
 726                        }
 727
 728                        addr = &exynos_gem->dma_addr;
 729                        buf_info->obj[reg_type] = exynos_gem;
 730                } else {
 731                        struct drm_exynos_g2d_userptr g2d_userptr;
 732
 733                        if (copy_from_user(&g2d_userptr, (void __user *)handle,
 734                                sizeof(struct drm_exynos_g2d_userptr))) {
 735                                ret = -EFAULT;
 736                                goto err;
 737                        }
 738
 739                        if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
 740                                                        g2d_userptr.size)) {
 741                                ret = -EFAULT;
 742                                goto err;
 743                        }
 744
 745                        addr = g2d_userptr_get_dma_addr(g2d,
 746                                                        g2d_userptr.userptr,
 747                                                        g2d_userptr.size,
 748                                                        file,
 749                                                        &buf_info->obj[reg_type]);
 750                        if (IS_ERR(addr)) {
 751                                ret = -EFAULT;
 752                                goto err;
 753                        }
 754                }
 755
 756                cmdlist->data[reg_pos + 1] = *addr;
 757                buf_info->reg_types[i] = reg_type;
 758        }
 759
 760        return 0;
 761
 762err:
 763        buf_info->map_nr = i;
 764        return ret;
 765}
 766
 767static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
 768                                  struct g2d_cmdlist_node *node,
 769                                  struct drm_file *filp)
 770{
 771        struct g2d_buf_info *buf_info = &node->buf_info;
 772        int i;
 773
 774        for (i = 0; i < buf_info->map_nr; i++) {
 775                struct g2d_buf_desc *buf_desc;
 776                enum g2d_reg_type reg_type;
 777                void *obj;
 778
 779                reg_type = buf_info->reg_types[i];
 780
 781                buf_desc = &buf_info->descs[reg_type];
 782                obj = buf_info->obj[reg_type];
 783
 784                if (buf_info->types[reg_type] == BUF_TYPE_GEM)
 785                        exynos_drm_gem_put(obj);
 786                else
 787                        g2d_userptr_put_dma_addr(g2d, obj, false);
 788
 789                buf_info->reg_types[i] = REG_TYPE_NONE;
 790                buf_info->obj[reg_type] = NULL;
 791                buf_info->types[reg_type] = 0;
 792                memset(buf_desc, 0x00, sizeof(*buf_desc));
 793        }
 794
 795        buf_info->map_nr = 0;
 796}
 797
 798static void g2d_dma_start(struct g2d_data *g2d,
 799                          struct g2d_runqueue_node *runqueue_node)
 800{
 801        struct g2d_cmdlist_node *node =
 802                                list_first_entry(&runqueue_node->run_cmdlist,
 803                                                struct g2d_cmdlist_node, list);
 804
 805        set_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
 806        writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
 807        writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
 808}
 809
 810static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
 811{
 812        struct g2d_runqueue_node *runqueue_node;
 813
 814        if (list_empty(&g2d->runqueue))
 815                return NULL;
 816
 817        runqueue_node = list_first_entry(&g2d->runqueue,
 818                                         struct g2d_runqueue_node, list);
 819        list_del_init(&runqueue_node->list);
 820        return runqueue_node;
 821}
 822
 823static void g2d_free_runqueue_node(struct g2d_data *g2d,
 824                                   struct g2d_runqueue_node *runqueue_node)
 825{
 826        struct g2d_cmdlist_node *node;
 827
 828        mutex_lock(&g2d->cmdlist_mutex);
 829        /*
 830         * commands in run_cmdlist have been completed so unmap all gem
 831         * objects in each command node so that they are unreferenced.
 832         */
 833        list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
 834                g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
 835        list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
 836        mutex_unlock(&g2d->cmdlist_mutex);
 837
 838        kmem_cache_free(g2d->runqueue_slab, runqueue_node);
 839}
 840
 841/**
 842 * g2d_remove_runqueue_nodes - remove items from the list of runqueue nodes
 843 * @g2d: G2D state object
 844 * @file: if not zero, only remove items with this DRM file
 845 *
 846 * Has to be called under runqueue lock.
 847 */
 848static void g2d_remove_runqueue_nodes(struct g2d_data *g2d, struct drm_file* file)
 849{
 850        struct g2d_runqueue_node *node, *n;
 851
 852        if (list_empty(&g2d->runqueue))
 853                return;
 854
 855        list_for_each_entry_safe(node, n, &g2d->runqueue, list) {
 856                if (file && node->filp != file)
 857                        continue;
 858
 859                list_del_init(&node->list);
 860                g2d_free_runqueue_node(g2d, node);
 861        }
 862}
 863
 864static void g2d_runqueue_worker(struct work_struct *work)
 865{
 866        struct g2d_data *g2d = container_of(work, struct g2d_data,
 867                                            runqueue_work);
 868        struct g2d_runqueue_node *runqueue_node;
 869
 870        /*
 871         * The engine is busy and the completion of the current node is going
 872         * to poke the runqueue worker, so nothing to do here.
 873         */
 874        if (test_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags))
 875                return;
 876
 877        mutex_lock(&g2d->runqueue_mutex);
 878
 879        runqueue_node = g2d->runqueue_node;
 880        g2d->runqueue_node = NULL;
 881
 882        if (runqueue_node) {
 883                pm_runtime_mark_last_busy(g2d->dev);
 884                pm_runtime_put_autosuspend(g2d->dev);
 885
 886                complete(&runqueue_node->complete);
 887                if (runqueue_node->async)
 888                        g2d_free_runqueue_node(g2d, runqueue_node);
 889        }
 890
 891        if (!test_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags)) {
 892                g2d->runqueue_node = g2d_get_runqueue_node(g2d);
 893
 894                if (g2d->runqueue_node) {
 895                        pm_runtime_get_sync(g2d->dev);
 896                        g2d_dma_start(g2d, g2d->runqueue_node);
 897                }
 898        }
 899
 900        mutex_unlock(&g2d->runqueue_mutex);
 901}
 902
 903static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
 904{
 905        struct drm_device *drm_dev = g2d->drm_dev;
 906        struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
 907        struct drm_exynos_pending_g2d_event *e;
 908        struct timespec64 now;
 909
 910        if (list_empty(&runqueue_node->event_list))
 911                return;
 912
 913        e = list_first_entry(&runqueue_node->event_list,
 914                             struct drm_exynos_pending_g2d_event, base.link);
 915
 916        ktime_get_ts64(&now);
 917        e->event.tv_sec = now.tv_sec;
 918        e->event.tv_usec = now.tv_nsec / NSEC_PER_USEC;
 919        e->event.cmdlist_no = cmdlist_no;
 920
 921        drm_send_event(drm_dev, &e->base);
 922}
 923
 924static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
 925{
 926        struct g2d_data *g2d = dev_id;
 927        u32 pending;
 928
 929        pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
 930        if (pending)
 931                writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
 932
 933        if (pending & G2D_INTP_GCMD_FIN) {
 934                u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
 935
 936                cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
 937                                                G2D_DMA_LIST_DONE_COUNT_OFFSET;
 938
 939                g2d_finish_event(g2d, cmdlist_no);
 940
 941                writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
 942                if (!(pending & G2D_INTP_ACMD_FIN)) {
 943                        writel_relaxed(G2D_DMA_CONTINUE,
 944                                        g2d->regs + G2D_DMA_COMMAND);
 945                }
 946        }
 947
 948        if (pending & G2D_INTP_ACMD_FIN) {
 949                clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
 950                queue_work(g2d->g2d_workq, &g2d->runqueue_work);
 951        }
 952
 953        return IRQ_HANDLED;
 954}
 955
 956/**
 957 * g2d_wait_finish - wait for the G2D engine to finish the current runqueue node
 958 * @g2d: G2D state object
 959 * @file: if not zero, only wait if the current runqueue node belongs
 960 *        to the DRM file
 961 *
 962 * Should the engine not become idle after a 100ms timeout, a hardware
 963 * reset is issued.
 964 */
 965static void g2d_wait_finish(struct g2d_data *g2d, struct drm_file *file)
 966{
 967        struct device *dev = g2d->dev;
 968
 969        struct g2d_runqueue_node *runqueue_node = NULL;
 970        unsigned int tries = 10;
 971
 972        mutex_lock(&g2d->runqueue_mutex);
 973
 974        /* If no node is currently processed, we have nothing to do. */
 975        if (!g2d->runqueue_node)
 976                goto out;
 977
 978        runqueue_node = g2d->runqueue_node;
 979
 980        /* Check if the currently processed item belongs to us. */
 981        if (file && runqueue_node->filp != file)
 982                goto out;
 983
 984        mutex_unlock(&g2d->runqueue_mutex);
 985
 986        /* Wait for the G2D engine to finish. */
 987        while (tries-- && (g2d->runqueue_node == runqueue_node))
 988                mdelay(10);
 989
 990        mutex_lock(&g2d->runqueue_mutex);
 991
 992        if (g2d->runqueue_node != runqueue_node)
 993                goto out;
 994
 995        dev_err(dev, "wait timed out, resetting engine...\n");
 996        g2d_hw_reset(g2d);
 997
 998        /*
 999         * After the hardware reset of the engine we are going to loose
1000         * the IRQ which triggers the PM runtime put().
1001         * So do this manually here.
1002         */
1003        pm_runtime_mark_last_busy(dev);
1004        pm_runtime_put_autosuspend(dev);
1005
1006        complete(&runqueue_node->complete);
1007        if (runqueue_node->async)
1008                g2d_free_runqueue_node(g2d, runqueue_node);
1009
1010out:
1011        mutex_unlock(&g2d->runqueue_mutex);
1012}
1013
1014static int g2d_check_reg_offset(struct g2d_data *g2d,
1015                                struct g2d_cmdlist_node *node,
1016                                int nr, bool for_addr)
1017{
1018        struct g2d_cmdlist *cmdlist = node->cmdlist;
1019        int reg_offset;
1020        int index;
1021        int i;
1022
1023        for (i = 0; i < nr; i++) {
1024                struct g2d_buf_info *buf_info = &node->buf_info;
1025                struct g2d_buf_desc *buf_desc;
1026                enum g2d_reg_type reg_type;
1027                unsigned long value;
1028
1029                index = cmdlist->last - 2 * (i + 1);
1030
1031                reg_offset = cmdlist->data[index] & ~0xfffff000;
1032                if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
1033                        goto err;
1034                if (reg_offset % 4)
1035                        goto err;
1036
1037                switch (reg_offset) {
1038                case G2D_SRC_BASE_ADDR:
1039                case G2D_SRC_PLANE2_BASE_ADDR:
1040                case G2D_DST_BASE_ADDR:
1041                case G2D_DST_PLANE2_BASE_ADDR:
1042                case G2D_PAT_BASE_ADDR:
1043                case G2D_MSK_BASE_ADDR:
1044                        if (!for_addr)
1045                                goto err;
1046
1047                        reg_type = g2d_get_reg_type(reg_offset);
1048
1049                        /* check userptr buffer type. */
1050                        if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
1051                                buf_info->types[reg_type] = BUF_TYPE_USERPTR;
1052                                cmdlist->data[index] &= ~G2D_BUF_USERPTR;
1053                        } else
1054                                buf_info->types[reg_type] = BUF_TYPE_GEM;
1055                        break;
1056                case G2D_SRC_STRIDE:
1057                case G2D_DST_STRIDE:
1058                        if (for_addr)
1059                                goto err;
1060
1061                        reg_type = g2d_get_reg_type(reg_offset);
1062
1063                        buf_desc = &buf_info->descs[reg_type];
1064                        buf_desc->stride = cmdlist->data[index + 1];
1065                        break;
1066                case G2D_SRC_COLOR_MODE:
1067                case G2D_DST_COLOR_MODE:
1068                        if (for_addr)
1069                                goto err;
1070
1071                        reg_type = g2d_get_reg_type(reg_offset);
1072
1073                        buf_desc = &buf_info->descs[reg_type];
1074                        value = cmdlist->data[index + 1];
1075
1076                        buf_desc->format = value & 0xf;
1077                        break;
1078                case G2D_SRC_LEFT_TOP:
1079                case G2D_DST_LEFT_TOP:
1080                        if (for_addr)
1081                                goto err;
1082
1083                        reg_type = g2d_get_reg_type(reg_offset);
1084
1085                        buf_desc = &buf_info->descs[reg_type];
1086                        value = cmdlist->data[index + 1];
1087
1088                        buf_desc->left_x = value & 0x1fff;
1089                        buf_desc->top_y = (value & 0x1fff0000) >> 16;
1090                        break;
1091                case G2D_SRC_RIGHT_BOTTOM:
1092                case G2D_DST_RIGHT_BOTTOM:
1093                        if (for_addr)
1094                                goto err;
1095
1096                        reg_type = g2d_get_reg_type(reg_offset);
1097
1098                        buf_desc = &buf_info->descs[reg_type];
1099                        value = cmdlist->data[index + 1];
1100
1101                        buf_desc->right_x = value & 0x1fff;
1102                        buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1103                        break;
1104                default:
1105                        if (for_addr)
1106                                goto err;
1107                        break;
1108                }
1109        }
1110
1111        return 0;
1112
1113err:
1114        dev_err(g2d->dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1115        return -EINVAL;
1116}
1117
1118/* ioctl functions */
1119int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1120                             struct drm_file *file)
1121{
1122        struct drm_exynos_g2d_get_ver *ver = data;
1123
1124        ver->major = G2D_HW_MAJOR_VER;
1125        ver->minor = G2D_HW_MINOR_VER;
1126
1127        return 0;
1128}
1129
1130int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1131                                 struct drm_file *file)
1132{
1133        struct drm_exynos_file_private *file_priv = file->driver_priv;
1134        struct exynos_drm_private *priv = drm_dev->dev_private;
1135        struct g2d_data *g2d = dev_get_drvdata(priv->g2d_dev);
1136        struct drm_exynos_g2d_set_cmdlist *req = data;
1137        struct drm_exynos_g2d_cmd *cmd;
1138        struct drm_exynos_pending_g2d_event *e;
1139        struct g2d_cmdlist_node *node;
1140        struct g2d_cmdlist *cmdlist;
1141        int size;
1142        int ret;
1143
1144        node = g2d_get_cmdlist(g2d);
1145        if (!node)
1146                return -ENOMEM;
1147
1148        /*
1149         * To avoid an integer overflow for the later size computations, we
1150         * enforce a maximum number of submitted commands here. This limit is
1151         * sufficient for all conceivable usage cases of the G2D.
1152         */
1153        if (req->cmd_nr > G2D_CMDLIST_DATA_NUM ||
1154            req->cmd_buf_nr > G2D_CMDLIST_DATA_NUM) {
1155                dev_err(g2d->dev, "number of submitted G2D commands exceeds limit\n");
1156                return -EINVAL;
1157        }
1158
1159        node->event = NULL;
1160
1161        if (req->event_type != G2D_EVENT_NOT) {
1162                e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1163                if (!e) {
1164                        ret = -ENOMEM;
1165                        goto err;
1166                }
1167
1168                e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1169                e->event.base.length = sizeof(e->event);
1170                e->event.user_data = req->user_data;
1171
1172                ret = drm_event_reserve_init(drm_dev, file, &e->base, &e->event.base);
1173                if (ret) {
1174                        kfree(e);
1175                        goto err;
1176                }
1177
1178                node->event = e;
1179        }
1180
1181        cmdlist = node->cmdlist;
1182
1183        cmdlist->last = 0;
1184
1185        /*
1186         * If don't clear SFR registers, the cmdlist is affected by register
1187         * values of previous cmdlist. G2D hw executes SFR clear command and
1188         * a next command at the same time then the next command is ignored and
1189         * is executed rightly from next next command, so needs a dummy command
1190         * to next command of SFR clear command.
1191         */
1192        cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1193        cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1194        cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1195        cmdlist->data[cmdlist->last++] = 0;
1196
1197        /*
1198         * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1199         * and GCF bit should be set to INTEN register if user wants
1200         * G2D interrupt event once current command list execution is
1201         * finished.
1202         * Otherwise only ACF bit should be set to INTEN register so
1203         * that one interrupt is occurred after all command lists
1204         * have been completed.
1205         */
1206        if (node->event) {
1207                cmdlist->data[cmdlist->last++] = G2D_INTEN;
1208                cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1209                cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1210                cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1211        } else {
1212                cmdlist->data[cmdlist->last++] = G2D_INTEN;
1213                cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1214        }
1215
1216        /*
1217         * Check the size of cmdlist. The 2 that is added last comes from
1218         * the implicit G2D_BITBLT_START that is appended once we have
1219         * checked all the submitted commands.
1220         */
1221        size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1222        if (size > G2D_CMDLIST_DATA_NUM) {
1223                dev_err(g2d->dev, "cmdlist size is too big\n");
1224                ret = -EINVAL;
1225                goto err_free_event;
1226        }
1227
1228        cmd = (struct drm_exynos_g2d_cmd *)(unsigned long)req->cmd;
1229
1230        if (copy_from_user(cmdlist->data + cmdlist->last,
1231                                (void __user *)cmd,
1232                                sizeof(*cmd) * req->cmd_nr)) {
1233                ret = -EFAULT;
1234                goto err_free_event;
1235        }
1236        cmdlist->last += req->cmd_nr * 2;
1237
1238        ret = g2d_check_reg_offset(g2d, node, req->cmd_nr, false);
1239        if (ret < 0)
1240                goto err_free_event;
1241
1242        node->buf_info.map_nr = req->cmd_buf_nr;
1243        if (req->cmd_buf_nr) {
1244                struct drm_exynos_g2d_cmd *cmd_buf;
1245
1246                cmd_buf = (struct drm_exynos_g2d_cmd *)
1247                                (unsigned long)req->cmd_buf;
1248
1249                if (copy_from_user(cmdlist->data + cmdlist->last,
1250                                        (void __user *)cmd_buf,
1251                                        sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1252                        ret = -EFAULT;
1253                        goto err_free_event;
1254                }
1255                cmdlist->last += req->cmd_buf_nr * 2;
1256
1257                ret = g2d_check_reg_offset(g2d, node, req->cmd_buf_nr, true);
1258                if (ret < 0)
1259                        goto err_free_event;
1260
1261                ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1262                if (ret < 0)
1263                        goto err_unmap;
1264        }
1265
1266        cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1267        cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1268
1269        /* head */
1270        cmdlist->head = cmdlist->last / 2;
1271
1272        /* tail */
1273        cmdlist->data[cmdlist->last] = 0;
1274
1275        g2d_add_cmdlist_to_inuse(file_priv, node);
1276
1277        return 0;
1278
1279err_unmap:
1280        g2d_unmap_cmdlist_gem(g2d, node, file);
1281err_free_event:
1282        if (node->event)
1283                drm_event_cancel_free(drm_dev, &node->event->base);
1284err:
1285        g2d_put_cmdlist(g2d, node);
1286        return ret;
1287}
1288
1289int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1290                          struct drm_file *file)
1291{
1292        struct drm_exynos_file_private *file_priv = file->driver_priv;
1293        struct exynos_drm_private *priv = drm_dev->dev_private;
1294        struct g2d_data *g2d = dev_get_drvdata(priv->g2d_dev);
1295        struct drm_exynos_g2d_exec *req = data;
1296        struct g2d_runqueue_node *runqueue_node;
1297        struct list_head *run_cmdlist;
1298        struct list_head *event_list;
1299
1300        runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1301        if (!runqueue_node)
1302                return -ENOMEM;
1303
1304        run_cmdlist = &runqueue_node->run_cmdlist;
1305        event_list = &runqueue_node->event_list;
1306        INIT_LIST_HEAD(run_cmdlist);
1307        INIT_LIST_HEAD(event_list);
1308        init_completion(&runqueue_node->complete);
1309        runqueue_node->async = req->async;
1310
1311        list_splice_init(&file_priv->inuse_cmdlist, run_cmdlist);
1312        list_splice_init(&file_priv->event_list, event_list);
1313
1314        if (list_empty(run_cmdlist)) {
1315                dev_err(g2d->dev, "there is no inuse cmdlist\n");
1316                kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1317                return -EPERM;
1318        }
1319
1320        mutex_lock(&g2d->runqueue_mutex);
1321        runqueue_node->pid = current->pid;
1322        runqueue_node->filp = file;
1323        list_add_tail(&runqueue_node->list, &g2d->runqueue);
1324        mutex_unlock(&g2d->runqueue_mutex);
1325
1326        /* Let the runqueue know that there is work to do. */
1327        queue_work(g2d->g2d_workq, &g2d->runqueue_work);
1328
1329        if (runqueue_node->async)
1330                goto out;
1331
1332        wait_for_completion(&runqueue_node->complete);
1333        g2d_free_runqueue_node(g2d, runqueue_node);
1334
1335out:
1336        return 0;
1337}
1338
1339int g2d_open(struct drm_device *drm_dev, struct drm_file *file)
1340{
1341        struct drm_exynos_file_private *file_priv = file->driver_priv;
1342
1343        INIT_LIST_HEAD(&file_priv->inuse_cmdlist);
1344        INIT_LIST_HEAD(&file_priv->event_list);
1345        INIT_LIST_HEAD(&file_priv->userptr_list);
1346
1347        return 0;
1348}
1349
1350void g2d_close(struct drm_device *drm_dev, struct drm_file *file)
1351{
1352        struct drm_exynos_file_private *file_priv = file->driver_priv;
1353        struct exynos_drm_private *priv = drm_dev->dev_private;
1354        struct g2d_data *g2d;
1355        struct g2d_cmdlist_node *node, *n;
1356
1357        if (!priv->g2d_dev)
1358                return;
1359
1360        g2d = dev_get_drvdata(priv->g2d_dev);
1361
1362        /* Remove the runqueue nodes that belong to us. */
1363        mutex_lock(&g2d->runqueue_mutex);
1364        g2d_remove_runqueue_nodes(g2d, file);
1365        mutex_unlock(&g2d->runqueue_mutex);
1366
1367        /*
1368         * Wait for the runqueue worker to finish its current node.
1369         * After this the engine should no longer be accessing any
1370         * memory belonging to us.
1371         */
1372        g2d_wait_finish(g2d, file);
1373
1374        /*
1375         * Even after the engine is idle, there might still be stale cmdlists
1376         * (i.e. cmdlisst which we submitted but never executed) around, with
1377         * their corresponding GEM/userptr buffers.
1378         * Properly unmap these buffers here.
1379         */
1380        mutex_lock(&g2d->cmdlist_mutex);
1381        list_for_each_entry_safe(node, n, &file_priv->inuse_cmdlist, list) {
1382                g2d_unmap_cmdlist_gem(g2d, node, file);
1383                list_move_tail(&node->list, &g2d->free_cmdlist);
1384        }
1385        mutex_unlock(&g2d->cmdlist_mutex);
1386
1387        /* release all g2d_userptr in pool. */
1388        g2d_userptr_free_all(g2d, file);
1389}
1390
1391static int g2d_bind(struct device *dev, struct device *master, void *data)
1392{
1393        struct g2d_data *g2d = dev_get_drvdata(dev);
1394        struct drm_device *drm_dev = data;
1395        struct exynos_drm_private *priv = drm_dev->dev_private;
1396        int ret;
1397
1398        g2d->drm_dev = drm_dev;
1399
1400        /* allocate dma-aware cmdlist buffer. */
1401        ret = g2d_init_cmdlist(g2d);
1402        if (ret < 0) {
1403                dev_err(dev, "cmdlist init failed\n");
1404                return ret;
1405        }
1406
1407        ret = exynos_drm_register_dma(drm_dev, dev);
1408        if (ret < 0) {
1409                dev_err(dev, "failed to enable iommu.\n");
1410                g2d_fini_cmdlist(g2d);
1411                return ret;
1412        }
1413        priv->g2d_dev = dev;
1414
1415        dev_info(dev, "The Exynos G2D (ver %d.%d) successfully registered.\n",
1416                        G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1417        return 0;
1418}
1419
1420static void g2d_unbind(struct device *dev, struct device *master, void *data)
1421{
1422        struct g2d_data *g2d = dev_get_drvdata(dev);
1423        struct drm_device *drm_dev = data;
1424        struct exynos_drm_private *priv = drm_dev->dev_private;
1425
1426        /* Suspend operation and wait for engine idle. */
1427        set_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1428        g2d_wait_finish(g2d, NULL);
1429        priv->g2d_dev = NULL;
1430
1431        cancel_work_sync(&g2d->runqueue_work);
1432        exynos_drm_unregister_dma(g2d->drm_dev, dev);
1433}
1434
1435static const struct component_ops g2d_component_ops = {
1436        .bind   = g2d_bind,
1437        .unbind = g2d_unbind,
1438};
1439
1440static int g2d_probe(struct platform_device *pdev)
1441{
1442        struct device *dev = &pdev->dev;
1443        struct resource *res;
1444        struct g2d_data *g2d;
1445        int ret;
1446
1447        g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1448        if (!g2d)
1449                return -ENOMEM;
1450
1451        g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1452                        sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1453        if (!g2d->runqueue_slab)
1454                return -ENOMEM;
1455
1456        g2d->dev = dev;
1457
1458        g2d->g2d_workq = create_singlethread_workqueue("g2d");
1459        if (!g2d->g2d_workq) {
1460                dev_err(dev, "failed to create workqueue\n");
1461                ret = -EINVAL;
1462                goto err_destroy_slab;
1463        }
1464
1465        INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1466        INIT_LIST_HEAD(&g2d->free_cmdlist);
1467        INIT_LIST_HEAD(&g2d->runqueue);
1468
1469        mutex_init(&g2d->cmdlist_mutex);
1470        mutex_init(&g2d->runqueue_mutex);
1471
1472        g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1473        if (IS_ERR(g2d->gate_clk)) {
1474                dev_err(dev, "failed to get gate clock\n");
1475                ret = PTR_ERR(g2d->gate_clk);
1476                goto err_destroy_workqueue;
1477        }
1478
1479        pm_runtime_use_autosuspend(dev);
1480        pm_runtime_set_autosuspend_delay(dev, 2000);
1481        pm_runtime_enable(dev);
1482        clear_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1483        clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
1484
1485        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1486
1487        g2d->regs = devm_ioremap_resource(dev, res);
1488        if (IS_ERR(g2d->regs)) {
1489                ret = PTR_ERR(g2d->regs);
1490                goto err_put_clk;
1491        }
1492
1493        g2d->irq = platform_get_irq(pdev, 0);
1494        if (g2d->irq < 0) {
1495                dev_err(dev, "failed to get irq\n");
1496                ret = g2d->irq;
1497                goto err_put_clk;
1498        }
1499
1500        ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1501                                                                "drm_g2d", g2d);
1502        if (ret < 0) {
1503                dev_err(dev, "irq request failed\n");
1504                goto err_put_clk;
1505        }
1506
1507        g2d->max_pool = MAX_POOL;
1508
1509        platform_set_drvdata(pdev, g2d);
1510
1511        ret = component_add(dev, &g2d_component_ops);
1512        if (ret < 0) {
1513                dev_err(dev, "failed to register drm g2d device\n");
1514                goto err_put_clk;
1515        }
1516
1517        return 0;
1518
1519err_put_clk:
1520        pm_runtime_disable(dev);
1521err_destroy_workqueue:
1522        destroy_workqueue(g2d->g2d_workq);
1523err_destroy_slab:
1524        kmem_cache_destroy(g2d->runqueue_slab);
1525        return ret;
1526}
1527
1528static int g2d_remove(struct platform_device *pdev)
1529{
1530        struct g2d_data *g2d = platform_get_drvdata(pdev);
1531
1532        component_del(&pdev->dev, &g2d_component_ops);
1533
1534        /* There should be no locking needed here. */
1535        g2d_remove_runqueue_nodes(g2d, NULL);
1536
1537        pm_runtime_dont_use_autosuspend(&pdev->dev);
1538        pm_runtime_disable(&pdev->dev);
1539
1540        g2d_fini_cmdlist(g2d);
1541        destroy_workqueue(g2d->g2d_workq);
1542        kmem_cache_destroy(g2d->runqueue_slab);
1543
1544        return 0;
1545}
1546
1547#ifdef CONFIG_PM_SLEEP
1548static int g2d_suspend(struct device *dev)
1549{
1550        struct g2d_data *g2d = dev_get_drvdata(dev);
1551
1552        /*
1553         * Suspend the runqueue worker operation and wait until the G2D
1554         * engine is idle.
1555         */
1556        set_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1557        g2d_wait_finish(g2d, NULL);
1558        flush_work(&g2d->runqueue_work);
1559
1560        return 0;
1561}
1562
1563static int g2d_resume(struct device *dev)
1564{
1565        struct g2d_data *g2d = dev_get_drvdata(dev);
1566
1567        clear_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1568        queue_work(g2d->g2d_workq, &g2d->runqueue_work);
1569
1570        return 0;
1571}
1572#endif
1573
1574#ifdef CONFIG_PM
1575static int g2d_runtime_suspend(struct device *dev)
1576{
1577        struct g2d_data *g2d = dev_get_drvdata(dev);
1578
1579        clk_disable_unprepare(g2d->gate_clk);
1580
1581        return 0;
1582}
1583
1584static int g2d_runtime_resume(struct device *dev)
1585{
1586        struct g2d_data *g2d = dev_get_drvdata(dev);
1587        int ret;
1588
1589        ret = clk_prepare_enable(g2d->gate_clk);
1590        if (ret < 0)
1591                dev_warn(dev, "failed to enable clock.\n");
1592
1593        return ret;
1594}
1595#endif
1596
1597static const struct dev_pm_ops g2d_pm_ops = {
1598        SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1599        SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1600};
1601
1602static const struct of_device_id exynos_g2d_match[] = {
1603        { .compatible = "samsung,exynos5250-g2d" },
1604        { .compatible = "samsung,exynos4212-g2d" },
1605        {},
1606};
1607MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1608
1609struct platform_driver g2d_driver = {
1610        .probe          = g2d_probe,
1611        .remove         = g2d_remove,
1612        .driver         = {
1613                .name   = "exynos-drm-g2d",
1614                .owner  = THIS_MODULE,
1615                .pm     = &g2d_pm_ops,
1616                .of_match_table = exynos_g2d_match,
1617        },
1618};
1619