1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * rcar_du_drv.h -- R-Car Display Unit DRM driver 4 * 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 6 * 7 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) 8 */ 9 10#ifndef __RCAR_DU_DRV_H__ 11#define __RCAR_DU_DRV_H__ 12 13#include <linux/kernel.h> 14#include <linux/wait.h> 15 16#include "rcar_du_crtc.h" 17#include "rcar_du_group.h" 18#include "rcar_du_vsp.h" 19 20struct clk; 21struct device; 22struct drm_device; 23struct rcar_du_device; 24 25#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */ 26#define RCAR_DU_FEATURE_EXT_CTRL_REGS BIT(1) /* Has extended control registers */ 27#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */ 28#define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */ 29#define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */ 30 31#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */ 32 33/* 34 * struct rcar_du_output_routing - Output routing specification 35 * @possible_crtcs: bitmask of possible CRTCs for the output 36 * @port: device tree port number corresponding to this output route 37 * 38 * The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data 39 * specify the valid SoC outputs, which CRTCs can drive the output, and the type 40 * of in-SoC encoder for the output. 41 */ 42struct rcar_du_output_routing { 43 unsigned int possible_crtcs; 44 unsigned int port; 45}; 46 47/* 48 * struct rcar_du_device_info - DU model-specific information 49 * @gen: device generation (2 or 3) 50 * @features: device features (RCAR_DU_FEATURE_*) 51 * @quirks: device quirks (RCAR_DU_QUIRK_*) 52 * @channels_mask: bit mask of available DU channels 53 * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*) 54 * @num_lvds: number of internal LVDS encoders 55 * @dpll_mask: bit mask of DU channels equipped with a DPLL 56 * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as dot clock 57 */ 58struct rcar_du_device_info { 59 unsigned int gen; 60 unsigned int features; 61 unsigned int quirks; 62 unsigned int channels_mask; 63 struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX]; 64 unsigned int num_lvds; 65 unsigned int dpll_mask; 66 unsigned int lvds_clk_mask; 67}; 68 69#define RCAR_DU_MAX_CRTCS 4 70#define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2) 71#define RCAR_DU_MAX_VSPS 4 72 73struct rcar_du_device { 74 struct device *dev; 75 const struct rcar_du_device_info *info; 76 77 void __iomem *mmio; 78 79 struct drm_device *ddev; 80 81 struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS]; 82 unsigned int num_crtcs; 83 84 struct rcar_du_group groups[RCAR_DU_MAX_GROUPS]; 85 struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS]; 86 87 struct { 88 struct drm_property *colorkey; 89 } props; 90 91 unsigned int dpad0_source; 92 unsigned int vspd1_sink; 93}; 94 95static inline bool rcar_du_has(struct rcar_du_device *rcdu, 96 unsigned int feature) 97{ 98 return rcdu->info->features & feature; 99} 100 101static inline bool rcar_du_needs(struct rcar_du_device *rcdu, 102 unsigned int quirk) 103{ 104 return rcdu->info->quirks & quirk; 105} 106 107static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg) 108{ 109 return ioread32(rcdu->mmio + reg); 110} 111 112static inline void rcar_du_write(struct rcar_du_device *rcdu, u32 reg, u32 data) 113{ 114 iowrite32(data, rcdu->mmio + reg); 115} 116 117#endif /* __RCAR_DU_DRV_H__ */ 118