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34#ifndef __NES_H
35#define __NES_H
36
37#include <linux/netdevice.h>
38#include <linux/inetdevice.h>
39#include <linux/interrupt.h>
40#include <linux/spinlock.h>
41#include <linux/kernel.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/dma-mapping.h>
45#include <linux/workqueue.h>
46#include <linux/slab.h>
47#include <asm/io.h>
48#include <linux/crc32c.h>
49
50#include <rdma/ib_smi.h>
51#include <rdma/ib_verbs.h>
52#include <rdma/ib_pack.h>
53#include <rdma/rdma_cm.h>
54#include <rdma/iw_cm.h>
55#include <rdma/rdma_netlink.h>
56#include <rdma/iw_portmap.h>
57
58#define NES_SEND_FIRST_WRITE
59
60#define QUEUE_DISCONNECTS
61
62#define DRV_NAME "iw_nes"
63#define DRV_VERSION "1.5.0.1"
64#define PFX DRV_NAME ": "
65
66
67
68
69#ifndef PCI_VENDOR_ID_NETEFFECT
70#define PCI_VENDOR_ID_NETEFFECT 0x1678
71#define PCI_DEVICE_ID_NETEFFECT_NE020 0x0100
72#define PCI_DEVICE_ID_NETEFFECT_NE020_KR 0x0110
73#endif
74
75#define NE020_REV 4
76#define NE020_REV1 5
77
78#define BAR_0 0
79#define BAR_1 2
80
81#define RX_BUF_SIZE (1536 + 8)
82#define NES_REG0_SIZE (4 * 1024)
83#define NES_TX_TIMEOUT (6*HZ)
84#define NES_FIRST_QPN 64
85#define NES_SW_CONTEXT_ALIGN 1024
86
87#define NES_MAX_MTU 9000
88
89#define NES_NIC_MAX_NICS 16
90#define NES_MAX_ARP_TABLE_SIZE 4096
91
92#define NES_NIC_CEQ_SIZE 8
93
94#define NES_CCEQ_SIZE ((nesadapter->max_cq / nesadapter->port_count) - 32)
95
96#define NES_MAX_PORT_COUNT 4
97
98#define MAX_DPC_ITERATIONS 128
99
100#define NES_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
101#define NES_DRV_OPT_DISABLE_MPA_CRC 0x00000002
102#define NES_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
103#define NES_DRV_OPT_DISABLE_INTF 0x00000008
104#define NES_DRV_OPT_ENABLE_MSI 0x00000010
105#define NES_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
106#define NES_DRV_OPT_SUPRESS_OPTION_BC 0x00000040
107#define NES_DRV_OPT_NO_INLINE_DATA 0x00000080
108#define NES_DRV_OPT_DISABLE_INT_MOD 0x00000100
109#define NES_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
110#define NES_DRV_OPT_ENABLE_PAU 0x00000400
111
112#define NES_AEQ_EVENT_TIMEOUT 2500
113#define NES_DISCONNECT_EVENT_TIMEOUT 2000
114
115
116
117#define NES_DBG_HW 0x00000001
118#define NES_DBG_INIT 0x00000002
119#define NES_DBG_ISR 0x00000004
120#define NES_DBG_PHY 0x00000008
121#define NES_DBG_NETDEV 0x00000010
122#define NES_DBG_CM 0x00000020
123#define NES_DBG_CM1 0x00000040
124#define NES_DBG_NIC_RX 0x00000080
125#define NES_DBG_NIC_TX 0x00000100
126#define NES_DBG_CQP 0x00000200
127#define NES_DBG_MMAP 0x00000400
128#define NES_DBG_MR 0x00000800
129#define NES_DBG_PD 0x00001000
130#define NES_DBG_CQ 0x00002000
131#define NES_DBG_QP 0x00004000
132#define NES_DBG_MOD_QP 0x00008000
133#define NES_DBG_AEQ 0x00010000
134#define NES_DBG_IW_RX 0x00020000
135#define NES_DBG_IW_TX 0x00040000
136#define NES_DBG_SHUTDOWN 0x00080000
137#define NES_DBG_PAU 0x00100000
138#define NES_DBG_NLMSG 0x00200000
139#define NES_DBG_RSVD1 0x10000000
140#define NES_DBG_RSVD2 0x20000000
141#define NES_DBG_RSVD3 0x40000000
142#define NES_DBG_RSVD4 0x80000000
143#define NES_DBG_ALL 0xffffffff
144
145#ifdef CONFIG_INFINIBAND_NES_DEBUG
146#define nes_debug(level, fmt, args...) \
147do { \
148 if (level & nes_debug_level) \
149 printk(KERN_ERR PFX "%s[%u]: " fmt, __func__, __LINE__, ##args); \
150} while (0)
151
152#define NES_EVENT_TIMEOUT 1200000
153#else
154#define nes_debug(level, fmt, args...) no_printk(fmt, ##args)
155
156#define NES_EVENT_TIMEOUT 100000
157#endif
158
159#include "nes_hw.h"
160#include "nes_verbs.h"
161#include "nes_context.h"
162#include <rdma/nes-abi.h>
163#include "nes_cm.h"
164#include "nes_mgt.h"
165
166extern int interrupt_mod_interval;
167extern int nes_if_count;
168extern int mpa_version;
169extern int disable_mpa_crc;
170extern unsigned int nes_drv_opt;
171extern unsigned int nes_debug_level;
172extern unsigned int wqm_quanta;
173extern struct list_head nes_adapter_list;
174
175extern atomic_t cm_connects;
176extern atomic_t cm_accepts;
177extern atomic_t cm_disconnects;
178extern atomic_t cm_closes;
179extern atomic_t cm_connecteds;
180extern atomic_t cm_connect_reqs;
181extern atomic_t cm_rejects;
182extern atomic_t mod_qp_timouts;
183extern atomic_t qps_created;
184extern atomic_t qps_destroyed;
185extern atomic_t sw_qps_destroyed;
186extern u32 mh_detected;
187extern u32 mh_pauses_sent;
188extern u32 cm_packets_sent;
189extern u32 cm_packets_bounced;
190extern u32 cm_packets_created;
191extern u32 cm_packets_received;
192extern u32 cm_packets_dropped;
193extern u32 cm_packets_retrans;
194extern atomic_t cm_listens_created;
195extern atomic_t cm_listens_destroyed;
196extern u32 cm_backlog_drops;
197extern atomic_t cm_loopbacks;
198extern atomic_t cm_nodes_created;
199extern atomic_t cm_nodes_destroyed;
200extern atomic_t cm_accel_dropped_pkts;
201extern atomic_t cm_resets_recvd;
202extern atomic_t pau_qps_created;
203extern atomic_t pau_qps_destroyed;
204
205extern u32 int_mod_timer_init;
206extern u32 int_mod_cq_depth_256;
207extern u32 int_mod_cq_depth_128;
208extern u32 int_mod_cq_depth_32;
209extern u32 int_mod_cq_depth_24;
210extern u32 int_mod_cq_depth_16;
211extern u32 int_mod_cq_depth_4;
212extern u32 int_mod_cq_depth_1;
213
214struct nes_device {
215 struct nes_adapter *nesadapter;
216 void __iomem *regs;
217 void __iomem *index_reg;
218 struct pci_dev *pcidev;
219 struct net_device *netdev[NES_NIC_MAX_NICS];
220 u64 link_status_interrupts;
221 struct tasklet_struct dpc_tasklet;
222 spinlock_t indexed_regs_lock;
223 unsigned long csr_start;
224 unsigned long doorbell_region;
225 unsigned long doorbell_start;
226 unsigned long mac_tx_errors;
227 unsigned long mac_pause_frames_sent;
228 unsigned long mac_pause_frames_received;
229 unsigned long mac_rx_errors;
230 unsigned long mac_rx_crc_errors;
231 unsigned long mac_rx_symbol_err_frames;
232 unsigned long mac_rx_jabber_frames;
233 unsigned long mac_rx_oversized_frames;
234 unsigned long mac_rx_short_frames;
235 unsigned long port_rx_discards;
236 unsigned long port_tx_discards;
237 unsigned int mac_index;
238 unsigned int nes_stack_start;
239
240
241 void *cqp_vbase;
242 dma_addr_t cqp_pbase;
243 u32 cqp_mem_size;
244 u8 ceq_index;
245 u8 nic_ceq_index;
246 struct nes_hw_cqp cqp;
247 struct nes_hw_cq ccq;
248 struct list_head cqp_avail_reqs;
249 struct list_head cqp_pending_reqs;
250 struct nes_cqp_request *nes_cqp_requests;
251
252 u32 int_req;
253 u32 int_stat;
254 u32 timer_int_req;
255 u32 timer_only_int_count;
256 u32 intf_int_req;
257 u32 last_mac_tx_pauses;
258 u32 last_used_chunks_tx;
259 struct list_head list;
260
261 u16 base_doorbell_index;
262 u16 currcq_count;
263 u16 deepcq_count;
264 u8 iw_status;
265 u8 msi_enabled;
266 u8 netdev_count;
267 u8 napi_isr_ran;
268 u8 disable_rx_flow_control;
269 u8 disable_tx_flow_control;
270
271 struct delayed_work work;
272 u8 link_recheck;
273};
274
275
276struct nes_rskb_cb {
277 u64 busaddr;
278 u32 maplen;
279 u32 seqnum;
280 u8 *data_start;
281 struct nes_qp *nesqp;
282};
283
284static inline __le32 get_crc_value(struct nes_v4_quad *nes_quad)
285{
286 u32 crc_value;
287 crc_value = crc32c(~0, (void *)nes_quad, sizeof (struct nes_v4_quad));
288
289
290
291
292
293
294
295
296 return cpu_to_le32(crc_value);
297}
298
299static inline void
300set_wqe_64bit_value(__le32 *wqe_words, u32 index, u64 value)
301{
302 wqe_words[index] = cpu_to_le32((u32) value);
303 wqe_words[index + 1] = cpu_to_le32(upper_32_bits(value));
304}
305
306static inline void
307set_wqe_32bit_value(__le32 *wqe_words, u32 index, u32 value)
308{
309 wqe_words[index] = cpu_to_le32(value);
310}
311
312static inline void
313nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev)
314{
315 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_LOW_IDX] = 0;
316 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_HIGH_IDX] = 0;
317 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX] = 0;
318 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX] = 0;
319 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
320 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_LEN_IDX] = 0;
321 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_LOW_IDX] = 0;
322 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_LOW_IDX] = 0;
323 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_HIGH_IDX] = 0;
324}
325
326static inline void
327nes_fill_init_qp_wqe(struct nes_hw_qp_wqe *wqe, struct nes_qp *nesqp, u32 head)
328{
329 u32 value;
330 value = ((u32)((unsigned long) nesqp)) | head;
331 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX,
332 (u32)(upper_32_bits((unsigned long)(nesqp))));
333 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, value);
334}
335
336
337static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index)
338{
339 unsigned long flags;
340 void __iomem *addr = nesdev->index_reg;
341 u32 value;
342
343 spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
344
345 writel(reg_index, addr);
346 value = readl((void __iomem *)addr + 4);
347
348 spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
349 return value;
350}
351
352static inline u32 nes_read32(const void __iomem *addr)
353{
354 return readl(addr);
355}
356
357static inline u16 nes_read16(const void __iomem *addr)
358{
359 return readw(addr);
360}
361
362static inline u8 nes_read8(const void __iomem *addr)
363{
364 return readb(addr);
365}
366
367
368static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val)
369{
370 unsigned long flags;
371 void __iomem *addr = nesdev->index_reg;
372
373 spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
374
375 writel(reg_index, addr);
376 writel(val, (void __iomem *)addr + 4);
377
378 spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
379}
380
381static inline void nes_write32(void __iomem *addr, u32 val)
382{
383 writel(val, addr);
384}
385
386static inline void nes_write16(void __iomem *addr, u16 val)
387{
388 writew(val, addr);
389}
390
391static inline void nes_write8(void __iomem *addr, u8 val)
392{
393 writeb(val, addr);
394}
395
396enum nes_resource {
397 NES_RESOURCE_MW = 1,
398 NES_RESOURCE_FAST_MR,
399 NES_RESOURCE_PHYS_MR,
400 NES_RESOURCE_USER_MR,
401 NES_RESOURCE_PD,
402 NES_RESOURCE_QP,
403 NES_RESOURCE_CQ,
404 NES_RESOURCE_ARP
405};
406
407static inline int nes_alloc_resource(struct nes_adapter *nesadapter,
408 unsigned long *resource_array, u32 max_resources,
409 u32 *req_resource_num, u32 *next, enum nes_resource resource_type)
410{
411 unsigned long flags;
412 u32 resource_num;
413
414 spin_lock_irqsave(&nesadapter->resource_lock, flags);
415
416 resource_num = find_next_zero_bit(resource_array, max_resources, *next);
417 if (resource_num >= max_resources) {
418 resource_num = find_first_zero_bit(resource_array, max_resources);
419 if (resource_num >= max_resources) {
420 printk(KERN_ERR PFX "%s: No available resources [type=%u].\n", __func__, resource_type);
421 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
422 return -EMFILE;
423 }
424 }
425 set_bit(resource_num, resource_array);
426 *next = resource_num+1;
427 if (*next == max_resources) {
428 *next = 0;
429 }
430 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
431 *req_resource_num = resource_num;
432
433 return 0;
434}
435
436static inline int nes_is_resource_allocated(struct nes_adapter *nesadapter,
437 unsigned long *resource_array, u32 resource_num)
438{
439 unsigned long flags;
440 int bit_is_set;
441
442 spin_lock_irqsave(&nesadapter->resource_lock, flags);
443
444 bit_is_set = test_bit(resource_num, resource_array);
445 nes_debug(NES_DBG_HW, "resource_num %u is%s allocated.\n",
446 resource_num, (bit_is_set ? "": " not"));
447 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
448
449 return bit_is_set;
450}
451
452static inline void nes_free_resource(struct nes_adapter *nesadapter,
453 unsigned long *resource_array, u32 resource_num)
454{
455 unsigned long flags;
456
457 spin_lock_irqsave(&nesadapter->resource_lock, flags);
458 clear_bit(resource_num, resource_array);
459 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
460}
461
462static inline struct nes_vnic *to_nesvnic(struct ib_device *ibdev)
463{
464 return container_of(ibdev, struct nes_ib_device, ibdev)->nesvnic;
465}
466
467static inline struct nes_pd *to_nespd(struct ib_pd *ibpd)
468{
469 return container_of(ibpd, struct nes_pd, ibpd);
470}
471
472static inline struct nes_ucontext *to_nesucontext(struct ib_ucontext *ibucontext)
473{
474 return container_of(ibucontext, struct nes_ucontext, ibucontext);
475}
476
477static inline struct nes_mr *to_nesmr(struct ib_mr *ibmr)
478{
479 return container_of(ibmr, struct nes_mr, ibmr);
480}
481
482static inline struct nes_mr *to_nesmr_from_ibfmr(struct ib_fmr *ibfmr)
483{
484 return container_of(ibfmr, struct nes_mr, ibfmr);
485}
486
487static inline struct nes_mr *to_nesmw(struct ib_mw *ibmw)
488{
489 return container_of(ibmw, struct nes_mr, ibmw);
490}
491
492static inline struct nes_fmr *to_nesfmr(struct nes_mr *nesmr)
493{
494 return container_of(nesmr, struct nes_fmr, nesmr);
495}
496
497static inline struct nes_cq *to_nescq(struct ib_cq *ibcq)
498{
499 return container_of(ibcq, struct nes_cq, ibcq);
500}
501
502static inline struct nes_qp *to_nesqp(struct ib_qp *ibqp)
503{
504 return container_of(ibqp, struct nes_qp, ibqp);
505}
506
507
508
509
510void nes_add_ref(struct ib_qp *);
511void nes_rem_ref(struct ib_qp *);
512struct ib_qp *nes_get_qp(struct ib_device *, int);
513
514
515
516struct nes_adapter *nes_init_adapter(struct nes_device *, u8);
517void nes_nic_init_timer_defaults(struct nes_device *, u8);
518void nes_destroy_adapter(struct nes_adapter *);
519int nes_init_cqp(struct nes_device *);
520int nes_init_phy(struct nes_device *);
521int nes_init_nic_qp(struct nes_device *, struct net_device *);
522void nes_destroy_nic_qp(struct nes_vnic *);
523int nes_napi_isr(struct nes_device *);
524void nes_dpc(unsigned long);
525void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
526void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
527int nes_destroy_cqp(struct nes_device *);
528int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
529void nes_recheck_link_status(struct work_struct *work);
530void nes_terminate_timeout(struct timer_list *t);
531
532
533struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
534void nes_netdev_destroy(struct net_device *);
535int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
536
537
538void *nes_cm_create(struct net_device *);
539int nes_cm_recv(struct sk_buff *, struct net_device *);
540void nes_update_arp(unsigned char *, u32, u32, u16, u16);
541void nes_manage_arp_cache(struct net_device *, unsigned char *, u32, u32);
542void nes_sock_release(struct nes_qp *, unsigned long *);
543void flush_wqes(struct nes_device *nesdev, struct nes_qp *, u32, u32);
544int nes_manage_apbvt(struct nes_vnic *, u32, u32, u32);
545int nes_cm_disconn(struct nes_qp *);
546void nes_cm_disconn_worker(void *);
547
548
549int nes_hw_modify_qp(struct nes_device *, struct nes_qp *, u32, u32, u32);
550int nes_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
551struct nes_ib_device *nes_init_ofa_device(struct net_device *);
552void nes_port_ibevent(struct nes_vnic *nesvnic);
553void nes_destroy_ofa_device(struct nes_ib_device *);
554int nes_register_ofa_device(struct nes_ib_device *);
555
556
557int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
558void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
559void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
560void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16);
561void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16);
562struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
563void nes_free_cqp_request(struct nes_device *nesdev,
564 struct nes_cqp_request *cqp_request);
565void nes_put_cqp_request(struct nes_device *nesdev,
566 struct nes_cqp_request *cqp_request);
567void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *);
568int nes_arp_table(struct nes_device *, u32, u8 *, u32);
569void nes_mh_fix(struct timer_list *t);
570void nes_clc(struct timer_list *t);
571void nes_dump_mem(unsigned int, void *, int);
572u32 nes_crc32(u32, u32, u32, u32, u8 *, u32, u32, u32);
573
574#endif
575
