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29#define DRV_NAME "hamachi"
30#define DRV_VERSION "2.1"
31#define DRV_RELDATE "Sept 11, 2006"
32
33
34
35
36static int debug = 1;
37#define final_version
38#define hamachi_debug debug
39
40static int max_interrupt_work = 40;
41static int mtu;
42
43
44
45
46static int max_rx_latency = 0x11;
47static int max_rx_gap = 0x05;
48static int min_rx_pkt = 0x18;
49static int max_tx_latency = 0x00;
50static int max_tx_gap = 0x00;
51static int min_tx_pkt = 0x30;
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57static int rx_copybreak;
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62
63static int force32;
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84
85#define MAX_UNITS 8
86static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
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103static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
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119#define TX_RING_SIZE 64
120#define RX_RING_SIZE 512
121#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
122#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
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136
137#define RX_CHECKSUM
138
139
140
141#define TX_TIMEOUT (5*HZ)
142
143#include <linux/capability.h>
144#include <linux/module.h>
145#include <linux/kernel.h>
146#include <linux/string.h>
147#include <linux/timer.h>
148#include <linux/time.h>
149#include <linux/errno.h>
150#include <linux/ioport.h>
151#include <linux/interrupt.h>
152#include <linux/pci.h>
153#include <linux/init.h>
154#include <linux/ethtool.h>
155#include <linux/mii.h>
156#include <linux/netdevice.h>
157#include <linux/etherdevice.h>
158#include <linux/skbuff.h>
159#include <linux/ip.h>
160#include <linux/delay.h>
161#include <linux/bitops.h>
162
163#include <linux/uaccess.h>
164#include <asm/processor.h>
165#include <asm/io.h>
166#include <asm/unaligned.h>
167#include <asm/cache.h>
168
169static const char version[] =
170KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
171" Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
172" Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
173
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178
179
180#ifndef IP_MF
181 #define IP_MF 0x2000
182#endif
183
184
185#ifndef IP_OFFSET
186 #ifdef IPOPT_OFFSET
187 #define IP_OFFSET IPOPT_OFFSET
188 #else
189 #define IP_OFFSET 2
190 #endif
191#endif
192
193#define RUN_AT(x) (jiffies + (x))
194
195#ifndef ADDRLEN
196#define ADDRLEN 32
197#endif
198
199
200#if ADDRLEN == 64
201#define cpu_to_leXX(addr) cpu_to_le64(addr)
202#define leXX_to_cpu(addr) le64_to_cpu(addr)
203#else
204#define cpu_to_leXX(addr) cpu_to_le32(addr)
205#define leXX_to_cpu(addr) le32_to_cpu(addr)
206#endif
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406#define PKT_BUF_SZ 1536
407
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410
411
412#define MAX_FRAME_SIZE 1518
413
414
415
416static void hamachi_timer(struct timer_list *t);
417
418enum capability_flags {CanHaveMII=1, };
419static const struct chip_info {
420 u16 vendor_id, device_id, device_id_mask, pad;
421 const char *name;
422 void (*media_timer)(struct timer_list *t);
423 int flags;
424} chip_tbl[] = {
425 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
426 {0,},
427};
428
429
430enum hamachi_offsets {
431 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
432 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
433 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
434 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
435 TxChecksum=0x074, RxChecksum=0x076,
436 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
437 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
438 EventStatus=0x08C,
439 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
440
441 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
442 AddrMode=0x0D0, StationAddr=0x0D2,
443
444 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
445 ANLinkPartnerAbility=0x0EA,
446 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
447 FIFOcfg=0x0F8,
448};
449
450
451enum MII_offsets {
452 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
453 MII_Status=0xAE,
454};
455
456
457enum intr_status_bits {
458 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
459 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
460 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
461
462
463struct hamachi_desc {
464 __le32 status_n_length;
465#if ADDRLEN == 64
466 u32 pad;
467 __le64 addr;
468#else
469 __le32 addr;
470#endif
471};
472
473
474enum desc_status_bits {
475 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
476 DescIntr=0x10000000,
477};
478
479#define PRIV_ALIGN 15
480#define MII_CNT 4
481struct hamachi_private {
482
483
484 struct hamachi_desc *rx_ring;
485 struct hamachi_desc *tx_ring;
486 struct sk_buff* rx_skbuff[RX_RING_SIZE];
487 struct sk_buff* tx_skbuff[TX_RING_SIZE];
488 dma_addr_t tx_ring_dma;
489 dma_addr_t rx_ring_dma;
490 struct timer_list timer;
491
492 spinlock_t lock;
493 int chip_id;
494 unsigned int cur_rx, dirty_rx;
495 unsigned int cur_tx, dirty_tx;
496 unsigned int rx_buf_sz;
497 unsigned int tx_full:1;
498 unsigned int duplex_lock:1;
499 unsigned int default_port:4;
500
501 int mii_cnt;
502 struct mii_if_info mii_if;
503 unsigned char phys[MII_CNT];
504 u32 rx_int_var, tx_int_var;
505 u32 option;
506 struct pci_dev *pci_dev;
507 void __iomem *base;
508};
509
510MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
511MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
512MODULE_LICENSE("GPL");
513
514module_param(max_interrupt_work, int, 0);
515module_param(mtu, int, 0);
516module_param(debug, int, 0);
517module_param(min_rx_pkt, int, 0);
518module_param(max_rx_gap, int, 0);
519module_param(max_rx_latency, int, 0);
520module_param(min_tx_pkt, int, 0);
521module_param(max_tx_gap, int, 0);
522module_param(max_tx_latency, int, 0);
523module_param(rx_copybreak, int, 0);
524module_param_array(rx_params, int, NULL, 0);
525module_param_array(tx_params, int, NULL, 0);
526module_param_array(options, int, NULL, 0);
527module_param_array(full_duplex, int, NULL, 0);
528module_param(force32, int, 0);
529MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
530MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
531MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
532MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
533MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
534MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
535MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
536MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
537MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
538MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
539MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
540MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
541MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
542MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
543MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
544
545static int read_eeprom(void __iomem *ioaddr, int location);
546static int mdio_read(struct net_device *dev, int phy_id, int location);
547static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
548static int hamachi_open(struct net_device *dev);
549static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
550static void hamachi_timer(struct timer_list *t);
551static void hamachi_tx_timeout(struct net_device *dev);
552static void hamachi_init_ring(struct net_device *dev);
553static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
554 struct net_device *dev);
555static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
556static int hamachi_rx(struct net_device *dev);
557static inline int hamachi_tx(struct net_device *dev);
558static void hamachi_error(struct net_device *dev, int intr_status);
559static int hamachi_close(struct net_device *dev);
560static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
561static void set_rx_mode(struct net_device *dev);
562static const struct ethtool_ops ethtool_ops;
563static const struct ethtool_ops ethtool_ops_no_mii;
564
565static const struct net_device_ops hamachi_netdev_ops = {
566 .ndo_open = hamachi_open,
567 .ndo_stop = hamachi_close,
568 .ndo_start_xmit = hamachi_start_xmit,
569 .ndo_get_stats = hamachi_get_stats,
570 .ndo_set_rx_mode = set_rx_mode,
571 .ndo_validate_addr = eth_validate_addr,
572 .ndo_set_mac_address = eth_mac_addr,
573 .ndo_tx_timeout = hamachi_tx_timeout,
574 .ndo_do_ioctl = netdev_ioctl,
575};
576
577
578static int hamachi_init_one(struct pci_dev *pdev,
579 const struct pci_device_id *ent)
580{
581 struct hamachi_private *hmp;
582 int option, i, rx_int_var, tx_int_var, boguscnt;
583 int chip_id = ent->driver_data;
584 int irq;
585 void __iomem *ioaddr;
586 unsigned long base;
587 static int card_idx;
588 struct net_device *dev;
589 void *ring_space;
590 dma_addr_t ring_dma;
591 int ret = -ENOMEM;
592
593
594#ifndef MODULE
595 static int printed_version;
596 if (!printed_version++)
597 printk(version);
598#endif
599
600 if (pci_enable_device(pdev)) {
601 ret = -EIO;
602 goto err_out;
603 }
604
605 base = pci_resource_start(pdev, 0);
606#ifdef __alpha__
607 base |= (pci_resource_start(pdev, 1) << 32);
608#endif
609
610 pci_set_master(pdev);
611
612 i = pci_request_regions(pdev, DRV_NAME);
613 if (i)
614 return i;
615
616 irq = pdev->irq;
617 ioaddr = ioremap(base, 0x400);
618 if (!ioaddr)
619 goto err_out_release;
620
621 dev = alloc_etherdev(sizeof(struct hamachi_private));
622 if (!dev)
623 goto err_out_iounmap;
624
625 SET_NETDEV_DEV(dev, &pdev->dev);
626
627 for (i = 0; i < 6; i++)
628 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
629 : readb(ioaddr + StationAddr + i);
630
631#if ! defined(final_version)
632 if (hamachi_debug > 4)
633 for (i = 0; i < 0x10; i++)
634 printk("%2.2x%s",
635 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
636#endif
637
638 hmp = netdev_priv(dev);
639 spin_lock_init(&hmp->lock);
640
641 hmp->mii_if.dev = dev;
642 hmp->mii_if.mdio_read = mdio_read;
643 hmp->mii_if.mdio_write = mdio_write;
644 hmp->mii_if.phy_id_mask = 0x1f;
645 hmp->mii_if.reg_num_mask = 0x1f;
646
647 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
648 if (!ring_space)
649 goto err_out_cleardev;
650 hmp->tx_ring = ring_space;
651 hmp->tx_ring_dma = ring_dma;
652
653 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
654 if (!ring_space)
655 goto err_out_unmap_tx;
656 hmp->rx_ring = ring_space;
657 hmp->rx_ring_dma = ring_dma;
658
659
660 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
661 if (dev->mem_start)
662 option = dev->mem_start;
663
664
665 force32 = force32 ? force32 :
666 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
667 if (force32)
668 writeb(force32, ioaddr + VirtualJumpers);
669
670
671 writeb(0x01, ioaddr + ChipReset);
672
673
674
675
676
677 udelay(10);
678 i = readb(ioaddr + PCIClkMeas);
679 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
680 udelay(10);
681 i = readb(ioaddr + PCIClkMeas);
682 }
683
684 hmp->base = ioaddr;
685 pci_set_drvdata(pdev, dev);
686
687 hmp->chip_id = chip_id;
688 hmp->pci_dev = pdev;
689
690
691 if (option > 0) {
692 hmp->option = option;
693 if (option & 0x200)
694 hmp->mii_if.full_duplex = 1;
695 else if (option & 0x080)
696 hmp->mii_if.full_duplex = 0;
697 hmp->default_port = option & 15;
698 if (hmp->default_port)
699 hmp->mii_if.force_media = 1;
700 }
701 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
702 hmp->mii_if.full_duplex = 1;
703
704
705 if (hmp->mii_if.full_duplex || (option & 0x080))
706 hmp->duplex_lock = 1;
707
708
709 max_rx_latency = max_rx_latency & 0x00ff;
710 max_rx_gap = max_rx_gap & 0x00ff;
711 min_rx_pkt = min_rx_pkt & 0x00ff;
712 max_tx_latency = max_tx_latency & 0x00ff;
713 max_tx_gap = max_tx_gap & 0x00ff;
714 min_tx_pkt = min_tx_pkt & 0x00ff;
715
716 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
717 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
718 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
719 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
720 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
721 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
722
723
724
725 dev->netdev_ops = &hamachi_netdev_ops;
726 dev->ethtool_ops = (chip_tbl[hmp->chip_id].flags & CanHaveMII) ?
727 ðtool_ops : ðtool_ops_no_mii;
728 dev->watchdog_timeo = TX_TIMEOUT;
729 if (mtu)
730 dev->mtu = mtu;
731
732 i = register_netdev(dev);
733 if (i) {
734 ret = i;
735 goto err_out_unmap_rx;
736 }
737
738 printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
739 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
740 ioaddr, dev->dev_addr, irq);
741 i = readb(ioaddr + PCIClkMeas);
742 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
743 "%2.2x, LPA %4.4x.\n",
744 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
745 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
746 readw(ioaddr + ANLinkPartnerAbility));
747
748 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
749 int phy, phy_idx = 0;
750 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
751 int mii_status = mdio_read(dev, phy, MII_BMSR);
752 if (mii_status != 0xffff &&
753 mii_status != 0x0000) {
754 hmp->phys[phy_idx++] = phy;
755 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
756 printk(KERN_INFO "%s: MII PHY found at address %d, status "
757 "0x%4.4x advertising %4.4x.\n",
758 dev->name, phy, mii_status, hmp->mii_if.advertising);
759 }
760 }
761 hmp->mii_cnt = phy_idx;
762 if (hmp->mii_cnt > 0)
763 hmp->mii_if.phy_id = hmp->phys[0];
764 else
765 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
766 }
767
768 writew(0x0400, ioaddr + ANXchngCtrl);
769 writew(0x08e0, ioaddr + ANAdvertise);
770 writew(0x1000, ioaddr + ANCtrl);
771
772 card_idx++;
773 return 0;
774
775err_out_unmap_rx:
776 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
777 hmp->rx_ring_dma);
778err_out_unmap_tx:
779 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
780 hmp->tx_ring_dma);
781err_out_cleardev:
782 free_netdev (dev);
783err_out_iounmap:
784 iounmap(ioaddr);
785err_out_release:
786 pci_release_regions(pdev);
787err_out:
788 return ret;
789}
790
791static int read_eeprom(void __iomem *ioaddr, int location)
792{
793 int bogus_cnt = 1000;
794
795
796 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
797 writew(location, ioaddr + EEAddr);
798 writeb(0x02, ioaddr + EECmdStatus);
799 bogus_cnt = 1000;
800 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
801 if (hamachi_debug > 5)
802 printk(" EEPROM status is %2.2x after %d ticks.\n",
803 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
804 return readb(ioaddr + EEData);
805}
806
807
808
809
810
811static int mdio_read(struct net_device *dev, int phy_id, int location)
812{
813 struct hamachi_private *hmp = netdev_priv(dev);
814 void __iomem *ioaddr = hmp->base;
815 int i;
816
817
818 for (i = 10000; i >= 0; i--)
819 if ((readw(ioaddr + MII_Status) & 1) == 0)
820 break;
821 writew((phy_id<<8) + location, ioaddr + MII_Addr);
822 writew(0x0001, ioaddr + MII_Cmd);
823 for (i = 10000; i >= 0; i--)
824 if ((readw(ioaddr + MII_Status) & 1) == 0)
825 break;
826 return readw(ioaddr + MII_Rd_Data);
827}
828
829static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
830{
831 struct hamachi_private *hmp = netdev_priv(dev);
832 void __iomem *ioaddr = hmp->base;
833 int i;
834
835
836 for (i = 10000; i >= 0; i--)
837 if ((readw(ioaddr + MII_Status) & 1) == 0)
838 break;
839 writew((phy_id<<8) + location, ioaddr + MII_Addr);
840 writew(value, ioaddr + MII_Wr_Data);
841
842
843 for (i = 10000; i >= 0; i--)
844 if ((readw(ioaddr + MII_Status) & 1) == 0)
845 break;
846}
847
848
849static int hamachi_open(struct net_device *dev)
850{
851 struct hamachi_private *hmp = netdev_priv(dev);
852 void __iomem *ioaddr = hmp->base;
853 int i;
854 u32 rx_int_var, tx_int_var;
855 u16 fifo_info;
856
857 i = request_irq(hmp->pci_dev->irq, hamachi_interrupt, IRQF_SHARED,
858 dev->name, dev);
859 if (i)
860 return i;
861
862 hamachi_init_ring(dev);
863
864#if ADDRLEN == 64
865
866 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
867 writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
868 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
869 writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
870#else
871 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
872 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
873#endif
874
875
876
877
878 for (i = 0; i < 6; i++)
879 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
880
881
882
883
884
885 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
886 switch (fifo_info){
887 case 0 :
888
889 writew(0x0000, ioaddr + FIFOcfg);
890 break;
891 case 1 :
892
893 writew(0x0028, ioaddr + FIFOcfg);
894 break;
895 case 2 :
896
897 writew(0x004C, ioaddr + FIFOcfg);
898 break;
899 case 3 :
900
901 writew(0x006C, ioaddr + FIFOcfg);
902 break;
903 default :
904 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
905 dev->name);
906
907 writew(0x0000, ioaddr + FIFOcfg);
908 break;
909 }
910
911 if (dev->if_port == 0)
912 dev->if_port = hmp->default_port;
913
914
915
916
917 if (hmp->duplex_lock != 1)
918 hmp->mii_if.full_duplex = 1;
919
920
921 writew(0x0001, ioaddr + RxChecksum);
922 writew(0x0000, ioaddr + TxChecksum);
923 writew(0x8000, ioaddr + MACCnfg);
924 writew(0x215F, ioaddr + MACCnfg);
925 writew(0x000C, ioaddr + FrameGap0);
926
927 writew(0x1018, ioaddr + FrameGap1);
928
929 writew(0x0780, ioaddr + MACCnfg2);
930
931 writel(0x0030FFFF, ioaddr + FlowCtrl);
932 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize);
933
934
935 writew(0x0400, ioaddr + ANXchngCtrl);
936
937 writeb(0x03, ioaddr + LEDCtrl);
938
939
940
941
942 rx_int_var = hmp->rx_int_var;
943 tx_int_var = hmp->tx_int_var;
944
945 if (hamachi_debug > 1) {
946 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
947 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
948 (tx_int_var & 0x00ff0000) >> 16);
949 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
950 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
951 (rx_int_var & 0x00ff0000) >> 16);
952 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
953 }
954
955 writel(tx_int_var, ioaddr + TxIntrCtrl);
956 writel(rx_int_var, ioaddr + RxIntrCtrl);
957
958 set_rx_mode(dev);
959
960 netif_start_queue(dev);
961
962
963 writel(0x80878787, ioaddr + InterruptEnable);
964 writew(0x0000, ioaddr + EventStatus);
965
966
967
968#if ADDRLEN == 64
969 writew(0x005D, ioaddr + RxDMACtrl);
970 writew(0x005D, ioaddr + TxDMACtrl);
971#else
972 writew(0x001D, ioaddr + RxDMACtrl);
973 writew(0x001D, ioaddr + TxDMACtrl);
974#endif
975 writew(0x0001, ioaddr + RxCmd);
976
977 if (hamachi_debug > 2) {
978 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
979 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
980 }
981
982 timer_setup(&hmp->timer, hamachi_timer, 0);
983 hmp->timer.expires = RUN_AT((24*HZ)/10);
984 add_timer(&hmp->timer);
985
986 return 0;
987}
988
989static inline int hamachi_tx(struct net_device *dev)
990{
991 struct hamachi_private *hmp = netdev_priv(dev);
992
993
994
995 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
996 int entry = hmp->dirty_tx % TX_RING_SIZE;
997 struct sk_buff *skb;
998
999 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1000 break;
1001
1002 skb = hmp->tx_skbuff[entry];
1003 if (skb) {
1004 pci_unmap_single(hmp->pci_dev,
1005 leXX_to_cpu(hmp->tx_ring[entry].addr),
1006 skb->len, PCI_DMA_TODEVICE);
1007 dev_kfree_skb(skb);
1008 hmp->tx_skbuff[entry] = NULL;
1009 }
1010 hmp->tx_ring[entry].status_n_length = 0;
1011 if (entry >= TX_RING_SIZE-1)
1012 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1013 cpu_to_le32(DescEndRing);
1014 dev->stats.tx_packets++;
1015 }
1016
1017 return 0;
1018}
1019
1020static void hamachi_timer(struct timer_list *t)
1021{
1022 struct hamachi_private *hmp = from_timer(hmp, t, timer);
1023 struct net_device *dev = hmp->mii_if.dev;
1024 void __iomem *ioaddr = hmp->base;
1025 int next_tick = 10*HZ;
1026
1027 if (hamachi_debug > 2) {
1028 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1029 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1030 readw(ioaddr + ANLinkPartnerAbility));
1031 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1032 "%4.4x %4.4x %4.4x.\n", dev->name,
1033 readw(ioaddr + 0x0e0),
1034 readw(ioaddr + 0x0e2),
1035 readw(ioaddr + 0x0e4),
1036 readw(ioaddr + 0x0e6),
1037 readw(ioaddr + 0x0e8),
1038 readw(ioaddr + 0x0eA));
1039 }
1040
1041 hmp->timer.expires = RUN_AT(next_tick);
1042 add_timer(&hmp->timer);
1043}
1044
1045static void hamachi_tx_timeout(struct net_device *dev)
1046{
1047 int i;
1048 struct hamachi_private *hmp = netdev_priv(dev);
1049 void __iomem *ioaddr = hmp->base;
1050
1051 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1052 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1053
1054 {
1055 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1056 for (i = 0; i < RX_RING_SIZE; i++)
1057 printk(KERN_CONT " %8.8x",
1058 le32_to_cpu(hmp->rx_ring[i].status_n_length));
1059 printk(KERN_CONT "\n");
1060 printk(KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1061 for (i = 0; i < TX_RING_SIZE; i++)
1062 printk(KERN_CONT " %4.4x",
1063 le32_to_cpu(hmp->tx_ring[i].status_n_length));
1064 printk(KERN_CONT "\n");
1065 }
1066
1067
1068
1069
1070 dev->if_port = 0;
1071
1072
1073
1074
1075
1076
1077
1078 for (i = 0; i < RX_RING_SIZE; i++)
1079 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1080
1081
1082
1083
1084 for (i = 0; i < TX_RING_SIZE; i++){
1085 struct sk_buff *skb;
1086
1087 if (i >= TX_RING_SIZE - 1)
1088 hmp->tx_ring[i].status_n_length =
1089 cpu_to_le32(DescEndRing) |
1090 (hmp->tx_ring[i].status_n_length &
1091 cpu_to_le32(0x0000ffff));
1092 else
1093 hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1094 skb = hmp->tx_skbuff[i];
1095 if (skb){
1096 pci_unmap_single(hmp->pci_dev, leXX_to_cpu(hmp->tx_ring[i].addr),
1097 skb->len, PCI_DMA_TODEVICE);
1098 dev_kfree_skb(skb);
1099 hmp->tx_skbuff[i] = NULL;
1100 }
1101 }
1102
1103 udelay(60);
1104 writew(0x0002, ioaddr + RxCmd);
1105
1106 writeb(0x01, ioaddr + ChipReset);
1107
1108 hmp->tx_full = 0;
1109 hmp->cur_rx = hmp->cur_tx = 0;
1110 hmp->dirty_rx = hmp->dirty_tx = 0;
1111
1112
1113
1114 for (i = 0; i < RX_RING_SIZE; i++){
1115 struct sk_buff *skb = hmp->rx_skbuff[i];
1116
1117 if (skb){
1118 pci_unmap_single(hmp->pci_dev,
1119 leXX_to_cpu(hmp->rx_ring[i].addr),
1120 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1121 dev_kfree_skb(skb);
1122 hmp->rx_skbuff[i] = NULL;
1123 }
1124 }
1125
1126 for (i = 0; i < RX_RING_SIZE; i++) {
1127 struct sk_buff *skb;
1128
1129 skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz);
1130 hmp->rx_skbuff[i] = skb;
1131 if (skb == NULL)
1132 break;
1133
1134 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1135 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1136 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1137 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1138 }
1139 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1140
1141 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1142
1143
1144 netif_trans_update(dev);
1145 dev->stats.tx_errors++;
1146
1147
1148 writew(0x0002, ioaddr + TxCmd);
1149 writew(0x0001, ioaddr + TxCmd);
1150 writew(0x0001, ioaddr + RxCmd);
1151
1152 netif_wake_queue(dev);
1153}
1154
1155
1156
1157static void hamachi_init_ring(struct net_device *dev)
1158{
1159 struct hamachi_private *hmp = netdev_priv(dev);
1160 int i;
1161
1162 hmp->tx_full = 0;
1163 hmp->cur_rx = hmp->cur_tx = 0;
1164 hmp->dirty_rx = hmp->dirty_tx = 0;
1165
1166
1167
1168
1169
1170
1171 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1172 (((dev->mtu+26+7) & ~7) + 16));
1173
1174
1175 for (i = 0; i < RX_RING_SIZE; i++) {
1176 hmp->rx_ring[i].status_n_length = 0;
1177 hmp->rx_skbuff[i] = NULL;
1178 }
1179
1180 for (i = 0; i < RX_RING_SIZE; i++) {
1181 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1182 hmp->rx_skbuff[i] = skb;
1183 if (skb == NULL)
1184 break;
1185 skb_reserve(skb, 2);
1186 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1187 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1188
1189 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1190 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1191 }
1192 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1193 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1194
1195 for (i = 0; i < TX_RING_SIZE; i++) {
1196 hmp->tx_skbuff[i] = NULL;
1197 hmp->tx_ring[i].status_n_length = 0;
1198 }
1199
1200 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1201}
1202
1203
1204static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
1205 struct net_device *dev)
1206{
1207 struct hamachi_private *hmp = netdev_priv(dev);
1208 unsigned entry;
1209 u16 status;
1210
1211
1212
1213
1214
1215
1216 if (hmp->tx_full) {
1217
1218 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1219
1220
1221
1222 status=readw(hmp->base + TxStatus);
1223 if( !(status & 0x0001) || (status & 0x0002))
1224 writew(0x0001, hmp->base + TxCmd);
1225 return NETDEV_TX_BUSY;
1226 }
1227
1228
1229
1230
1231
1232 entry = hmp->cur_tx % TX_RING_SIZE;
1233
1234 hmp->tx_skbuff[entry] = skb;
1235
1236 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1237 skb->data, skb->len, PCI_DMA_TODEVICE));
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248 if (entry >= TX_RING_SIZE-1)
1249 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1250 DescEndPacket | DescEndRing | DescIntr | skb->len);
1251 else
1252 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1253 DescEndPacket | DescIntr | skb->len);
1254 hmp->cur_tx++;
1255
1256
1257
1258
1259
1260 status=readw(hmp->base + TxStatus);
1261 if( !(status & 0x0001) || (status & 0x0002))
1262 writew(0x0001, hmp->base + TxCmd);
1263
1264
1265 hamachi_tx(dev);
1266
1267
1268
1269
1270
1271
1272
1273 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1274 netif_wake_queue(dev);
1275 else {
1276 hmp->tx_full = 1;
1277 netif_stop_queue(dev);
1278 }
1279
1280 if (hamachi_debug > 4) {
1281 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1282 dev->name, hmp->cur_tx, entry);
1283 }
1284 return NETDEV_TX_OK;
1285}
1286
1287
1288
1289static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1290{
1291 struct net_device *dev = dev_instance;
1292 struct hamachi_private *hmp = netdev_priv(dev);
1293 void __iomem *ioaddr = hmp->base;
1294 long boguscnt = max_interrupt_work;
1295 int handled = 0;
1296
1297#ifndef final_version
1298 if (dev == NULL) {
1299 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1300 return IRQ_NONE;
1301 }
1302#endif
1303
1304 spin_lock(&hmp->lock);
1305
1306 do {
1307 u32 intr_status = readl(ioaddr + InterruptClear);
1308
1309 if (hamachi_debug > 4)
1310 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1311 dev->name, intr_status);
1312
1313 if (intr_status == 0)
1314 break;
1315
1316 handled = 1;
1317
1318 if (intr_status & IntrRxDone)
1319 hamachi_rx(dev);
1320
1321 if (intr_status & IntrTxDone){
1322
1323
1324
1325
1326 if (hmp->tx_full){
1327 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1328 int entry = hmp->dirty_tx % TX_RING_SIZE;
1329 struct sk_buff *skb;
1330
1331 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1332 break;
1333 skb = hmp->tx_skbuff[entry];
1334
1335 if (skb){
1336 pci_unmap_single(hmp->pci_dev,
1337 leXX_to_cpu(hmp->tx_ring[entry].addr),
1338 skb->len,
1339 PCI_DMA_TODEVICE);
1340 dev_kfree_skb_irq(skb);
1341 hmp->tx_skbuff[entry] = NULL;
1342 }
1343 hmp->tx_ring[entry].status_n_length = 0;
1344 if (entry >= TX_RING_SIZE-1)
1345 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1346 cpu_to_le32(DescEndRing);
1347 dev->stats.tx_packets++;
1348 }
1349 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1350
1351 hmp->tx_full = 0;
1352 netif_wake_queue(dev);
1353 }
1354 } else {
1355 netif_wake_queue(dev);
1356 }
1357 }
1358
1359
1360
1361 if (intr_status &
1362 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1363 LinkChange | NegotiationChange | StatsMax))
1364 hamachi_error(dev, intr_status);
1365
1366 if (--boguscnt < 0) {
1367 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1368 dev->name, intr_status);
1369 break;
1370 }
1371 } while (1);
1372
1373 if (hamachi_debug > 3)
1374 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1375 dev->name, readl(ioaddr + IntrStatus));
1376
1377#ifndef final_version
1378
1379 {
1380 static int stopit = 10;
1381 if (dev->start == 0 && --stopit < 0) {
1382 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1383 dev->name);
1384 free_irq(irq, dev);
1385 }
1386 }
1387#endif
1388
1389 spin_unlock(&hmp->lock);
1390 return IRQ_RETVAL(handled);
1391}
1392
1393
1394
1395static int hamachi_rx(struct net_device *dev)
1396{
1397 struct hamachi_private *hmp = netdev_priv(dev);
1398 int entry = hmp->cur_rx % RX_RING_SIZE;
1399 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1400
1401 if (hamachi_debug > 4) {
1402 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1403 entry, hmp->rx_ring[entry].status_n_length);
1404 }
1405
1406
1407 while (1) {
1408 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1409 u32 desc_status = le32_to_cpu(desc->status_n_length);
1410 u16 data_size = desc_status;
1411 u8 *buf_addr;
1412 s32 frame_status;
1413
1414 if (desc_status & DescOwn)
1415 break;
1416 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1417 leXX_to_cpu(desc->addr),
1418 hmp->rx_buf_sz,
1419 PCI_DMA_FROMDEVICE);
1420 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1421 frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1422 if (hamachi_debug > 4)
1423 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1424 frame_status);
1425 if (--boguscnt < 0)
1426 break;
1427 if ( ! (desc_status & DescEndPacket)) {
1428 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1429 "multiple buffers, entry %#x length %d status %4.4x!\n",
1430 dev->name, hmp->cur_rx, data_size, desc_status);
1431 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1432 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1433 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1434 dev->name,
1435 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1436 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1437 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1438 dev->stats.rx_length_errors++;
1439 }
1440 if (frame_status & 0x00380000) {
1441
1442 if (hamachi_debug > 2)
1443 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1444 frame_status);
1445 dev->stats.rx_errors++;
1446 if (frame_status & 0x00600000)
1447 dev->stats.rx_length_errors++;
1448 if (frame_status & 0x00080000)
1449 dev->stats.rx_frame_errors++;
1450 if (frame_status & 0x00100000)
1451 dev->stats.rx_crc_errors++;
1452 if (frame_status < 0)
1453 dev->stats.rx_dropped++;
1454 } else {
1455 struct sk_buff *skb;
1456
1457 u16 pkt_len = (frame_status & 0x07ff) - 4;
1458#ifdef RX_CHECKSUM
1459 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1460#endif
1461
1462
1463#ifndef final_version
1464 if (hamachi_debug > 4)
1465 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1466 " of %d, bogus_cnt %d.\n",
1467 pkt_len, data_size, boguscnt);
1468 if (hamachi_debug > 5)
1469 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1470 dev->name,
1471 *(s32*)&(buf_addr[data_size - 20]),
1472 *(s32*)&(buf_addr[data_size - 16]),
1473 *(s32*)&(buf_addr[data_size - 12]),
1474 *(s32*)&(buf_addr[data_size - 8]),
1475 *(s32*)&(buf_addr[data_size - 4]));
1476#endif
1477
1478
1479 if (pkt_len < rx_copybreak &&
1480 (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {
1481#ifdef RX_CHECKSUM
1482 printk(KERN_ERR "%s: rx_copybreak non-zero "
1483 "not good with RX_CHECKSUM\n", dev->name);
1484#endif
1485 skb_reserve(skb, 2);
1486 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1487 leXX_to_cpu(hmp->rx_ring[entry].addr),
1488 hmp->rx_buf_sz,
1489 PCI_DMA_FROMDEVICE);
1490
1491#if 1 || USE_IP_COPYSUM
1492 skb_copy_to_linear_data(skb,
1493 hmp->rx_skbuff[entry]->data, pkt_len);
1494 skb_put(skb, pkt_len);
1495#else
1496 skb_put_data(skb, hmp->rx_ring_dma
1497 + entry*sizeof(*desc), pkt_len);
1498#endif
1499 pci_dma_sync_single_for_device(hmp->pci_dev,
1500 leXX_to_cpu(hmp->rx_ring[entry].addr),
1501 hmp->rx_buf_sz,
1502 PCI_DMA_FROMDEVICE);
1503 } else {
1504 pci_unmap_single(hmp->pci_dev,
1505 leXX_to_cpu(hmp->rx_ring[entry].addr),
1506 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1507 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1508 hmp->rx_skbuff[entry] = NULL;
1509 }
1510 skb->protocol = eth_type_trans(skb, dev);
1511
1512
1513#ifdef RX_CHECKSUM
1514
1515 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1516 struct iphdr *ih = (struct iphdr *) skb->data;
1517
1518
1519
1520
1521 if (ntohs(ih->tot_len) >= 46){
1522
1523 if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) {
1524 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1525 u32 *p = (u32 *) &buf_addr[data_size - 20];
1526 register u32 crc, p_r, p_r1;
1527
1528 if (inv & 4) {
1529 inv &= ~4;
1530 --p;
1531 }
1532 p_r = *p;
1533 p_r1 = *(p-1);
1534 switch (inv) {
1535 case 0:
1536 crc = (p_r & 0xffff) + (p_r >> 16);
1537 break;
1538 case 1:
1539 crc = (p_r >> 16) + (p_r & 0xffff)
1540 + (p_r1 >> 16 & 0xff00);
1541 break;
1542 case 2:
1543 crc = p_r + (p_r1 >> 16);
1544 break;
1545 case 3:
1546 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1547 break;
1548 default: crc = 0;
1549 }
1550 if (crc & 0xffff0000) {
1551 crc &= 0xffff;
1552 ++crc;
1553 }
1554
1555 skb->csum = ntohs(pfck & 0xffff);
1556 if (skb->csum > crc)
1557 skb->csum -= crc;
1558 else
1559 skb->csum += (~crc & 0xffff);
1560
1561
1562
1563
1564 skb->ip_summed = CHECKSUM_COMPLETE;
1565 }
1566 }
1567 }
1568#endif
1569
1570 netif_rx(skb);
1571 dev->stats.rx_packets++;
1572 }
1573 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1574 }
1575
1576
1577 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1578 struct hamachi_desc *desc;
1579
1580 entry = hmp->dirty_rx % RX_RING_SIZE;
1581 desc = &(hmp->rx_ring[entry]);
1582 if (hmp->rx_skbuff[entry] == NULL) {
1583 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1584
1585 hmp->rx_skbuff[entry] = skb;
1586 if (skb == NULL)
1587 break;
1588 skb_reserve(skb, 2);
1589 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1590 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1591 }
1592 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1593 if (entry >= RX_RING_SIZE-1)
1594 desc->status_n_length |= cpu_to_le32(DescOwn |
1595 DescEndPacket | DescEndRing | DescIntr);
1596 else
1597 desc->status_n_length |= cpu_to_le32(DescOwn |
1598 DescEndPacket | DescIntr);
1599 }
1600
1601
1602
1603 if (readw(hmp->base + RxStatus) & 0x0002)
1604 writew(0x0001, hmp->base + RxCmd);
1605
1606 return 0;
1607}
1608
1609
1610
1611static void hamachi_error(struct net_device *dev, int intr_status)
1612{
1613 struct hamachi_private *hmp = netdev_priv(dev);
1614 void __iomem *ioaddr = hmp->base;
1615
1616 if (intr_status & (LinkChange|NegotiationChange)) {
1617 if (hamachi_debug > 1)
1618 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1619 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1620 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1621 readw(ioaddr + ANLinkPartnerAbility),
1622 readl(ioaddr + IntrStatus));
1623 if (readw(ioaddr + ANStatus) & 0x20)
1624 writeb(0x01, ioaddr + LEDCtrl);
1625 else
1626 writeb(0x03, ioaddr + LEDCtrl);
1627 }
1628 if (intr_status & StatsMax) {
1629 hamachi_get_stats(dev);
1630
1631 readl(ioaddr + 0x370);
1632 readl(ioaddr + 0x3F0);
1633 }
1634 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) &&
1635 hamachi_debug)
1636 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1637 dev->name, intr_status);
1638
1639 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1640 dev->stats.tx_fifo_errors++;
1641 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1642 dev->stats.rx_fifo_errors++;
1643}
1644
1645static int hamachi_close(struct net_device *dev)
1646{
1647 struct hamachi_private *hmp = netdev_priv(dev);
1648 void __iomem *ioaddr = hmp->base;
1649 struct sk_buff *skb;
1650 int i;
1651
1652 netif_stop_queue(dev);
1653
1654 if (hamachi_debug > 1) {
1655 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1656 dev->name, readw(ioaddr + TxStatus),
1657 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1658 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1659 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1660 }
1661
1662
1663 writel(0x0000, ioaddr + InterruptEnable);
1664
1665
1666 writel(2, ioaddr + RxCmd);
1667 writew(2, ioaddr + TxCmd);
1668
1669#ifdef __i386__
1670 if (hamachi_debug > 2) {
1671 printk(KERN_DEBUG " Tx ring at %8.8x:\n",
1672 (int)hmp->tx_ring_dma);
1673 for (i = 0; i < TX_RING_SIZE; i++)
1674 printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n",
1675 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1676 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1677 printk(KERN_DEBUG " Rx ring %8.8x:\n",
1678 (int)hmp->rx_ring_dma);
1679 for (i = 0; i < RX_RING_SIZE; i++) {
1680 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1681 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1682 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1683 if (hamachi_debug > 6) {
1684 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1685 u16 *addr = (u16 *)
1686 hmp->rx_skbuff[i]->data;
1687 int j;
1688 printk(KERN_DEBUG "Addr: ");
1689 for (j = 0; j < 0x50; j++)
1690 printk(" %4.4x", addr[j]);
1691 printk("\n");
1692 }
1693 }
1694 }
1695 }
1696#endif
1697
1698 free_irq(hmp->pci_dev->irq, dev);
1699
1700 del_timer_sync(&hmp->timer);
1701
1702
1703 for (i = 0; i < RX_RING_SIZE; i++) {
1704 skb = hmp->rx_skbuff[i];
1705 hmp->rx_ring[i].status_n_length = 0;
1706 if (skb) {
1707 pci_unmap_single(hmp->pci_dev,
1708 leXX_to_cpu(hmp->rx_ring[i].addr),
1709 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1710 dev_kfree_skb(skb);
1711 hmp->rx_skbuff[i] = NULL;
1712 }
1713 hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0);
1714 }
1715 for (i = 0; i < TX_RING_SIZE; i++) {
1716 skb = hmp->tx_skbuff[i];
1717 if (skb) {
1718 pci_unmap_single(hmp->pci_dev,
1719 leXX_to_cpu(hmp->tx_ring[i].addr),
1720 skb->len, PCI_DMA_TODEVICE);
1721 dev_kfree_skb(skb);
1722 hmp->tx_skbuff[i] = NULL;
1723 }
1724 }
1725
1726 writeb(0x00, ioaddr + LEDCtrl);
1727
1728 return 0;
1729}
1730
1731static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1732{
1733 struct hamachi_private *hmp = netdev_priv(dev);
1734 void __iomem *ioaddr = hmp->base;
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747 dev->stats.rx_bytes = readl(ioaddr + 0x330);
1748
1749 dev->stats.tx_bytes = readl(ioaddr + 0x3B0);
1750
1751 dev->stats.multicast = readl(ioaddr + 0x320);
1752
1753
1754 dev->stats.rx_length_errors = readl(ioaddr + 0x368);
1755
1756 dev->stats.rx_over_errors = readl(ioaddr + 0x35C);
1757
1758 dev->stats.rx_crc_errors = readl(ioaddr + 0x360);
1759
1760 dev->stats.rx_frame_errors = readl(ioaddr + 0x364);
1761
1762 dev->stats.rx_missed_errors = readl(ioaddr + 0x36C);
1763
1764 return &dev->stats;
1765}
1766
1767static void set_rx_mode(struct net_device *dev)
1768{
1769 struct hamachi_private *hmp = netdev_priv(dev);
1770 void __iomem *ioaddr = hmp->base;
1771
1772 if (dev->flags & IFF_PROMISC) {
1773 writew(0x000F, ioaddr + AddrMode);
1774 } else if ((netdev_mc_count(dev) > 63) || (dev->flags & IFF_ALLMULTI)) {
1775
1776 writew(0x000B, ioaddr + AddrMode);
1777 } else if (!netdev_mc_empty(dev)) {
1778 struct netdev_hw_addr *ha;
1779 int i = 0;
1780
1781 netdev_for_each_mc_addr(ha, dev) {
1782 writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8);
1783 writel(0x20000 | (*(u16 *)&ha->addr[4]),
1784 ioaddr + 0x104 + i*8);
1785 i++;
1786 }
1787
1788 for (; i < 64; i++)
1789 writel(0, ioaddr + 0x104 + i*8);
1790 writew(0x0003, ioaddr + AddrMode);
1791 } else {
1792 writew(0x0001, ioaddr + AddrMode);
1793 }
1794}
1795
1796static int check_if_running(struct net_device *dev)
1797{
1798 if (!netif_running(dev))
1799 return -EINVAL;
1800 return 0;
1801}
1802
1803static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1804{
1805 struct hamachi_private *np = netdev_priv(dev);
1806
1807 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1808 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1809 strlcpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info));
1810}
1811
1812static int hamachi_get_link_ksettings(struct net_device *dev,
1813 struct ethtool_link_ksettings *cmd)
1814{
1815 struct hamachi_private *np = netdev_priv(dev);
1816 spin_lock_irq(&np->lock);
1817 mii_ethtool_get_link_ksettings(&np->mii_if, cmd);
1818 spin_unlock_irq(&np->lock);
1819 return 0;
1820}
1821
1822static int hamachi_set_link_ksettings(struct net_device *dev,
1823 const struct ethtool_link_ksettings *cmd)
1824{
1825 struct hamachi_private *np = netdev_priv(dev);
1826 int res;
1827 spin_lock_irq(&np->lock);
1828 res = mii_ethtool_set_link_ksettings(&np->mii_if, cmd);
1829 spin_unlock_irq(&np->lock);
1830 return res;
1831}
1832
1833static int hamachi_nway_reset(struct net_device *dev)
1834{
1835 struct hamachi_private *np = netdev_priv(dev);
1836 return mii_nway_restart(&np->mii_if);
1837}
1838
1839static u32 hamachi_get_link(struct net_device *dev)
1840{
1841 struct hamachi_private *np = netdev_priv(dev);
1842 return mii_link_ok(&np->mii_if);
1843}
1844
1845static const struct ethtool_ops ethtool_ops = {
1846 .begin = check_if_running,
1847 .get_drvinfo = hamachi_get_drvinfo,
1848 .nway_reset = hamachi_nway_reset,
1849 .get_link = hamachi_get_link,
1850 .get_link_ksettings = hamachi_get_link_ksettings,
1851 .set_link_ksettings = hamachi_set_link_ksettings,
1852};
1853
1854static const struct ethtool_ops ethtool_ops_no_mii = {
1855 .begin = check_if_running,
1856 .get_drvinfo = hamachi_get_drvinfo,
1857};
1858
1859static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1860{
1861 struct hamachi_private *np = netdev_priv(dev);
1862 struct mii_ioctl_data *data = if_mii(rq);
1863 int rc;
1864
1865 if (!netif_running(dev))
1866 return -EINVAL;
1867
1868 if (cmd == (SIOCDEVPRIVATE+3)) {
1869 u32 *d = (u32 *)&rq->ifr_ifru;
1870
1871
1872
1873
1874
1875 if (!capable(CAP_NET_ADMIN))
1876 return -EPERM;
1877 writel(d[0], np->base + TxIntrCtrl);
1878 writel(d[1], np->base + RxIntrCtrl);
1879 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1880 (u32) readl(np->base + TxIntrCtrl),
1881 (u32) readl(np->base + RxIntrCtrl));
1882 rc = 0;
1883 }
1884
1885 else {
1886 spin_lock_irq(&np->lock);
1887 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1888 spin_unlock_irq(&np->lock);
1889 }
1890
1891 return rc;
1892}
1893
1894
1895static void hamachi_remove_one(struct pci_dev *pdev)
1896{
1897 struct net_device *dev = pci_get_drvdata(pdev);
1898
1899 if (dev) {
1900 struct hamachi_private *hmp = netdev_priv(dev);
1901
1902 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1903 hmp->rx_ring_dma);
1904 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1905 hmp->tx_ring_dma);
1906 unregister_netdev(dev);
1907 iounmap(hmp->base);
1908 free_netdev(dev);
1909 pci_release_regions(pdev);
1910 }
1911}
1912
1913static const struct pci_device_id hamachi_pci_tbl[] = {
1914 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1915 { 0, }
1916};
1917MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1918
1919static struct pci_driver hamachi_driver = {
1920 .name = DRV_NAME,
1921 .id_table = hamachi_pci_tbl,
1922 .probe = hamachi_init_one,
1923 .remove = hamachi_remove_one,
1924};
1925
1926static int __init hamachi_init (void)
1927{
1928
1929#ifdef MODULE
1930 printk(version);
1931#endif
1932 return pci_register_driver(&hamachi_driver);
1933}
1934
1935static void __exit hamachi_exit (void)
1936{
1937 pci_unregister_driver(&hamachi_driver);
1938}
1939
1940
1941module_init(hamachi_init);
1942module_exit(hamachi_exit);
1943