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30#include <linux/delay.h>
31#include <linux/etherdevice.h>
32#include <linux/mii.h>
33#include <linux/module.h>
34#include <linux/mutex.h>
35#include <linux/netdevice.h>
36#include <linux/of.h>
37#include <linux/of_device.h>
38#include <linux/of_irq.h>
39#include <linux/of_mdio.h>
40#include <linux/of_net.h>
41#include <linux/of_platform.h>
42#include <linux/of_address.h>
43#include <linux/skbuff.h>
44#include <linux/spinlock.h>
45#include <linux/tcp.h>
46#include <linux/udp.h>
47#include <linux/phy.h>
48#include <linux/in.h>
49#include <linux/io.h>
50#include <linux/ip.h>
51#include <linux/slab.h>
52#include <linux/interrupt.h>
53#include <linux/dma-mapping.h>
54
55#include "ll_temac.h"
56
57#define TX_BD_NUM 64
58#define RX_BD_NUM 128
59
60
61
62
63
64u32 temac_ior(struct temac_local *lp, int offset)
65{
66 return in_be32(lp->regs + offset);
67}
68
69void temac_iow(struct temac_local *lp, int offset, u32 value)
70{
71 out_be32(lp->regs + offset, value);
72}
73
74int temac_indirect_busywait(struct temac_local *lp)
75{
76 unsigned long end = jiffies + 2;
77
78 while (!(temac_ior(lp, XTE_RDY0_OFFSET) & XTE_RDY0_HARD_ACS_RDY_MASK)) {
79 if (time_before_eq(end, jiffies)) {
80 WARN_ON(1);
81 return -ETIMEDOUT;
82 }
83 msleep(1);
84 }
85 return 0;
86}
87
88
89
90
91
92
93u32 temac_indirect_in32(struct temac_local *lp, int reg)
94{
95 u32 val;
96
97 if (temac_indirect_busywait(lp))
98 return -ETIMEDOUT;
99 temac_iow(lp, XTE_CTL0_OFFSET, reg);
100 if (temac_indirect_busywait(lp))
101 return -ETIMEDOUT;
102 val = temac_ior(lp, XTE_LSW0_OFFSET);
103
104 return val;
105}
106
107
108
109
110
111
112void temac_indirect_out32(struct temac_local *lp, int reg, u32 value)
113{
114 if (temac_indirect_busywait(lp))
115 return;
116 temac_iow(lp, XTE_LSW0_OFFSET, value);
117 temac_iow(lp, XTE_CTL0_OFFSET, CNTLREG_WRITE_ENABLE_MASK | reg);
118 temac_indirect_busywait(lp);
119}
120
121
122
123
124
125
126static u32 temac_dma_in32(struct temac_local *lp, int reg)
127{
128 return in_be32(lp->sdma_regs + (reg << 2));
129}
130
131
132
133
134
135
136static void temac_dma_out32(struct temac_local *lp, int reg, u32 value)
137{
138 out_be32(lp->sdma_regs + (reg << 2), value);
139}
140
141
142
143
144
145#ifdef CONFIG_PPC_DCR
146
147
148
149
150static u32 temac_dma_dcr_in(struct temac_local *lp, int reg)
151{
152 return dcr_read(lp->sdma_dcrs, reg);
153}
154
155
156
157
158static void temac_dma_dcr_out(struct temac_local *lp, int reg, u32 value)
159{
160 dcr_write(lp->sdma_dcrs, reg, value);
161}
162
163
164
165
166
167static int temac_dcr_setup(struct temac_local *lp, struct platform_device *op,
168 struct device_node *np)
169{
170 unsigned int dcrs;
171
172
173
174 dcrs = dcr_resource_start(np, 0);
175 if (dcrs != 0) {
176 lp->sdma_dcrs = dcr_map(np, dcrs, dcr_resource_len(np, 0));
177 lp->dma_in = temac_dma_dcr_in;
178 lp->dma_out = temac_dma_dcr_out;
179 dev_dbg(&op->dev, "DCR base: %x\n", dcrs);
180 return 0;
181 }
182
183 return -1;
184}
185
186#else
187
188
189
190
191
192static int temac_dcr_setup(struct temac_local *lp, struct platform_device *op,
193 struct device_node *np)
194{
195 return -1;
196}
197
198#endif
199
200
201
202
203static void temac_dma_bd_release(struct net_device *ndev)
204{
205 struct temac_local *lp = netdev_priv(ndev);
206 int i;
207
208
209 lp->dma_out(lp, DMA_CONTROL_REG, DMA_CONTROL_RST);
210
211 for (i = 0; i < RX_BD_NUM; i++) {
212 if (!lp->rx_skb[i])
213 break;
214 else {
215 dma_unmap_single(ndev->dev.parent, lp->rx_bd_v[i].phys,
216 XTE_MAX_JUMBO_FRAME_SIZE, DMA_FROM_DEVICE);
217 dev_kfree_skb(lp->rx_skb[i]);
218 }
219 }
220 if (lp->rx_bd_v)
221 dma_free_coherent(ndev->dev.parent,
222 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
223 lp->rx_bd_v, lp->rx_bd_p);
224 if (lp->tx_bd_v)
225 dma_free_coherent(ndev->dev.parent,
226 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
227 lp->tx_bd_v, lp->tx_bd_p);
228 kfree(lp->rx_skb);
229}
230
231
232
233
234static int temac_dma_bd_init(struct net_device *ndev)
235{
236 struct temac_local *lp = netdev_priv(ndev);
237 struct sk_buff *skb;
238 int i;
239
240 lp->rx_skb = kcalloc(RX_BD_NUM, sizeof(*lp->rx_skb), GFP_KERNEL);
241 if (!lp->rx_skb)
242 goto out;
243
244
245
246 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
247 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
248 &lp->tx_bd_p, GFP_KERNEL);
249 if (!lp->tx_bd_v)
250 goto out;
251
252 lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
253 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
254 &lp->rx_bd_p, GFP_KERNEL);
255 if (!lp->rx_bd_v)
256 goto out;
257
258 for (i = 0; i < TX_BD_NUM; i++) {
259 lp->tx_bd_v[i].next = lp->tx_bd_p +
260 sizeof(*lp->tx_bd_v) * ((i + 1) % TX_BD_NUM);
261 }
262
263 for (i = 0; i < RX_BD_NUM; i++) {
264 lp->rx_bd_v[i].next = lp->rx_bd_p +
265 sizeof(*lp->rx_bd_v) * ((i + 1) % RX_BD_NUM);
266
267 skb = netdev_alloc_skb_ip_align(ndev,
268 XTE_MAX_JUMBO_FRAME_SIZE);
269 if (!skb)
270 goto out;
271
272 lp->rx_skb[i] = skb;
273
274 lp->rx_bd_v[i].phys = dma_map_single(ndev->dev.parent,
275 skb->data,
276 XTE_MAX_JUMBO_FRAME_SIZE,
277 DMA_FROM_DEVICE);
278 lp->rx_bd_v[i].len = XTE_MAX_JUMBO_FRAME_SIZE;
279 lp->rx_bd_v[i].app0 = STS_CTRL_APP0_IRQONEND;
280 }
281
282 lp->dma_out(lp, TX_CHNL_CTRL, 0x10220400 |
283 CHNL_CTRL_IRQ_EN |
284 CHNL_CTRL_IRQ_DLY_EN |
285 CHNL_CTRL_IRQ_COAL_EN);
286
287
288 lp->dma_out(lp, RX_CHNL_CTRL, 0xff070000 |
289 CHNL_CTRL_IRQ_EN |
290 CHNL_CTRL_IRQ_DLY_EN |
291 CHNL_CTRL_IRQ_COAL_EN |
292 CHNL_CTRL_IRQ_IOE);
293
294
295 lp->dma_out(lp, RX_CURDESC_PTR, lp->rx_bd_p);
296 lp->dma_out(lp, RX_TAILDESC_PTR,
297 lp->rx_bd_p + (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1)));
298 lp->dma_out(lp, TX_CURDESC_PTR, lp->tx_bd_p);
299
300
301 lp->tx_bd_ci = 0;
302 lp->tx_bd_next = 0;
303 lp->tx_bd_tail = 0;
304 lp->rx_bd_ci = 0;
305
306 return 0;
307
308out:
309 temac_dma_bd_release(ndev);
310 return -ENOMEM;
311}
312
313
314
315
316
317static void temac_do_set_mac_address(struct net_device *ndev)
318{
319 struct temac_local *lp = netdev_priv(ndev);
320
321
322 mutex_lock(&lp->indirect_mutex);
323 temac_indirect_out32(lp, XTE_UAW0_OFFSET,
324 (ndev->dev_addr[0]) |
325 (ndev->dev_addr[1] << 8) |
326 (ndev->dev_addr[2] << 16) |
327 (ndev->dev_addr[3] << 24));
328
329
330 temac_indirect_out32(lp, XTE_UAW1_OFFSET,
331 (ndev->dev_addr[4] & 0x000000ff) |
332 (ndev->dev_addr[5] << 8));
333 mutex_unlock(&lp->indirect_mutex);
334}
335
336static int temac_init_mac_address(struct net_device *ndev, const void *address)
337{
338 memcpy(ndev->dev_addr, address, ETH_ALEN);
339 if (!is_valid_ether_addr(ndev->dev_addr))
340 eth_hw_addr_random(ndev);
341 temac_do_set_mac_address(ndev);
342 return 0;
343}
344
345static int temac_set_mac_address(struct net_device *ndev, void *p)
346{
347 struct sockaddr *addr = p;
348
349 if (!is_valid_ether_addr(addr->sa_data))
350 return -EADDRNOTAVAIL;
351 memcpy(ndev->dev_addr, addr->sa_data, ETH_ALEN);
352 temac_do_set_mac_address(ndev);
353 return 0;
354}
355
356static void temac_set_multicast_list(struct net_device *ndev)
357{
358 struct temac_local *lp = netdev_priv(ndev);
359 u32 multi_addr_msw, multi_addr_lsw, val;
360 int i;
361
362 mutex_lock(&lp->indirect_mutex);
363 if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC) ||
364 netdev_mc_count(ndev) > MULTICAST_CAM_TABLE_NUM) {
365
366
367
368
369
370
371 ndev->flags |= IFF_PROMISC;
372 temac_indirect_out32(lp, XTE_AFM_OFFSET, XTE_AFM_EPPRM_MASK);
373 dev_info(&ndev->dev, "Promiscuous mode enabled.\n");
374 } else if (!netdev_mc_empty(ndev)) {
375 struct netdev_hw_addr *ha;
376
377 i = 0;
378 netdev_for_each_mc_addr(ha, ndev) {
379 if (i >= MULTICAST_CAM_TABLE_NUM)
380 break;
381 multi_addr_msw = ((ha->addr[3] << 24) |
382 (ha->addr[2] << 16) |
383 (ha->addr[1] << 8) |
384 (ha->addr[0]));
385 temac_indirect_out32(lp, XTE_MAW0_OFFSET,
386 multi_addr_msw);
387 multi_addr_lsw = ((ha->addr[5] << 8) |
388 (ha->addr[4]) | (i << 16));
389 temac_indirect_out32(lp, XTE_MAW1_OFFSET,
390 multi_addr_lsw);
391 i++;
392 }
393 } else {
394 val = temac_indirect_in32(lp, XTE_AFM_OFFSET);
395 temac_indirect_out32(lp, XTE_AFM_OFFSET,
396 val & ~XTE_AFM_EPPRM_MASK);
397 temac_indirect_out32(lp, XTE_MAW0_OFFSET, 0);
398 temac_indirect_out32(lp, XTE_MAW1_OFFSET, 0);
399 dev_info(&ndev->dev, "Promiscuous mode disabled.\n");
400 }
401 mutex_unlock(&lp->indirect_mutex);
402}
403
404static struct temac_option {
405 int flg;
406 u32 opt;
407 u32 reg;
408 u32 m_or;
409 u32 m_and;
410} temac_options[] = {
411
412 {
413 .opt = XTE_OPTION_JUMBO,
414 .reg = XTE_TXC_OFFSET,
415 .m_or = XTE_TXC_TXJMBO_MASK,
416 },
417 {
418 .opt = XTE_OPTION_JUMBO,
419 .reg = XTE_RXC1_OFFSET,
420 .m_or =XTE_RXC1_RXJMBO_MASK,
421 },
422
423 {
424 .opt = XTE_OPTION_VLAN,
425 .reg = XTE_TXC_OFFSET,
426 .m_or =XTE_TXC_TXVLAN_MASK,
427 },
428 {
429 .opt = XTE_OPTION_VLAN,
430 .reg = XTE_RXC1_OFFSET,
431 .m_or =XTE_RXC1_RXVLAN_MASK,
432 },
433
434 {
435 .opt = XTE_OPTION_FCS_STRIP,
436 .reg = XTE_RXC1_OFFSET,
437 .m_or =XTE_RXC1_RXFCS_MASK,
438 },
439
440 {
441 .opt = XTE_OPTION_FCS_INSERT,
442 .reg = XTE_TXC_OFFSET,
443 .m_or =XTE_TXC_TXFCS_MASK,
444 },
445
446 {
447 .opt = XTE_OPTION_LENTYPE_ERR,
448 .reg = XTE_RXC1_OFFSET,
449 .m_or =XTE_RXC1_RXLT_MASK,
450 },
451
452 {
453 .opt = XTE_OPTION_FLOW_CONTROL,
454 .reg = XTE_FCC_OFFSET,
455 .m_or =XTE_FCC_RXFLO_MASK,
456 },
457
458 {
459 .opt = XTE_OPTION_FLOW_CONTROL,
460 .reg = XTE_FCC_OFFSET,
461 .m_or =XTE_FCC_TXFLO_MASK,
462 },
463
464 {
465 .opt = XTE_OPTION_PROMISC,
466 .reg = XTE_AFM_OFFSET,
467 .m_or =XTE_AFM_EPPRM_MASK,
468 },
469
470 {
471 .opt = XTE_OPTION_TXEN,
472 .reg = XTE_TXC_OFFSET,
473 .m_or =XTE_TXC_TXEN_MASK,
474 },
475
476 {
477 .opt = XTE_OPTION_RXEN,
478 .reg = XTE_RXC1_OFFSET,
479 .m_or =XTE_RXC1_RXEN_MASK,
480 },
481 {}
482};
483
484
485
486
487static u32 temac_setoptions(struct net_device *ndev, u32 options)
488{
489 struct temac_local *lp = netdev_priv(ndev);
490 struct temac_option *tp = &temac_options[0];
491 int reg;
492
493 mutex_lock(&lp->indirect_mutex);
494 while (tp->opt) {
495 reg = temac_indirect_in32(lp, tp->reg) & ~tp->m_or;
496 if (options & tp->opt)
497 reg |= tp->m_or;
498 temac_indirect_out32(lp, tp->reg, reg);
499 tp++;
500 }
501 lp->options |= options;
502 mutex_unlock(&lp->indirect_mutex);
503
504 return 0;
505}
506
507
508static void temac_device_reset(struct net_device *ndev)
509{
510 struct temac_local *lp = netdev_priv(ndev);
511 u32 timeout;
512 u32 val;
513
514
515
516
517
518
519 dev_dbg(&ndev->dev, "%s()\n", __func__);
520
521 mutex_lock(&lp->indirect_mutex);
522
523 temac_indirect_out32(lp, XTE_RXC1_OFFSET, XTE_RXC1_RXRST_MASK);
524 timeout = 1000;
525 while (temac_indirect_in32(lp, XTE_RXC1_OFFSET) & XTE_RXC1_RXRST_MASK) {
526 udelay(1);
527 if (--timeout == 0) {
528 dev_err(&ndev->dev,
529 "temac_device_reset RX reset timeout!!\n");
530 break;
531 }
532 }
533
534
535 temac_indirect_out32(lp, XTE_TXC_OFFSET, XTE_TXC_TXRST_MASK);
536 timeout = 1000;
537 while (temac_indirect_in32(lp, XTE_TXC_OFFSET) & XTE_TXC_TXRST_MASK) {
538 udelay(1);
539 if (--timeout == 0) {
540 dev_err(&ndev->dev,
541 "temac_device_reset TX reset timeout!!\n");
542 break;
543 }
544 }
545
546
547 val = temac_indirect_in32(lp, XTE_RXC1_OFFSET);
548 temac_indirect_out32(lp, XTE_RXC1_OFFSET, val & ~XTE_RXC1_RXEN_MASK);
549
550
551 lp->dma_out(lp, DMA_CONTROL_REG, DMA_CONTROL_RST);
552 timeout = 1000;
553 while (lp->dma_in(lp, DMA_CONTROL_REG) & DMA_CONTROL_RST) {
554 udelay(1);
555 if (--timeout == 0) {
556 dev_err(&ndev->dev,
557 "temac_device_reset DMA reset timeout!!\n");
558 break;
559 }
560 }
561 lp->dma_out(lp, DMA_CONTROL_REG, DMA_TAIL_ENABLE);
562
563 if (temac_dma_bd_init(ndev)) {
564 dev_err(&ndev->dev,
565 "temac_device_reset descriptor allocation failed\n");
566 }
567
568 temac_indirect_out32(lp, XTE_RXC0_OFFSET, 0);
569 temac_indirect_out32(lp, XTE_RXC1_OFFSET, 0);
570 temac_indirect_out32(lp, XTE_TXC_OFFSET, 0);
571 temac_indirect_out32(lp, XTE_FCC_OFFSET, XTE_FCC_RXFLO_MASK);
572
573 mutex_unlock(&lp->indirect_mutex);
574
575
576
577 temac_setoptions(ndev,
578 lp->options & ~(XTE_OPTION_TXEN | XTE_OPTION_RXEN));
579
580 temac_do_set_mac_address(ndev);
581
582
583 temac_set_multicast_list(ndev);
584 if (temac_setoptions(ndev, lp->options))
585 dev_err(&ndev->dev, "Error setting TEMAC options\n");
586
587
588 netif_trans_update(ndev);
589}
590
591static void temac_adjust_link(struct net_device *ndev)
592{
593 struct temac_local *lp = netdev_priv(ndev);
594 struct phy_device *phy = ndev->phydev;
595 u32 mii_speed;
596 int link_state;
597
598
599 link_state = phy->speed | (phy->duplex << 1) | phy->link;
600
601 mutex_lock(&lp->indirect_mutex);
602 if (lp->last_link != link_state) {
603 mii_speed = temac_indirect_in32(lp, XTE_EMCFG_OFFSET);
604 mii_speed &= ~XTE_EMCFG_LINKSPD_MASK;
605
606 switch (phy->speed) {
607 case SPEED_1000: mii_speed |= XTE_EMCFG_LINKSPD_1000; break;
608 case SPEED_100: mii_speed |= XTE_EMCFG_LINKSPD_100; break;
609 case SPEED_10: mii_speed |= XTE_EMCFG_LINKSPD_10; break;
610 }
611
612
613 temac_indirect_out32(lp, XTE_EMCFG_OFFSET, mii_speed);
614 lp->last_link = link_state;
615 phy_print_status(phy);
616 }
617 mutex_unlock(&lp->indirect_mutex);
618}
619
620static void temac_start_xmit_done(struct net_device *ndev)
621{
622 struct temac_local *lp = netdev_priv(ndev);
623 struct cdmac_bd *cur_p;
624 unsigned int stat = 0;
625
626 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
627 stat = cur_p->app0;
628
629 while (stat & STS_CTRL_APP0_CMPLT) {
630 dma_unmap_single(ndev->dev.parent, cur_p->phys, cur_p->len,
631 DMA_TO_DEVICE);
632 if (cur_p->app4)
633 dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
634 cur_p->app0 = 0;
635 cur_p->app1 = 0;
636 cur_p->app2 = 0;
637 cur_p->app3 = 0;
638 cur_p->app4 = 0;
639
640 ndev->stats.tx_packets++;
641 ndev->stats.tx_bytes += cur_p->len;
642
643 lp->tx_bd_ci++;
644 if (lp->tx_bd_ci >= TX_BD_NUM)
645 lp->tx_bd_ci = 0;
646
647 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
648 stat = cur_p->app0;
649 }
650
651 netif_wake_queue(ndev);
652}
653
654static inline int temac_check_tx_bd_space(struct temac_local *lp, int num_frag)
655{
656 struct cdmac_bd *cur_p;
657 int tail;
658
659 tail = lp->tx_bd_tail;
660 cur_p = &lp->tx_bd_v[tail];
661
662 do {
663 if (cur_p->app0)
664 return NETDEV_TX_BUSY;
665
666 tail++;
667 if (tail >= TX_BD_NUM)
668 tail = 0;
669
670 cur_p = &lp->tx_bd_v[tail];
671 num_frag--;
672 } while (num_frag >= 0);
673
674 return 0;
675}
676
677static netdev_tx_t
678temac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
679{
680 struct temac_local *lp = netdev_priv(ndev);
681 struct cdmac_bd *cur_p;
682 dma_addr_t start_p, tail_p;
683 int ii;
684 unsigned long num_frag;
685 skb_frag_t *frag;
686
687 num_frag = skb_shinfo(skb)->nr_frags;
688 frag = &skb_shinfo(skb)->frags[0];
689 start_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
690 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
691
692 if (temac_check_tx_bd_space(lp, num_frag)) {
693 if (!netif_queue_stopped(ndev))
694 netif_stop_queue(ndev);
695 return NETDEV_TX_BUSY;
696 }
697
698 cur_p->app0 = 0;
699 if (skb->ip_summed == CHECKSUM_PARTIAL) {
700 unsigned int csum_start_off = skb_checksum_start_offset(skb);
701 unsigned int csum_index_off = csum_start_off + skb->csum_offset;
702
703 cur_p->app0 |= 1;
704 cur_p->app1 = (csum_start_off << 16) | csum_index_off;
705 cur_p->app2 = 0;
706 }
707
708 cur_p->app0 |= STS_CTRL_APP0_SOP;
709 cur_p->len = skb_headlen(skb);
710 cur_p->phys = dma_map_single(ndev->dev.parent, skb->data,
711 skb_headlen(skb), DMA_TO_DEVICE);
712 cur_p->app4 = (unsigned long)skb;
713
714 for (ii = 0; ii < num_frag; ii++) {
715 lp->tx_bd_tail++;
716 if (lp->tx_bd_tail >= TX_BD_NUM)
717 lp->tx_bd_tail = 0;
718
719 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
720 cur_p->phys = dma_map_single(ndev->dev.parent,
721 skb_frag_address(frag),
722 skb_frag_size(frag), DMA_TO_DEVICE);
723 cur_p->len = skb_frag_size(frag);
724 cur_p->app0 = 0;
725 frag++;
726 }
727 cur_p->app0 |= STS_CTRL_APP0_EOP;
728
729 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
730 lp->tx_bd_tail++;
731 if (lp->tx_bd_tail >= TX_BD_NUM)
732 lp->tx_bd_tail = 0;
733
734 skb_tx_timestamp(skb);
735
736
737 lp->dma_out(lp, TX_TAILDESC_PTR, tail_p);
738
739 return NETDEV_TX_OK;
740}
741
742
743static void ll_temac_recv(struct net_device *ndev)
744{
745 struct temac_local *lp = netdev_priv(ndev);
746 struct sk_buff *skb, *new_skb;
747 unsigned int bdstat;
748 struct cdmac_bd *cur_p;
749 dma_addr_t tail_p;
750 int length;
751 unsigned long flags;
752
753 spin_lock_irqsave(&lp->rx_lock, flags);
754
755 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci;
756 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
757
758 bdstat = cur_p->app0;
759 while ((bdstat & STS_CTRL_APP0_CMPLT)) {
760
761 skb = lp->rx_skb[lp->rx_bd_ci];
762 length = cur_p->app4 & 0x3FFF;
763
764 dma_unmap_single(ndev->dev.parent, cur_p->phys, length,
765 DMA_FROM_DEVICE);
766
767 skb_put(skb, length);
768 skb->protocol = eth_type_trans(skb, ndev);
769 skb_checksum_none_assert(skb);
770
771
772 if (((lp->temac_features & TEMAC_FEATURE_RX_CSUM) != 0) &&
773 (skb->protocol == htons(ETH_P_IP)) &&
774 (skb->len > 64)) {
775
776 skb->csum = cur_p->app3 & 0xFFFF;
777 skb->ip_summed = CHECKSUM_COMPLETE;
778 }
779
780 if (!skb_defer_rx_timestamp(skb))
781 netif_rx(skb);
782
783 ndev->stats.rx_packets++;
784 ndev->stats.rx_bytes += length;
785
786 new_skb = netdev_alloc_skb_ip_align(ndev,
787 XTE_MAX_JUMBO_FRAME_SIZE);
788 if (!new_skb) {
789 spin_unlock_irqrestore(&lp->rx_lock, flags);
790 return;
791 }
792
793 cur_p->app0 = STS_CTRL_APP0_IRQONEND;
794 cur_p->phys = dma_map_single(ndev->dev.parent, new_skb->data,
795 XTE_MAX_JUMBO_FRAME_SIZE,
796 DMA_FROM_DEVICE);
797 cur_p->len = XTE_MAX_JUMBO_FRAME_SIZE;
798 lp->rx_skb[lp->rx_bd_ci] = new_skb;
799
800 lp->rx_bd_ci++;
801 if (lp->rx_bd_ci >= RX_BD_NUM)
802 lp->rx_bd_ci = 0;
803
804 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
805 bdstat = cur_p->app0;
806 }
807 lp->dma_out(lp, RX_TAILDESC_PTR, tail_p);
808
809 spin_unlock_irqrestore(&lp->rx_lock, flags);
810}
811
812static irqreturn_t ll_temac_tx_irq(int irq, void *_ndev)
813{
814 struct net_device *ndev = _ndev;
815 struct temac_local *lp = netdev_priv(ndev);
816 unsigned int status;
817
818 status = lp->dma_in(lp, TX_IRQ_REG);
819 lp->dma_out(lp, TX_IRQ_REG, status);
820
821 if (status & (IRQ_COAL | IRQ_DLY))
822 temac_start_xmit_done(lp->ndev);
823 if (status & 0x080)
824 dev_err(&ndev->dev, "DMA error 0x%x\n", status);
825
826 return IRQ_HANDLED;
827}
828
829static irqreturn_t ll_temac_rx_irq(int irq, void *_ndev)
830{
831 struct net_device *ndev = _ndev;
832 struct temac_local *lp = netdev_priv(ndev);
833 unsigned int status;
834
835
836 status = lp->dma_in(lp, RX_IRQ_REG);
837 lp->dma_out(lp, RX_IRQ_REG, status);
838
839 if (status & (IRQ_COAL | IRQ_DLY))
840 ll_temac_recv(lp->ndev);
841
842 return IRQ_HANDLED;
843}
844
845static int temac_open(struct net_device *ndev)
846{
847 struct temac_local *lp = netdev_priv(ndev);
848 struct phy_device *phydev = NULL;
849 int rc;
850
851 dev_dbg(&ndev->dev, "temac_open()\n");
852
853 if (lp->phy_node) {
854 phydev = of_phy_connect(lp->ndev, lp->phy_node,
855 temac_adjust_link, 0, 0);
856 if (!phydev) {
857 dev_err(lp->dev, "of_phy_connect() failed\n");
858 return -ENODEV;
859 }
860
861 phy_start(phydev);
862 }
863
864 temac_device_reset(ndev);
865
866 rc = request_irq(lp->tx_irq, ll_temac_tx_irq, 0, ndev->name, ndev);
867 if (rc)
868 goto err_tx_irq;
869 rc = request_irq(lp->rx_irq, ll_temac_rx_irq, 0, ndev->name, ndev);
870 if (rc)
871 goto err_rx_irq;
872
873 return 0;
874
875 err_rx_irq:
876 free_irq(lp->tx_irq, ndev);
877 err_tx_irq:
878 if (phydev)
879 phy_disconnect(phydev);
880 dev_err(lp->dev, "request_irq() failed\n");
881 return rc;
882}
883
884static int temac_stop(struct net_device *ndev)
885{
886 struct temac_local *lp = netdev_priv(ndev);
887 struct phy_device *phydev = ndev->phydev;
888
889 dev_dbg(&ndev->dev, "temac_close()\n");
890
891 free_irq(lp->tx_irq, ndev);
892 free_irq(lp->rx_irq, ndev);
893
894 if (phydev)
895 phy_disconnect(phydev);
896
897 temac_dma_bd_release(ndev);
898
899 return 0;
900}
901
902#ifdef CONFIG_NET_POLL_CONTROLLER
903static void
904temac_poll_controller(struct net_device *ndev)
905{
906 struct temac_local *lp = netdev_priv(ndev);
907
908 disable_irq(lp->tx_irq);
909 disable_irq(lp->rx_irq);
910
911 ll_temac_rx_irq(lp->tx_irq, ndev);
912 ll_temac_tx_irq(lp->rx_irq, ndev);
913
914 enable_irq(lp->tx_irq);
915 enable_irq(lp->rx_irq);
916}
917#endif
918
919static int temac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
920{
921 if (!netif_running(ndev))
922 return -EINVAL;
923
924 if (!ndev->phydev)
925 return -EINVAL;
926
927 return phy_mii_ioctl(ndev->phydev, rq, cmd);
928}
929
930static const struct net_device_ops temac_netdev_ops = {
931 .ndo_open = temac_open,
932 .ndo_stop = temac_stop,
933 .ndo_start_xmit = temac_start_xmit,
934 .ndo_set_mac_address = temac_set_mac_address,
935 .ndo_validate_addr = eth_validate_addr,
936 .ndo_do_ioctl = temac_ioctl,
937#ifdef CONFIG_NET_POLL_CONTROLLER
938 .ndo_poll_controller = temac_poll_controller,
939#endif
940};
941
942
943
944
945static ssize_t temac_show_llink_regs(struct device *dev,
946 struct device_attribute *attr, char *buf)
947{
948 struct net_device *ndev = dev_get_drvdata(dev);
949 struct temac_local *lp = netdev_priv(ndev);
950 int i, len = 0;
951
952 for (i = 0; i < 0x11; i++)
953 len += sprintf(buf + len, "%.8x%s", lp->dma_in(lp, i),
954 (i % 8) == 7 ? "\n" : " ");
955 len += sprintf(buf + len, "\n");
956
957 return len;
958}
959
960static DEVICE_ATTR(llink_regs, 0440, temac_show_llink_regs, NULL);
961
962static struct attribute *temac_device_attrs[] = {
963 &dev_attr_llink_regs.attr,
964 NULL,
965};
966
967static const struct attribute_group temac_attr_group = {
968 .attrs = temac_device_attrs,
969};
970
971
972static const struct ethtool_ops temac_ethtool_ops = {
973 .nway_reset = phy_ethtool_nway_reset,
974 .get_link = ethtool_op_get_link,
975 .get_ts_info = ethtool_op_get_ts_info,
976 .get_link_ksettings = phy_ethtool_get_link_ksettings,
977 .set_link_ksettings = phy_ethtool_set_link_ksettings,
978};
979
980static int temac_of_probe(struct platform_device *op)
981{
982 struct device_node *np;
983 struct temac_local *lp;
984 struct net_device *ndev;
985 const void *addr;
986 __be32 *p;
987 int rc = 0;
988
989
990 ndev = alloc_etherdev(sizeof(*lp));
991 if (!ndev)
992 return -ENOMEM;
993
994 platform_set_drvdata(op, ndev);
995 SET_NETDEV_DEV(ndev, &op->dev);
996 ndev->flags &= ~IFF_MULTICAST;
997 ndev->features = NETIF_F_SG;
998 ndev->netdev_ops = &temac_netdev_ops;
999 ndev->ethtool_ops = &temac_ethtool_ops;
1000#if 0
1001 ndev->features |= NETIF_F_IP_CSUM;
1002 ndev->features |= NETIF_F_HW_CSUM;
1003 ndev->features |= NETIF_F_IPV6_CSUM;
1004 ndev->features |= NETIF_F_HIGHDMA;
1005 ndev->features |= NETIF_F_HW_VLAN_CTAG_TX;
1006 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
1007 ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
1008 ndev->features |= NETIF_F_VLAN_CHALLENGED;
1009 ndev->features |= NETIF_F_GSO;
1010 ndev->features |= NETIF_F_MULTI_QUEUE;
1011 ndev->features |= NETIF_F_LRO;
1012#endif
1013
1014
1015 lp = netdev_priv(ndev);
1016 lp->ndev = ndev;
1017 lp->dev = &op->dev;
1018 lp->options = XTE_OPTION_DEFAULTS;
1019 spin_lock_init(&lp->rx_lock);
1020 mutex_init(&lp->indirect_mutex);
1021
1022
1023 lp->regs = of_iomap(op->dev.of_node, 0);
1024 if (!lp->regs) {
1025 dev_err(&op->dev, "could not map temac regs.\n");
1026 rc = -ENOMEM;
1027 goto nodev;
1028 }
1029
1030
1031 lp->temac_features = 0;
1032 p = (__be32 *)of_get_property(op->dev.of_node, "xlnx,txcsum", NULL);
1033 if (p && be32_to_cpu(*p)) {
1034 lp->temac_features |= TEMAC_FEATURE_TX_CSUM;
1035
1036 ndev->features |= NETIF_F_IP_CSUM;
1037 }
1038 p = (__be32 *)of_get_property(op->dev.of_node, "xlnx,rxcsum", NULL);
1039 if (p && be32_to_cpu(*p))
1040 lp->temac_features |= TEMAC_FEATURE_RX_CSUM;
1041
1042
1043 np = of_parse_phandle(op->dev.of_node, "llink-connected", 0);
1044 if (!np) {
1045 dev_err(&op->dev, "could not find DMA node\n");
1046 rc = -ENODEV;
1047 goto err_iounmap;
1048 }
1049
1050
1051 if (temac_dcr_setup(lp, op, np)) {
1052
1053
1054 lp->sdma_regs = of_iomap(np, 0);
1055 if (lp->sdma_regs) {
1056 lp->dma_in = temac_dma_in32;
1057 lp->dma_out = temac_dma_out32;
1058 dev_dbg(&op->dev, "MEM base: %p\n", lp->sdma_regs);
1059 } else {
1060 dev_err(&op->dev, "unable to map DMA registers\n");
1061 of_node_put(np);
1062 goto err_iounmap;
1063 }
1064 }
1065
1066 lp->rx_irq = irq_of_parse_and_map(np, 0);
1067 lp->tx_irq = irq_of_parse_and_map(np, 1);
1068
1069 of_node_put(np);
1070
1071 if (!lp->rx_irq || !lp->tx_irq) {
1072 dev_err(&op->dev, "could not determine irqs\n");
1073 rc = -ENOMEM;
1074 goto err_iounmap_2;
1075 }
1076
1077
1078
1079 addr = of_get_mac_address(op->dev.of_node);
1080 if (!addr) {
1081 dev_err(&op->dev, "could not find MAC address\n");
1082 rc = -ENODEV;
1083 goto err_iounmap_2;
1084 }
1085 temac_init_mac_address(ndev, addr);
1086
1087 rc = temac_mdio_setup(lp, op->dev.of_node);
1088 if (rc)
1089 dev_warn(&op->dev, "error registering MDIO bus\n");
1090
1091 lp->phy_node = of_parse_phandle(op->dev.of_node, "phy-handle", 0);
1092 if (lp->phy_node)
1093 dev_dbg(lp->dev, "using PHY node %pOF (%p)\n", np, np);
1094
1095
1096 rc = sysfs_create_group(&lp->dev->kobj, &temac_attr_group);
1097 if (rc) {
1098 dev_err(lp->dev, "Error creating sysfs files\n");
1099 goto err_iounmap_2;
1100 }
1101
1102 rc = register_netdev(lp->ndev);
1103 if (rc) {
1104 dev_err(lp->dev, "register_netdev() error (%i)\n", rc);
1105 goto err_register_ndev;
1106 }
1107
1108 return 0;
1109
1110 err_register_ndev:
1111 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
1112 err_iounmap_2:
1113 if (lp->sdma_regs)
1114 iounmap(lp->sdma_regs);
1115 err_iounmap:
1116 iounmap(lp->regs);
1117 nodev:
1118 free_netdev(ndev);
1119 ndev = NULL;
1120 return rc;
1121}
1122
1123static int temac_of_remove(struct platform_device *op)
1124{
1125 struct net_device *ndev = platform_get_drvdata(op);
1126 struct temac_local *lp = netdev_priv(ndev);
1127
1128 temac_mdio_teardown(lp);
1129 unregister_netdev(ndev);
1130 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
1131 of_node_put(lp->phy_node);
1132 lp->phy_node = NULL;
1133 iounmap(lp->regs);
1134 if (lp->sdma_regs)
1135 iounmap(lp->sdma_regs);
1136 free_netdev(ndev);
1137 return 0;
1138}
1139
1140static const struct of_device_id temac_of_match[] = {
1141 { .compatible = "xlnx,xps-ll-temac-1.01.b", },
1142 { .compatible = "xlnx,xps-ll-temac-2.00.a", },
1143 { .compatible = "xlnx,xps-ll-temac-2.02.a", },
1144 { .compatible = "xlnx,xps-ll-temac-2.03.a", },
1145 {},
1146};
1147MODULE_DEVICE_TABLE(of, temac_of_match);
1148
1149static struct platform_driver temac_of_driver = {
1150 .probe = temac_of_probe,
1151 .remove = temac_of_remove,
1152 .driver = {
1153 .name = "xilinx_temac",
1154 .of_match_table = temac_of_match,
1155 },
1156};
1157
1158module_platform_driver(temac_of_driver);
1159
1160MODULE_DESCRIPTION("Xilinx LL_TEMAC Ethernet driver");
1161MODULE_AUTHOR("Yoshio Kashiwagi");
1162MODULE_LICENSE("GPL");
1163