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57#include <linux/err.h>
58#include <linux/init.h>
59#include <linux/io.h>
60#include <linux/of.h>
61#include <linux/platform_device.h>
62#include <linux/reset-controller.h>
63#include <linux/slab.h>
64#include <linux/types.h>
65#include <linux/of_device.h>
66
67#define REG_COUNT 8
68#define BITS_PER_REG 32
69#define LEVEL_OFFSET 0x7c
70
71struct meson_reset {
72 void __iomem *reg_base;
73 struct reset_controller_dev rcdev;
74 spinlock_t lock;
75};
76
77static int meson_reset_reset(struct reset_controller_dev *rcdev,
78 unsigned long id)
79{
80 struct meson_reset *data =
81 container_of(rcdev, struct meson_reset, rcdev);
82 unsigned int bank = id / BITS_PER_REG;
83 unsigned int offset = id % BITS_PER_REG;
84 void __iomem *reg_addr = data->reg_base + (bank << 2);
85
86 writel(BIT(offset), reg_addr);
87
88 return 0;
89}
90
91static int meson_reset_level(struct reset_controller_dev *rcdev,
92 unsigned long id, bool assert)
93{
94 struct meson_reset *data =
95 container_of(rcdev, struct meson_reset, rcdev);
96 unsigned int bank = id / BITS_PER_REG;
97 unsigned int offset = id % BITS_PER_REG;
98 void __iomem *reg_addr = data->reg_base + LEVEL_OFFSET + (bank << 2);
99 unsigned long flags;
100 u32 reg;
101
102 spin_lock_irqsave(&data->lock, flags);
103
104 reg = readl(reg_addr);
105 if (assert)
106 writel(reg & ~BIT(offset), reg_addr);
107 else
108 writel(reg | BIT(offset), reg_addr);
109
110 spin_unlock_irqrestore(&data->lock, flags);
111
112 return 0;
113}
114
115static int meson_reset_assert(struct reset_controller_dev *rcdev,
116 unsigned long id)
117{
118 return meson_reset_level(rcdev, id, true);
119}
120
121static int meson_reset_deassert(struct reset_controller_dev *rcdev,
122 unsigned long id)
123{
124 return meson_reset_level(rcdev, id, false);
125}
126
127static const struct reset_control_ops meson_reset_ops = {
128 .reset = meson_reset_reset,
129 .assert = meson_reset_assert,
130 .deassert = meson_reset_deassert,
131};
132
133static const struct of_device_id meson_reset_dt_ids[] = {
134 { .compatible = "amlogic,meson8b-reset" },
135 { .compatible = "amlogic,meson-gxbb-reset" },
136 { .compatible = "amlogic,meson-axg-reset" },
137 { },
138};
139
140static int meson_reset_probe(struct platform_device *pdev)
141{
142 struct meson_reset *data;
143 struct resource *res;
144
145 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
146 if (!data)
147 return -ENOMEM;
148
149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
150 data->reg_base = devm_ioremap_resource(&pdev->dev, res);
151 if (IS_ERR(data->reg_base))
152 return PTR_ERR(data->reg_base);
153
154 platform_set_drvdata(pdev, data);
155
156 spin_lock_init(&data->lock);
157
158 data->rcdev.owner = THIS_MODULE;
159 data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG;
160 data->rcdev.ops = &meson_reset_ops;
161 data->rcdev.of_node = pdev->dev.of_node;
162
163 return devm_reset_controller_register(&pdev->dev, &data->rcdev);
164}
165
166static struct platform_driver meson_reset_driver = {
167 .probe = meson_reset_probe,
168 .driver = {
169 .name = "meson_reset",
170 .of_match_table = meson_reset_dt_ids,
171 },
172};
173builtin_platform_driver(meson_reset_driver);
174
