1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/kernel.h>
30#include <linux/ioport.h>
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/wait.h>
34#include <linux/spinlock.h>
35#include <linux/sched.h>
36#include <linux/interrupt.h>
37#include <linux/blkdev.h>
38#include <linux/firmware.h>
39#include <linux/module.h>
40#include <linux/moduleparam.h>
41#include <linux/hdreg.h>
42#include <linux/io.h>
43#include <linux/slab.h>
44#include <asm/irq.h>
45#include <asm/processor.h>
46#include <linux/libata.h>
47#include <linux/mutex.h>
48#include <linux/ktime.h>
49#include <scsi/scsi.h>
50#include <scsi/scsi_host.h>
51#include <scsi/scsi_device.h>
52#include <scsi/scsi_tcq.h>
53#include <scsi/scsi_eh.h>
54#include <scsi/scsi_cmnd.h>
55#include <scsi/scsicam.h>
56
57#include "pmcraid.h"
58
59
60
61
62static unsigned int pmcraid_debug_log;
63static unsigned int pmcraid_disable_aen;
64static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
65static unsigned int pmcraid_enable_msix;
66
67
68
69
70
71static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
72
73
74
75
76
77
78static unsigned int pmcraid_major;
79static struct class *pmcraid_class;
80static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
81
82
83
84
85MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
86MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
87MODULE_LICENSE("GPL");
88MODULE_VERSION(PMCRAID_DRIVER_VERSION);
89
90module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
91MODULE_PARM_DESC(log_level,
92 "Enables firmware error code logging, default :1 high-severity"
93 " errors, 2: all errors including high-severity errors,"
94 " 0: disables logging");
95
96module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
97MODULE_PARM_DESC(debug,
98 "Enable driver verbose message logging. Set 1 to enable."
99 "(default: 0)");
100
101module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
102MODULE_PARM_DESC(disable_aen,
103 "Disable driver aen notifications to apps. Set 1 to disable."
104 "(default: 0)");
105
106
107
108
109static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
110 {
111 .ioastatus = 0x0,
112 .ioarrin = 0x00040,
113 .mailbox = 0x7FC30,
114 .global_intr_mask = 0x00034,
115 .ioa_host_intr = 0x0009C,
116 .ioa_host_intr_clr = 0x000A0,
117 .ioa_host_msix_intr = 0x7FC40,
118 .ioa_host_mask = 0x7FC28,
119 .ioa_host_mask_clr = 0x7FC28,
120 .host_ioa_intr = 0x00020,
121 .host_ioa_intr_clr = 0x00020,
122 .transop_timeout = 300
123 }
124};
125
126
127
128
129static struct pci_device_id pmcraid_pci_table[] = {
130 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
131 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
132 },
133 {}
134};
135
136MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
153{
154 struct pmcraid_resource_entry *temp, *res = NULL;
155 struct pmcraid_instance *pinstance;
156 u8 target, bus, lun;
157 unsigned long lock_flags;
158 int rc = -ENXIO;
159 u16 fw_version;
160
161 pinstance = shost_priv(scsi_dev->host);
162
163 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
164
165
166
167
168
169
170 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
171 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
172
173
174 if (RES_IS_VSET(temp->cfg_entry)) {
175 if (fw_version <= PMCRAID_FW_VERSION_1)
176 target = temp->cfg_entry.unique_flags1;
177 else
178 target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
179
180 if (target > PMCRAID_MAX_VSET_TARGETS)
181 continue;
182 bus = PMCRAID_VSET_BUS_ID;
183 lun = 0;
184 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
185 target = RES_TARGET(temp->cfg_entry.resource_address);
186 bus = PMCRAID_PHYS_BUS_ID;
187 lun = RES_LUN(temp->cfg_entry.resource_address);
188 } else {
189 continue;
190 }
191
192 if (bus == scsi_dev->channel &&
193 target == scsi_dev->id &&
194 lun == scsi_dev->lun) {
195 res = temp;
196 break;
197 }
198 }
199
200 if (res) {
201 res->scsi_dev = scsi_dev;
202 scsi_dev->hostdata = res;
203 res->change_detected = 0;
204 atomic_set(&res->read_failures, 0);
205 atomic_set(&res->write_failures, 0);
206 rc = 0;
207 }
208 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
209 return rc;
210}
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
226{
227 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
228
229 if (!res)
230 return 0;
231
232
233 if (RES_IS_GSCSI(res->cfg_entry) &&
234 scsi_dev->type != TYPE_ENCLOSURE)
235 return -ENXIO;
236
237 pmcraid_info("configuring %x:%x:%x:%x\n",
238 scsi_dev->host->unique_id,
239 scsi_dev->channel,
240 scsi_dev->id,
241 (u8)scsi_dev->lun);
242
243 if (RES_IS_GSCSI(res->cfg_entry)) {
244 scsi_dev->allow_restart = 1;
245 } else if (RES_IS_VSET(res->cfg_entry)) {
246 scsi_dev->allow_restart = 1;
247 blk_queue_rq_timeout(scsi_dev->request_queue,
248 PMCRAID_VSET_IO_TIMEOUT);
249 blk_queue_max_hw_sectors(scsi_dev->request_queue,
250 PMCRAID_VSET_MAX_SECTORS);
251 }
252
253
254
255
256 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
257 scsi_dev->tagged_supported = 0;
258
259 return 0;
260}
261
262
263
264
265
266
267
268
269
270
271
272
273static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
274{
275 struct pmcraid_resource_entry *res;
276
277 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
278
279 if (res)
280 res->scsi_dev = NULL;
281
282 scsi_dev->hostdata = NULL;
283}
284
285
286
287
288
289
290
291
292
293static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
294{
295 if (depth > PMCRAID_MAX_CMD_PER_LUN)
296 depth = PMCRAID_MAX_CMD_PER_LUN;
297 return scsi_change_queue_depth(scsi_dev, depth);
298}
299
300
301
302
303
304
305
306
307
308
309static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
310{
311 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
312 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
313
314 if (index >= 0) {
315
316 u32 ioasa_offset =
317 offsetof(struct pmcraid_control_block, ioasa);
318
319 cmd->index = index;
320 ioarcb->response_handle = cpu_to_le32(index << 2);
321 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
322 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
323 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
324 } else {
325
326
327
328 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
329 ioarcb->hrrq_id = 0;
330 ioarcb->request_flags0 = 0;
331 ioarcb->request_flags1 = 0;
332 ioarcb->cmd_timeout = 0;
333 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
334 ioarcb->ioadl_bus_addr = 0;
335 ioarcb->ioadl_length = 0;
336 ioarcb->data_transfer_length = 0;
337 ioarcb->add_cmd_param_length = 0;
338 ioarcb->add_cmd_param_offset = 0;
339 cmd->ioa_cb->ioasa.ioasc = 0;
340 cmd->ioa_cb->ioasa.residual_data_length = 0;
341 cmd->time_left = 0;
342 }
343
344 cmd->cmd_done = NULL;
345 cmd->scsi_cmd = NULL;
346 cmd->release = 0;
347 cmd->completion_req = 0;
348 cmd->sense_buffer = NULL;
349 cmd->sense_buffer_dma = 0;
350 cmd->dma_handle = 0;
351 timer_setup(&cmd->timer, NULL, 0);
352}
353
354
355
356
357
358
359
360
361
362static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
363{
364 pmcraid_init_cmdblk(cmd, -1);
365}
366
367
368
369
370
371
372
373
374static struct pmcraid_cmd *pmcraid_get_free_cmd(
375 struct pmcraid_instance *pinstance
376)
377{
378 struct pmcraid_cmd *cmd = NULL;
379 unsigned long lock_flags;
380
381
382 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
383
384 if (!list_empty(&pinstance->free_cmd_pool)) {
385 cmd = list_entry(pinstance->free_cmd_pool.next,
386 struct pmcraid_cmd, free_list);
387 list_del(&cmd->free_list);
388 }
389 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
390
391
392 if (cmd != NULL)
393 pmcraid_reinit_cmdblk(cmd);
394 return cmd;
395}
396
397
398
399
400
401
402
403
404static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
405{
406 struct pmcraid_instance *pinstance = cmd->drv_inst;
407 unsigned long lock_flags;
408
409 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
410 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
411 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
412}
413
414
415
416
417
418
419
420
421
422static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
423{
424 return (pinstance->interrupt_mode) ?
425 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
426 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
427}
428
429
430
431
432
433
434
435
436
437
438static void pmcraid_disable_interrupts(
439 struct pmcraid_instance *pinstance,
440 u32 intrs
441)
442{
443 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
444 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
445
446 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
447 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
448 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
449
450 if (!pinstance->interrupt_mode) {
451 iowrite32(intrs,
452 pinstance->int_regs.ioa_host_interrupt_mask_reg);
453 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
454 }
455}
456
457
458
459
460
461
462
463
464
465
466static void pmcraid_enable_interrupts(
467 struct pmcraid_instance *pinstance,
468 u32 intrs
469)
470{
471 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
472 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
473
474 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
475
476 if (!pinstance->interrupt_mode) {
477 iowrite32(~intrs,
478 pinstance->int_regs.ioa_host_interrupt_mask_reg);
479 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
480 }
481
482 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
483 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
484 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
485}
486
487
488
489
490
491
492
493
494
495static void pmcraid_clr_trans_op(
496 struct pmcraid_instance *pinstance
497)
498{
499 unsigned long lock_flags;
500
501 if (!pinstance->interrupt_mode) {
502 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
503 pinstance->int_regs.ioa_host_interrupt_mask_reg);
504 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
505 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
506 pinstance->int_regs.ioa_host_interrupt_clr_reg);
507 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
508 }
509
510 if (pinstance->reset_cmd != NULL) {
511 del_timer(&pinstance->reset_cmd->timer);
512 spin_lock_irqsave(
513 pinstance->host->host_lock, lock_flags);
514 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
515 spin_unlock_irqrestore(
516 pinstance->host->host_lock, lock_flags);
517 }
518}
519
520
521
522
523
524
525
526
527
528
529static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
530{
531 u32 mask;
532 u32 intrs;
533 u32 alerts;
534
535 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
536 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
537 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
538
539 if ((mask & INTRS_HRRQ_VALID) == 0 ||
540 (alerts & DOORBELL_IOA_RESET_ALERT) ||
541 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
542 pmcraid_info("IOA requires hard reset\n");
543 pinstance->ioa_hard_reset = 1;
544 }
545
546
547 if (intrs & INTRS_IOA_UNIT_CHECK)
548 pinstance->ioa_unit_check = 1;
549}
550
551
552
553
554
555
556
557
558static void pmcraid_ioa_reset(struct pmcraid_cmd *);
559
560static void pmcraid_bist_done(struct timer_list *t)
561{
562 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
563 struct pmcraid_instance *pinstance = cmd->drv_inst;
564 unsigned long lock_flags;
565 int rc;
566 u16 pci_reg;
567
568 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
569
570
571 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
572 cmd->time_left > 0) {
573 pmcraid_info("BIST not complete, waiting another 2 secs\n");
574 cmd->timer.expires = jiffies + cmd->time_left;
575 cmd->time_left = 0;
576 add_timer(&cmd->timer);
577 } else {
578 cmd->time_left = 0;
579 pmcraid_info("BIST is complete, proceeding with reset\n");
580 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
581 pmcraid_ioa_reset(cmd);
582 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
583 }
584}
585
586
587
588
589
590
591
592static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
593{
594 struct pmcraid_instance *pinstance = cmd->drv_inst;
595 u32 doorbells, intrs;
596
597
598 iowrite32(DOORBELL_IOA_START_BIST,
599 pinstance->int_regs.host_ioa_interrupt_reg);
600 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
601 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
602 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
603 doorbells, intrs);
604
605 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
606 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
607 cmd->timer.function = pmcraid_bist_done;
608 add_timer(&cmd->timer);
609}
610
611
612
613
614
615
616
617static void pmcraid_reset_alert_done(struct timer_list *t)
618{
619 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
620 struct pmcraid_instance *pinstance = cmd->drv_inst;
621 u32 status = ioread32(pinstance->ioa_status);
622 unsigned long lock_flags;
623
624
625
626
627
628 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
629 cmd->time_left <= 0) {
630 pmcraid_info("critical op is reset proceeding with reset\n");
631 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
632 pmcraid_ioa_reset(cmd);
633 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
634 } else {
635 pmcraid_info("critical op is not yet reset waiting again\n");
636
637 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
638 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
639 cmd->timer.function = pmcraid_reset_alert_done;
640 add_timer(&cmd->timer);
641 }
642}
643
644
645
646
647
648
649
650
651
652
653static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
654static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
655{
656 struct pmcraid_instance *pinstance = cmd->drv_inst;
657 u32 doorbells;
658 int rc;
659 u16 pci_reg;
660
661
662
663
664
665
666 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
667 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
668
669
670
671
672
673
674 cmd->time_left = PMCRAID_RESET_TIMEOUT;
675 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
676 cmd->timer.function = pmcraid_reset_alert_done;
677 add_timer(&cmd->timer);
678
679 iowrite32(DOORBELL_IOA_RESET_ALERT,
680 pinstance->int_regs.host_ioa_interrupt_reg);
681 doorbells =
682 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
683 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
684 } else {
685 pmcraid_info("PCI config is not accessible starting BIST\n");
686 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
687 pmcraid_start_bist(cmd);
688 }
689}
690
691
692
693
694
695
696
697
698
699
700
701static void pmcraid_timeout_handler(struct timer_list *t)
702{
703 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
704 struct pmcraid_instance *pinstance = cmd->drv_inst;
705 unsigned long lock_flags;
706
707 dev_info(&pinstance->pdev->dev,
708 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
709 cmd->ioa_cb->ioarcb.cdb[0]);
710
711
712
713
714
715
716
717 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
718 if (!pinstance->ioa_reset_in_progress) {
719 pinstance->ioa_reset_attempts = 0;
720 cmd = pmcraid_get_free_cmd(pinstance);
721
722
723
724
725 if (cmd == NULL) {
726 spin_unlock_irqrestore(pinstance->host->host_lock,
727 lock_flags);
728 pmcraid_err("no free cmnd block for timeout handler\n");
729 return;
730 }
731
732 pinstance->reset_cmd = cmd;
733 pinstance->ioa_reset_in_progress = 1;
734 } else {
735 pmcraid_info("reset is already in progress\n");
736
737 if (pinstance->reset_cmd != cmd) {
738
739
740
741
742 pmcraid_err("cmd is pending but reset in progress\n");
743 }
744
745
746
747
748
749
750 if (cmd == pinstance->reset_cmd)
751 cmd->cmd_done = pmcraid_ioa_reset;
752 }
753
754
755 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
756 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
757 pmcraid_notify_ioastate(pinstance,
758 PMC_DEVICE_EVENT_RESET_START);
759
760 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
761 scsi_block_requests(pinstance->host);
762 pmcraid_reset_alert(cmd);
763 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
764}
765
766
767
768
769
770
771
772
773
774static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
775{
776 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
777 cmd->ioa_cb->ioarcb.cdb[0],
778 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
779
780
781
782
783
784
785 if (cmd->completion_req) {
786 cmd->completion_req = 0;
787 complete(&cmd->wait_for_completion);
788 }
789
790
791
792
793
794 if (cmd->release) {
795 cmd->release = 0;
796 pmcraid_return_cmd(cmd);
797 }
798}
799
800
801
802
803
804
805
806
807
808
809
810
811
812static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
813{
814 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
815 cmd->ioa_cb->ioarcb.cdb[0],
816 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
817
818 if (cmd->release) {
819 cmd->release = 0;
820 pmcraid_return_cmd(cmd);
821 }
822 pmcraid_info("scheduling worker for config table reinitialization\n");
823 schedule_work(&cmd->drv_inst->worker_q);
824}
825
826
827
828
829
830
831
832
833
834
835
836static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
837{
838 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
839 struct pmcraid_instance *pinstance = cmd->drv_inst;
840 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
841
842 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
843 scsi_cmd->result |= (DID_ERROR << 16);
844 scmd_printk(KERN_INFO, scsi_cmd,
845 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
846 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
847 }
848
849 if (cmd->sense_buffer) {
850 dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma,
851 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
852 cmd->sense_buffer = NULL;
853 cmd->sense_buffer_dma = 0;
854 }
855
856 scsi_dma_unmap(scsi_cmd);
857 pmcraid_return_cmd(cmd);
858 scsi_cmd->scsi_done(scsi_cmd);
859}
860
861
862
863
864
865
866
867
868
869
870
871
872static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
873{
874 struct pmcraid_instance *pinstance = cmd->drv_inst;
875 unsigned long lock_flags;
876
877
878
879
880
881
882 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
883 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
884 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
885 atomic_inc(&pinstance->outstanding_cmds);
886
887
888 mb();
889 iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
890}
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906static void pmcraid_send_cmd(
907 struct pmcraid_cmd *cmd,
908 void (*cmd_done) (struct pmcraid_cmd *),
909 unsigned long timeout,
910 void (*timeout_func) (struct timer_list *)
911)
912{
913
914 cmd->cmd_done = cmd_done;
915
916 if (timeout_func) {
917
918 cmd->timer.expires = jiffies + timeout;
919 cmd->timer.function = timeout_func;
920 add_timer(&cmd->timer);
921 }
922
923
924 _pmcraid_fire_command(cmd);
925}
926
927
928
929
930
931
932
933
934static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
935{
936 struct pmcraid_instance *pinstance = cmd->drv_inst;
937 unsigned long lock_flags;
938
939 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
940 pmcraid_ioa_reset(cmd);
941 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
942}
943
944
945
946
947
948
949
950
951
952static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
953{
954 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
955 cmd->ioa_cb->ioarcb.cdb[0],
956 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
957
958
959
960
961 pmcraid_reinit_cmdblk(cmd);
962 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
963 cmd->ioa_cb->ioarcb.resource_handle =
964 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
965 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
966 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
967
968
969 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
970 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
971
972 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
973
974 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
975 PMCRAID_SHUTDOWN_TIMEOUT,
976 pmcraid_timeout_handler);
977}
978
979
980
981
982
983
984
985
986
987static void pmcraid_querycfg(struct pmcraid_cmd *);
988
989static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
990{
991 struct pmcraid_instance *pinstance = cmd->drv_inst;
992 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
993 unsigned long lock_flags;
994
995
996
997
998
999 if (ioasc) {
1000 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
1001 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1002 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1003 pmcraid_reset_alert(cmd);
1004 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1005 } else {
1006 pmcraid_querycfg(cmd);
1007 }
1008}
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1019{
1020 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1021 struct pmcraid_ioadl_desc *ioadl;
1022 struct pmcraid_instance *pinstance = cmd->drv_inst;
1023 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1024
1025 pmcraid_reinit_cmdblk(cmd);
1026 ioarcb->request_type = REQ_TYPE_SCSI;
1027 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1028 ioarcb->cdb[0] = INQUIRY;
1029 ioarcb->cdb[1] = 1;
1030 ioarcb->cdb[2] = 0xD0;
1031 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1032 ioarcb->cdb[4] = data_size & 0xFF;
1033
1034
1035
1036 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1037 offsetof(struct pmcraid_ioarcb,
1038 add_data.u.ioadl[0]));
1039 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1040 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
1041
1042 ioarcb->request_flags0 |= NO_LINK_DESCS;
1043 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1044 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1045 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1046 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1047 ioadl->data_len = cpu_to_le32(data_size);
1048
1049 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1050 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1051}
1052
1053
1054
1055
1056
1057
1058
1059
1060static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1061{
1062 struct pmcraid_instance *pinstance = cmd->drv_inst;
1063 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1064 int index = cmd->hrrq_index;
1065 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
1066 __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
1067 void (*done_function)(struct pmcraid_cmd *);
1068
1069 pmcraid_reinit_cmdblk(cmd);
1070 cmd->hrrq_index = index + 1;
1071
1072 if (cmd->hrrq_index < pinstance->num_hrrq) {
1073 done_function = pmcraid_identify_hrrq;
1074 } else {
1075 cmd->hrrq_index = 0;
1076 done_function = pmcraid_get_fwversion;
1077 }
1078
1079
1080 ioarcb->request_type = REQ_TYPE_IOACMD;
1081 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1082
1083
1084 ioarcb->hrrq_id = index;
1085 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1086 ioarcb->cdb[1] = index;
1087
1088
1089
1090
1091 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1092 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
1093
1094 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1095 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1096
1097
1098
1099
1100
1101 pmcraid_send_cmd(cmd, done_function,
1102 PMCRAID_INTERNAL_TIMEOUT,
1103 pmcraid_timeout_handler);
1104}
1105
1106static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1107static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1118{
1119 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1120 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1121 else
1122 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1123
1124 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1125}
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136static struct pmcraid_cmd *pmcraid_init_hcam
1137(
1138 struct pmcraid_instance *pinstance,
1139 u8 type
1140)
1141{
1142 struct pmcraid_cmd *cmd;
1143 struct pmcraid_ioarcb *ioarcb;
1144 struct pmcraid_ioadl_desc *ioadl;
1145 struct pmcraid_hostrcb *hcam;
1146 void (*cmd_done) (struct pmcraid_cmd *);
1147 dma_addr_t dma;
1148 int rcb_size;
1149
1150 cmd = pmcraid_get_free_cmd(pinstance);
1151
1152 if (!cmd) {
1153 pmcraid_err("no free command blocks for hcam\n");
1154 return cmd;
1155 }
1156
1157 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
1158 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
1159 cmd_done = pmcraid_process_ccn;
1160 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1161 hcam = &pinstance->ccn;
1162 } else {
1163 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1164 cmd_done = pmcraid_process_ldn;
1165 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1166 hcam = &pinstance->ldn;
1167 }
1168
1169
1170 hcam->cmd = cmd;
1171
1172 ioarcb = &cmd->ioa_cb->ioarcb;
1173 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1174 offsetof(struct pmcraid_ioarcb,
1175 add_data.u.ioadl[0]));
1176 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1177 ioadl = ioarcb->add_data.u.ioadl;
1178
1179
1180 ioarcb->request_type = REQ_TYPE_HCAM;
1181 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1182 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1183 ioarcb->cdb[1] = type;
1184 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1185 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1186
1187 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1188
1189 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
1190 ioadl[0].data_len = cpu_to_le32(rcb_size);
1191 ioadl[0].address = cpu_to_le64(dma);
1192
1193 cmd->cmd_done = cmd_done;
1194 return cmd;
1195}
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1208{
1209 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1210 pmcraid_send_hcam_cmd(cmd);
1211}
1212
1213
1214
1215
1216
1217
1218
1219
1220static void pmcraid_prepare_cancel_cmd(
1221 struct pmcraid_cmd *cmd,
1222 struct pmcraid_cmd *cmd_to_cancel
1223)
1224{
1225 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1226 __be64 ioarcb_addr;
1227
1228
1229
1230
1231
1232 ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
1233
1234
1235
1236
1237 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1238 ioarcb->request_type = REQ_TYPE_IOACMD;
1239 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1240 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1241
1242 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1243}
1244
1245
1246
1247
1248
1249
1250
1251
1252static void pmcraid_cancel_hcam(
1253 struct pmcraid_cmd *cmd,
1254 u8 type,
1255 void (*cmd_done) (struct pmcraid_cmd *)
1256)
1257{
1258 struct pmcraid_instance *pinstance;
1259 struct pmcraid_hostrcb *hcam;
1260
1261 pinstance = cmd->drv_inst;
1262 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1263 &pinstance->ldn : &pinstance->ccn;
1264
1265
1266
1267
1268 if (hcam->cmd == NULL)
1269 return;
1270
1271 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1272
1273
1274
1275
1276 pmcraid_send_cmd(cmd, cmd_done,
1277 PMCRAID_INTERNAL_TIMEOUT,
1278 pmcraid_timeout_handler);
1279}
1280
1281
1282
1283
1284
1285
1286static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1287{
1288 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1289 cmd->ioa_cb->ioarcb.cdb[0],
1290 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1291
1292 pmcraid_reinit_cmdblk(cmd);
1293
1294 pmcraid_cancel_hcam(cmd,
1295 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1296 pmcraid_ioa_shutdown);
1297}
1298
1299
1300
1301
1302
1303
1304static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1305{
1306 pmcraid_cancel_hcam(cmd,
1307 PMCRAID_HCAM_CODE_LOG_DATA,
1308 pmcraid_cancel_ccn);
1309}
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320static int pmcraid_expose_resource(u16 fw_version,
1321 struct pmcraid_config_table_entry *cfgte)
1322{
1323 int retval = 0;
1324
1325 if (cfgte->resource_type == RES_TYPE_VSET) {
1326 if (fw_version <= PMCRAID_FW_VERSION_1)
1327 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1328 else
1329 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1330 (cfgte->unique_flags1 & 0x80) == 0);
1331
1332 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
1333 retval = (RES_BUS(cfgte->resource_address) !=
1334 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1335 return retval;
1336}
1337
1338
1339enum {
1340 PMCRAID_AEN_ATTR_UNSPEC,
1341 PMCRAID_AEN_ATTR_EVENT,
1342 __PMCRAID_AEN_ATTR_MAX,
1343};
1344#define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1345
1346
1347enum {
1348 PMCRAID_AEN_CMD_UNSPEC,
1349 PMCRAID_AEN_CMD_EVENT,
1350 __PMCRAID_AEN_CMD_MAX,
1351};
1352#define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1353
1354static struct genl_multicast_group pmcraid_mcgrps[] = {
1355 { .name = "events", },
1356};
1357
1358static struct genl_family pmcraid_event_family __ro_after_init = {
1359 .module = THIS_MODULE,
1360 .name = "pmcraid",
1361 .version = 1,
1362 .maxattr = PMCRAID_AEN_ATTR_MAX,
1363 .mcgrps = pmcraid_mcgrps,
1364 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
1365};
1366
1367
1368
1369
1370
1371
1372
1373
1374static int __init pmcraid_netlink_init(void)
1375{
1376 int result;
1377
1378 result = genl_register_family(&pmcraid_event_family);
1379
1380 if (result)
1381 return result;
1382
1383 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1384 pmcraid_event_family.id);
1385
1386 return result;
1387}
1388
1389
1390
1391
1392
1393
1394
1395static void pmcraid_netlink_release(void)
1396{
1397 genl_unregister_family(&pmcraid_event_family);
1398}
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408static int pmcraid_notify_aen(
1409 struct pmcraid_instance *pinstance,
1410 struct pmcraid_aen_msg *aen_msg,
1411 u32 data_size
1412)
1413{
1414 struct sk_buff *skb;
1415 void *msg_header;
1416 u32 total_size, nla_genl_hdr_total_size;
1417 int result;
1418
1419 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1420 MINOR(pinstance->cdev.dev));
1421 aen_msg->length = data_size;
1422
1423 data_size += sizeof(*aen_msg);
1424
1425 total_size = nla_total_size(data_size);
1426
1427 nla_genl_hdr_total_size =
1428 (total_size + (GENL_HDRLEN +
1429 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1430 + NLMSG_HDRLEN);
1431 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
1432
1433
1434 if (!skb) {
1435 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1436 total_size);
1437 return -ENOMEM;
1438 }
1439
1440
1441 msg_header = genlmsg_put(skb, 0, 0,
1442 &pmcraid_event_family, 0,
1443 PMCRAID_AEN_CMD_EVENT);
1444 if (!msg_header) {
1445 pmcraid_err("failed to copy command details\n");
1446 nlmsg_free(skb);
1447 return -ENOMEM;
1448 }
1449
1450 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1451
1452 if (result) {
1453 pmcraid_err("failed to copy AEN attribute data\n");
1454 nlmsg_free(skb);
1455 return -EINVAL;
1456 }
1457
1458
1459 genlmsg_end(skb, msg_header);
1460
1461 result = genlmsg_multicast(&pmcraid_event_family, skb,
1462 0, 0, GFP_ATOMIC);
1463
1464
1465
1466
1467 if (result)
1468 pmcraid_info("error (%x) sending aen event message\n", result);
1469 return result;
1470}
1471
1472
1473
1474
1475
1476
1477
1478
1479static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1480{
1481 return pmcraid_notify_aen(pinstance,
1482 pinstance->ccn.msg,
1483 le32_to_cpu(pinstance->ccn.hcam->data_len) +
1484 sizeof(struct pmcraid_hcam_hdr));
1485}
1486
1487
1488
1489
1490
1491
1492
1493
1494static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1495{
1496 return pmcraid_notify_aen(pinstance,
1497 pinstance->ldn.msg,
1498 le32_to_cpu(pinstance->ldn.hcam->data_len) +
1499 sizeof(struct pmcraid_hcam_hdr));
1500}
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1511{
1512 pinstance->scn.ioa_state = evt;
1513 pmcraid_notify_aen(pinstance,
1514 &pinstance->scn.msg,
1515 sizeof(u32));
1516}
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1527{
1528 struct pmcraid_config_table_entry *cfg_entry;
1529 struct pmcraid_hcam_ccn *ccn_hcam;
1530 struct pmcraid_cmd *cmd;
1531 struct pmcraid_cmd *cfgcmd;
1532 struct pmcraid_resource_entry *res = NULL;
1533 unsigned long lock_flags;
1534 unsigned long host_lock_flags;
1535 u32 new_entry = 1;
1536 u32 hidden_entry = 0;
1537 u16 fw_version;
1538 int rc;
1539
1540 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1541 cfg_entry = &ccn_hcam->cfg_entry;
1542 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
1543
1544 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1545 res: %x:%x:%x:%x\n",
1546 le32_to_cpu(pinstance->ccn.hcam->ilid),
1547 pinstance->ccn.hcam->op_code,
1548 (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
1549 ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
1550 pinstance->ccn.hcam->notification_type,
1551 pinstance->ccn.hcam->notification_lost,
1552 pinstance->ccn.hcam->flags,
1553 pinstance->host->unique_id,
1554 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1555 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1556 RES_BUS(cfg_entry->resource_address)),
1557 RES_IS_VSET(*cfg_entry) ?
1558 (fw_version <= PMCRAID_FW_VERSION_1 ?
1559 cfg_entry->unique_flags1 :
1560 le16_to_cpu(cfg_entry->array_id) & 0xFF) :
1561 RES_TARGET(cfg_entry->resource_address),
1562 RES_LUN(cfg_entry->resource_address));
1563
1564
1565
1566 if (pinstance->ccn.hcam->notification_lost) {
1567 cfgcmd = pmcraid_get_free_cmd(pinstance);
1568 if (cfgcmd) {
1569 pmcraid_info("lost CCN, reading config table\b");
1570 pinstance->reinit_cfg_table = 1;
1571 pmcraid_querycfg(cfgcmd);
1572 } else {
1573 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1574 }
1575 goto out_notify_apps;
1576 }
1577
1578
1579
1580
1581
1582 if (pinstance->ccn.hcam->notification_type ==
1583 NOTIFICATION_TYPE_ENTRY_CHANGED &&
1584 cfg_entry->resource_type == RES_TYPE_VSET) {
1585 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1586 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
1587 goto out_notify_apps;
1588 }
1589
1590 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1591 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1592 rc = memcmp(&res->cfg_entry.resource_address,
1593 &cfg_entry->resource_address,
1594 sizeof(cfg_entry->resource_address));
1595 if (!rc) {
1596 new_entry = 0;
1597 break;
1598 }
1599 }
1600
1601 if (new_entry) {
1602
1603 if (hidden_entry) {
1604 spin_unlock_irqrestore(&pinstance->resource_lock,
1605 lock_flags);
1606 goto out_notify_apps;
1607 }
1608
1609
1610
1611
1612
1613 if (list_empty(&pinstance->free_res_q)) {
1614 spin_unlock_irqrestore(&pinstance->resource_lock,
1615 lock_flags);
1616 pmcraid_err("too many resources attached\n");
1617 spin_lock_irqsave(pinstance->host->host_lock,
1618 host_lock_flags);
1619 pmcraid_send_hcam(pinstance,
1620 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1621 spin_unlock_irqrestore(pinstance->host->host_lock,
1622 host_lock_flags);
1623 return;
1624 }
1625
1626 res = list_entry(pinstance->free_res_q.next,
1627 struct pmcraid_resource_entry, queue);
1628
1629 list_del(&res->queue);
1630 res->scsi_dev = NULL;
1631 res->reset_progress = 0;
1632 list_add_tail(&res->queue, &pinstance->used_res_q);
1633 }
1634
1635 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
1636
1637 if (pinstance->ccn.hcam->notification_type ==
1638 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
1639 if (res->scsi_dev) {
1640 if (fw_version <= PMCRAID_FW_VERSION_1)
1641 res->cfg_entry.unique_flags1 &= 0x7F;
1642 else
1643 res->cfg_entry.array_id &= cpu_to_le16(0xFF);
1644 res->change_detected = RES_CHANGE_DEL;
1645 res->cfg_entry.resource_handle =
1646 PMCRAID_INVALID_RES_HANDLE;
1647 schedule_work(&pinstance->worker_q);
1648 } else {
1649
1650 list_move_tail(&res->queue, &pinstance->free_res_q);
1651 }
1652 } else if (!res->scsi_dev) {
1653 res->change_detected = RES_CHANGE_ADD;
1654 schedule_work(&pinstance->worker_q);
1655 }
1656 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1657
1658out_notify_apps:
1659
1660
1661 if (!pmcraid_disable_aen)
1662 pmcraid_notify_ccn(pinstance);
1663
1664 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1665 if (cmd)
1666 pmcraid_send_hcam_cmd(cmd);
1667}
1668
1669
1670
1671
1672
1673
1674
1675static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1676{
1677 int i;
1678 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1679 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1680 return &pmcraid_ioasc_error_table[i];
1681 }
1682 return NULL;
1683}
1684
1685
1686
1687
1688
1689
1690static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
1691{
1692 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1693
1694 if (error_info == NULL ||
1695 cmd->drv_inst->current_log_level < error_info->log_level)
1696 return;
1697
1698
1699 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
1700 cmd->ioa_cb->ioarcb.cdb[0],
1701 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
1702 ioasc, error_info->error_string);
1703}
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1714{
1715 struct pmcraid_hcam_ldn *hcam_ldn;
1716 u32 ioasc;
1717
1718 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1719
1720 pmcraid_info
1721 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1722 pinstance->ldn.hcam->ilid,
1723 pinstance->ldn.hcam->op_code,
1724 pinstance->ldn.hcam->notification_type,
1725 pinstance->ldn.hcam->notification_lost,
1726 pinstance->ldn.hcam->flags,
1727 pinstance->ldn.hcam->overlay_id);
1728
1729
1730 if (pinstance->ldn.hcam->notification_type !=
1731 NOTIFICATION_TYPE_ERROR_LOG)
1732 return;
1733
1734 if (pinstance->ldn.hcam->notification_lost ==
1735 HOSTRCB_NOTIFICATIONS_LOST)
1736 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
1737
1738 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1739
1740 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1741 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
1742 dev_info(&pinstance->pdev->dev,
1743 "UnitAttention due to IOA Bus Reset\n");
1744 scsi_report_bus_reset(
1745 pinstance->host,
1746 RES_BUS(hcam_ldn->error_log.fd_ra));
1747 }
1748
1749 return;
1750}
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1763{
1764 struct pmcraid_instance *pinstance = cmd->drv_inst;
1765 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1766 unsigned long lock_flags;
1767
1768 pinstance->ccn.cmd = NULL;
1769 pmcraid_return_cmd(cmd);
1770
1771
1772
1773
1774
1775 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1776 atomic_read(&pinstance->ccn.ignore) == 1) {
1777 return;
1778 } else if (ioasc) {
1779 dev_info(&pinstance->pdev->dev,
1780 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1781 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1782 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1783 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1784 } else {
1785 pmcraid_handle_config_change(pinstance);
1786 }
1787}
1788
1789
1790
1791
1792
1793
1794
1795
1796static void pmcraid_initiate_reset(struct pmcraid_instance *);
1797static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
1798
1799static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1800{
1801 struct pmcraid_instance *pinstance = cmd->drv_inst;
1802 struct pmcraid_hcam_ldn *ldn_hcam =
1803 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1804 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1805 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1806 unsigned long lock_flags;
1807
1808
1809 pinstance->ldn.cmd = NULL;
1810 pmcraid_return_cmd(cmd);
1811
1812
1813
1814
1815
1816 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1817 atomic_read(&pinstance->ccn.ignore) == 1) {
1818 return;
1819 } else if (!ioasc) {
1820 pmcraid_handle_error_log(pinstance);
1821 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1822 spin_lock_irqsave(pinstance->host->host_lock,
1823 lock_flags);
1824 pmcraid_initiate_reset(pinstance);
1825 spin_unlock_irqrestore(pinstance->host->host_lock,
1826 lock_flags);
1827 return;
1828 }
1829 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1830 pinstance->timestamp_error = 1;
1831 pmcraid_set_timestamp(cmd);
1832 }
1833 } else {
1834 dev_info(&pinstance->pdev->dev,
1835 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1836 }
1837
1838 if (!pmcraid_disable_aen)
1839 pmcraid_notify_ldn(pinstance);
1840
1841 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1842 if (cmd)
1843 pmcraid_send_hcam_cmd(cmd);
1844}
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1855{
1856 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1857 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1858}
1859
1860
1861
1862
1863
1864static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1865{
1866 struct pmcraid_instance *pinstance = cmd->drv_inst;
1867
1868
1869
1870
1871
1872
1873 atomic_set(&pinstance->ccn.ignore, 1);
1874 atomic_set(&pinstance->ldn.ignore, 1);
1875
1876
1877
1878
1879
1880 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1881 pinstance->ioa_unit_check) {
1882 pinstance->force_ioa_reset = 0;
1883 pinstance->ioa_unit_check = 0;
1884 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1885 pmcraid_reset_alert(cmd);
1886 return;
1887 }
1888
1889
1890
1891
1892
1893 pmcraid_cancel_ldn(cmd);
1894}
1895
1896
1897
1898
1899
1900
1901
1902static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1903
1904static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1905{
1906 u32 intrs;
1907
1908 pmcraid_reinit_buffers(pinstance);
1909 intrs = pmcraid_read_interrupts(pinstance);
1910
1911 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1912
1913 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
1914 if (!pinstance->interrupt_mode) {
1915 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1916 pinstance->int_regs.
1917 ioa_host_interrupt_mask_reg);
1918 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1919 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1920 }
1921 return 1;
1922 } else {
1923 return 0;
1924 }
1925}
1926
1927
1928
1929
1930
1931
1932
1933
1934static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1935{
1936 struct pmcraid_instance *pinstance = cmd->drv_inst;
1937 u32 int_reg;
1938 u32 doorbell;
1939
1940
1941
1942
1943
1944 cmd->cmd_done = pmcraid_ioa_reset;
1945 cmd->timer.expires = jiffies +
1946 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
1947 cmd->timer.function = pmcraid_timeout_handler;
1948
1949 if (!timer_pending(&cmd->timer))
1950 add_timer(&cmd->timer);
1951
1952
1953
1954
1955 doorbell = DOORBELL_RUNTIME_RESET |
1956 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
1957
1958
1959
1960
1961 if (pinstance->interrupt_mode) {
1962 iowrite32(DOORBELL_INTR_MODE_MSIX,
1963 pinstance->int_regs.host_ioa_interrupt_reg);
1964 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
1965 }
1966
1967 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
1968 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1969 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
1970
1971 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
1972 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1973 int_reg);
1974}
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
1985{
1986 pmcraid_info("%s is not yet implemented\n", __func__);
1987}
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
2002{
2003 struct pmcraid_cmd *cmd, *temp;
2004 unsigned long lock_flags;
2005
2006
2007
2008
2009 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2010 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
2011 free_list) {
2012 list_del(&cmd->free_list);
2013 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2014 lock_flags);
2015 cmd->ioa_cb->ioasa.ioasc =
2016 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
2017 cmd->ioa_cb->ioasa.ilid =
2018 cpu_to_le32(PMCRAID_DRIVER_ILID);
2019
2020
2021 del_timer(&cmd->timer);
2022
2023
2024
2025
2026
2027
2028 if (cmd->scsi_cmd) {
2029
2030 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2031 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2032
2033 scsi_cmd->result |= DID_ERROR << 16;
2034
2035 scsi_dma_unmap(scsi_cmd);
2036 pmcraid_return_cmd(cmd);
2037
2038 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2039 le32_to_cpu(resp) >> 2,
2040 cmd->ioa_cb->ioarcb.cdb[0],
2041 scsi_cmd->result);
2042 scsi_cmd->scsi_done(scsi_cmd);
2043 } else if (cmd->cmd_done == pmcraid_internal_done ||
2044 cmd->cmd_done == pmcraid_erp_done) {
2045 cmd->cmd_done(cmd);
2046 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2047 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
2048 pmcraid_return_cmd(cmd);
2049 }
2050
2051 atomic_dec(&pinstance->outstanding_cmds);
2052 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2053 }
2054
2055 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2056}
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2074{
2075 struct pmcraid_instance *pinstance = cmd->drv_inst;
2076 u8 reset_complete = 0;
2077
2078 pinstance->ioa_reset_in_progress = 1;
2079
2080 if (pinstance->reset_cmd != cmd) {
2081 pmcraid_err("reset is called with different command block\n");
2082 pinstance->reset_cmd = cmd;
2083 }
2084
2085 pmcraid_info("reset_engine: state = %d, command = %p\n",
2086 pinstance->ioa_state, cmd);
2087
2088 switch (pinstance->ioa_state) {
2089
2090 case IOA_STATE_DEAD:
2091
2092
2093
2094
2095 pmcraid_err("IOA is offline no reset is possible\n");
2096 reset_complete = 1;
2097 break;
2098
2099 case IOA_STATE_IN_BRINGDOWN:
2100
2101
2102
2103
2104 pmcraid_disable_interrupts(pinstance, ~0);
2105 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2106 pmcraid_reset_alert(cmd);
2107 break;
2108
2109 case IOA_STATE_UNKNOWN:
2110
2111
2112
2113 scsi_block_requests(pinstance->host);
2114
2115
2116
2117
2118
2119 if (pinstance->ioa_hard_reset == 0) {
2120 if (ioread32(pinstance->ioa_status) &
2121 INTRS_TRANSITION_TO_OPERATIONAL) {
2122 pmcraid_info("sticky bit set, bring-up\n");
2123 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2124 pmcraid_reinit_cmdblk(cmd);
2125 pmcraid_identify_hrrq(cmd);
2126 } else {
2127 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2128 pmcraid_soft_reset(cmd);
2129 }
2130 } else {
2131
2132
2133
2134 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2135 pmcraid_reset_alert(cmd);
2136 }
2137 break;
2138
2139 case IOA_STATE_IN_RESET_ALERT:
2140
2141
2142
2143
2144
2145 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2146 pmcraid_start_bist(cmd);
2147 break;
2148
2149 case IOA_STATE_IN_HARD_RESET:
2150 pinstance->ioa_reset_attempts++;
2151
2152
2153 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2154 pinstance->ioa_reset_attempts = 0;
2155 pmcraid_err("IOA didn't respond marking it as dead\n");
2156 pinstance->ioa_state = IOA_STATE_DEAD;
2157
2158 if (pinstance->ioa_bringdown)
2159 pmcraid_notify_ioastate(pinstance,
2160 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2161 else
2162 pmcraid_notify_ioastate(pinstance,
2163 PMC_DEVICE_EVENT_RESET_FAILED);
2164 reset_complete = 1;
2165 break;
2166 }
2167
2168
2169
2170
2171 pci_restore_state(pinstance->pdev);
2172
2173
2174 pmcraid_fail_outstanding_cmds(pinstance);
2175
2176
2177 if (pinstance->ioa_unit_check) {
2178 pmcraid_info("unit check is active\n");
2179 pinstance->ioa_unit_check = 0;
2180 pmcraid_get_dump(pinstance);
2181 pinstance->ioa_reset_attempts--;
2182 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2183 pmcraid_reset_alert(cmd);
2184 break;
2185 }
2186
2187
2188
2189
2190
2191 if (pinstance->ioa_bringdown) {
2192 pmcraid_info("bringing down the adapter\n");
2193 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2194 pinstance->ioa_bringdown = 0;
2195 pinstance->ioa_state = IOA_STATE_UNKNOWN;
2196 pmcraid_notify_ioastate(pinstance,
2197 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
2198 reset_complete = 1;
2199 } else {
2200
2201
2202
2203
2204 if (pmcraid_reset_enable_ioa(pinstance)) {
2205 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2206 pmcraid_info("bringing up the adapter\n");
2207 pmcraid_reinit_cmdblk(cmd);
2208 pmcraid_identify_hrrq(cmd);
2209 } else {
2210 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2211 pmcraid_soft_reset(cmd);
2212 }
2213 }
2214 break;
2215
2216 case IOA_STATE_IN_SOFT_RESET:
2217
2218
2219
2220 pmcraid_info("In softreset proceeding with bring-up\n");
2221 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2222
2223
2224
2225
2226
2227 pmcraid_identify_hrrq(cmd);
2228 break;
2229
2230 case IOA_STATE_IN_BRINGUP:
2231
2232
2233
2234 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2235 reset_complete = 1;
2236 break;
2237
2238 case IOA_STATE_OPERATIONAL:
2239 default:
2240
2241
2242
2243
2244
2245 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2246 pinstance->force_ioa_reset == 0) {
2247 pmcraid_notify_ioastate(pinstance,
2248 PMC_DEVICE_EVENT_RESET_SUCCESS);
2249 reset_complete = 1;
2250 } else {
2251 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2252 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2253 pmcraid_reinit_cmdblk(cmd);
2254 pmcraid_unregister_hcams(cmd);
2255 }
2256 break;
2257 }
2258
2259
2260
2261
2262
2263
2264 if (reset_complete) {
2265 pinstance->ioa_reset_in_progress = 0;
2266 pinstance->ioa_reset_attempts = 0;
2267 pinstance->reset_cmd = NULL;
2268 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2269 pinstance->ioa_bringdown = 0;
2270 pmcraid_return_cmd(cmd);
2271
2272
2273
2274
2275 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2276 pmcraid_register_hcams(pinstance);
2277
2278 wake_up_all(&pinstance->reset_wait_q);
2279 }
2280
2281 return;
2282}
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2296{
2297 struct pmcraid_cmd *cmd;
2298
2299
2300
2301
2302 if (!pinstance->ioa_reset_in_progress) {
2303 scsi_block_requests(pinstance->host);
2304 cmd = pmcraid_get_free_cmd(pinstance);
2305
2306 if (cmd == NULL) {
2307 pmcraid_err("no cmnd blocks for initiate_reset\n");
2308 return;
2309 }
2310
2311 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2312 pinstance->reset_cmd = cmd;
2313 pinstance->force_ioa_reset = 1;
2314 pmcraid_notify_ioastate(pinstance,
2315 PMC_DEVICE_EVENT_RESET_START);
2316 pmcraid_ioa_reset(cmd);
2317 }
2318}
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334static int pmcraid_reset_reload(
2335 struct pmcraid_instance *pinstance,
2336 u8 shutdown_type,
2337 u8 target_state
2338)
2339{
2340 struct pmcraid_cmd *reset_cmd = NULL;
2341 unsigned long lock_flags;
2342 int reset = 1;
2343
2344 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2345
2346 if (pinstance->ioa_reset_in_progress) {
2347 pmcraid_info("reset_reload: reset is already in progress\n");
2348
2349 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2350
2351 wait_event(pinstance->reset_wait_q,
2352 !pinstance->ioa_reset_in_progress);
2353
2354 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2355
2356 if (pinstance->ioa_state == IOA_STATE_DEAD) {
2357 pmcraid_info("reset_reload: IOA is dead\n");
2358 goto out_unlock;
2359 }
2360
2361 if (pinstance->ioa_state == target_state) {
2362 reset = 0;
2363 goto out_unlock;
2364 }
2365 }
2366
2367 pmcraid_info("reset_reload: proceeding with reset\n");
2368 scsi_block_requests(pinstance->host);
2369 reset_cmd = pmcraid_get_free_cmd(pinstance);
2370 if (reset_cmd == NULL) {
2371 pmcraid_err("no free cmnd for reset_reload\n");
2372 goto out_unlock;
2373 }
2374
2375 if (shutdown_type == SHUTDOWN_NORMAL)
2376 pinstance->ioa_bringdown = 1;
2377
2378 pinstance->ioa_shutdown_type = shutdown_type;
2379 pinstance->reset_cmd = reset_cmd;
2380 pinstance->force_ioa_reset = reset;
2381 pmcraid_info("reset_reload: initiating reset\n");
2382 pmcraid_ioa_reset(reset_cmd);
2383 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2384 pmcraid_info("reset_reload: waiting for reset to complete\n");
2385 wait_event(pinstance->reset_wait_q,
2386 !pinstance->ioa_reset_in_progress);
2387
2388 pmcraid_info("reset_reload: reset is complete !!\n");
2389 scsi_unblock_requests(pinstance->host);
2390 return pinstance->ioa_state != target_state;
2391
2392out_unlock:
2393 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2394 return reset;
2395}
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2406{
2407 return pmcraid_reset_reload(pinstance,
2408 SHUTDOWN_NORMAL,
2409 IOA_STATE_UNKNOWN);
2410}
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2421{
2422 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2423
2424 return pmcraid_reset_reload(pinstance,
2425 SHUTDOWN_NONE,
2426 IOA_STATE_OPERATIONAL);
2427}
2428
2429
2430
2431
2432
2433
2434
2435
2436static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2437{
2438 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2439 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
2440 struct device *dev = &cmd->drv_inst->pdev->dev;
2441
2442 cmd->sense_buffer = cmd->scsi_cmd->sense_buffer;
2443 cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer,
2444 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
2445 if (dma_mapping_error(dev, cmd->sense_buffer_dma)) {
2446 pmcraid_err
2447 ("couldn't allocate sense buffer for request sense\n");
2448 pmcraid_erp_done(cmd);
2449 return;
2450 }
2451
2452
2453 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2454 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2455 ioarcb->request_flags0 = (SYNC_COMPLETE |
2456 NO_LINK_DESCS |
2457 INHIBIT_UL_CHECK);
2458 ioarcb->request_type = REQ_TYPE_SCSI;
2459 ioarcb->cdb[0] = REQUEST_SENSE;
2460 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2461
2462 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2463 offsetof(struct pmcraid_ioarcb,
2464 add_data.u.ioadl[0]));
2465 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2466
2467 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2468
2469 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2470 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2471 ioadl->flags = IOADL_FLAGS_LAST_DESC;
2472
2473
2474
2475
2476
2477
2478 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2479 PMCRAID_REQUEST_SENSE_TIMEOUT,
2480 pmcraid_timeout_handler);
2481}
2482
2483
2484
2485
2486
2487
2488
2489
2490static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense)
2491{
2492 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2493 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2494 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2495
2496 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2497 ioarcb->request_flags0 = SYNC_OVERRIDE;
2498 ioarcb->request_type = REQ_TYPE_IOACMD;
2499 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2500
2501 if (RES_IS_GSCSI(res->cfg_entry))
2502 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2503
2504 ioarcb->ioadl_bus_addr = 0;
2505 ioarcb->ioadl_length = 0;
2506 ioarcb->data_transfer_length = 0;
2507 ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
2508
2509
2510
2511
2512 pmcraid_send_cmd(cmd, need_sense ?
2513 pmcraid_erp_done : pmcraid_request_sense,
2514 PMCRAID_REQUEST_SENSE_TIMEOUT,
2515 pmcraid_timeout_handler);
2516}
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2527{
2528 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2529 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2530 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2531 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2532 u32 failing_lba = 0;
2533
2534 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2535 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2536
2537 if (RES_IS_VSET(res->cfg_entry) &&
2538 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2539 ioasa->u.vset.failing_lba_hi != 0) {
2540
2541 sense_buf[0] = 0x72;
2542 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2543 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2544 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2545
2546 sense_buf[7] = 12;
2547 sense_buf[8] = 0;
2548 sense_buf[9] = 0x0A;
2549 sense_buf[10] = 0x80;
2550
2551 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2552
2553 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2554 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2555 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2556 sense_buf[15] = failing_lba & 0x000000ff;
2557
2558 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2559
2560 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2561 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2562 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2563 sense_buf[19] = failing_lba & 0x000000ff;
2564 } else {
2565 sense_buf[0] = 0x70;
2566 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2567 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2568 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2569
2570 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2571 if (RES_IS_VSET(res->cfg_entry))
2572 failing_lba =
2573 le32_to_cpu(ioasa->u.
2574 vset.failing_lba_lo);
2575 sense_buf[0] |= 0x80;
2576 sense_buf[3] = (failing_lba >> 24) & 0xff;
2577 sense_buf[4] = (failing_lba >> 16) & 0xff;
2578 sense_buf[5] = (failing_lba >> 8) & 0xff;
2579 sense_buf[6] = failing_lba & 0xff;
2580 }
2581
2582 sense_buf[7] = 6;
2583 }
2584}
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2599{
2600 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2601 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2602 struct pmcraid_instance *pinstance = cmd->drv_inst;
2603 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2604 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2605 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
2606 bool sense_copied = false;
2607
2608 if (!res) {
2609 pmcraid_info("resource pointer is NULL\n");
2610 return 0;
2611 }
2612
2613
2614 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2615 atomic_inc(&res->read_failures);
2616 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2617 atomic_inc(&res->write_failures);
2618
2619 if (!RES_IS_GSCSI(res->cfg_entry) &&
2620 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2621 pmcraid_frame_auto_sense(cmd);
2622 }
2623
2624
2625 pmcraid_ioasc_logger(ioasc, cmd);
2626
2627 switch (masked_ioasc) {
2628
2629 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2630 scsi_cmd->result |= (DID_ABORT << 16);
2631 break;
2632
2633 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2634 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2635 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2636 break;
2637
2638 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2639 res->sync_reqd = 1;
2640 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2641 break;
2642
2643 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2644 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2645 break;
2646
2647 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2648 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2649 if (!res->reset_progress)
2650 scsi_report_bus_reset(pinstance->host,
2651 scsi_cmd->device->channel);
2652 scsi_cmd->result |= (DID_ERROR << 16);
2653 break;
2654
2655 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2656 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2657 res->sync_reqd = 1;
2658
2659
2660
2661
2662 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2663 SAM_STAT_CHECK_CONDITION &&
2664 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2665 return 0;
2666
2667
2668
2669
2670 if (ioasa->auto_sense_length != 0) {
2671 short sense_len = le16_to_cpu(ioasa->auto_sense_length);
2672 int data_size = min_t(u16, sense_len,
2673 SCSI_SENSE_BUFFERSIZE);
2674
2675 memcpy(scsi_cmd->sense_buffer,
2676 ioasa->sense_data,
2677 data_size);
2678 sense_copied = true;
2679 }
2680
2681 if (RES_IS_GSCSI(res->cfg_entry))
2682 pmcraid_cancel_all(cmd, sense_copied);
2683 else if (sense_copied)
2684 pmcraid_erp_done(cmd);
2685 else
2686 pmcraid_request_sense(cmd);
2687
2688 return 1;
2689
2690 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2691 break;
2692
2693 default:
2694 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2695 scsi_cmd->result |= (DID_ERROR << 16);
2696 break;
2697 }
2698 return 0;
2699}
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714static int pmcraid_reset_device(
2715 struct scsi_cmnd *scsi_cmd,
2716 unsigned long timeout,
2717 u8 modifier
2718)
2719{
2720 struct pmcraid_cmd *cmd;
2721 struct pmcraid_instance *pinstance;
2722 struct pmcraid_resource_entry *res;
2723 struct pmcraid_ioarcb *ioarcb;
2724 unsigned long lock_flags;
2725 u32 ioasc;
2726
2727 pinstance =
2728 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2729 res = scsi_cmd->device->hostdata;
2730
2731 if (!res) {
2732 sdev_printk(KERN_ERR, scsi_cmd->device,
2733 "reset_device: NULL resource pointer\n");
2734 return FAILED;
2735 }
2736
2737
2738
2739
2740
2741 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2742 if (pinstance->ioa_reset_in_progress ||
2743 pinstance->ioa_state == IOA_STATE_DEAD) {
2744 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2745 return FAILED;
2746 }
2747
2748 res->reset_progress = 1;
2749 pmcraid_info("Resetting %s resource with addr %x\n",
2750 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2751 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2752 le32_to_cpu(res->cfg_entry.resource_address));
2753
2754
2755 cmd = pmcraid_get_free_cmd(pinstance);
2756
2757 if (cmd == NULL) {
2758 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2759 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2760 return FAILED;
2761 }
2762
2763 ioarcb = &cmd->ioa_cb->ioarcb;
2764 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2765 ioarcb->request_type = REQ_TYPE_IOACMD;
2766 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2767
2768
2769 if (modifier)
2770 modifier = ENABLE_RESET_MODIFIER | modifier;
2771
2772 ioarcb->cdb[1] = modifier;
2773
2774 init_completion(&cmd->wait_for_completion);
2775 cmd->completion_req = 1;
2776
2777 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2778 cmd->ioa_cb->ioarcb.cdb[0],
2779 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2780 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2781
2782 pmcraid_send_cmd(cmd,
2783 pmcraid_internal_done,
2784 timeout,
2785 pmcraid_timeout_handler);
2786
2787 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2788
2789
2790
2791
2792
2793 wait_for_completion(&cmd->wait_for_completion);
2794
2795
2796
2797
2798 pmcraid_return_cmd(cmd);
2799 res->reset_progress = 0;
2800 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2801
2802
2803 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2804}
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2823{
2824 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2825 int rc = 0;
2826
2827 scsi_set_resid(scsi_cmd, reslen);
2828
2829 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2830 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2831 cmd->ioa_cb->ioarcb.cdb[0],
2832 ioasc, scsi_cmd->result);
2833
2834 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2835 rc = pmcraid_error_handler(cmd);
2836
2837 if (rc == 0) {
2838 scsi_dma_unmap(scsi_cmd);
2839 scsi_cmd->scsi_done(scsi_cmd);
2840 }
2841
2842 return rc;
2843}
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2858{
2859 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2860 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2861
2862 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2863 pmcraid_return_cmd(cmd);
2864}
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2875{
2876 struct pmcraid_cmd *cancel_cmd;
2877 struct pmcraid_instance *pinstance;
2878 struct pmcraid_resource_entry *res;
2879
2880 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2881 res = cmd->scsi_cmd->device->hostdata;
2882
2883 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2884
2885 if (cancel_cmd == NULL) {
2886 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2887 return NULL;
2888 }
2889
2890 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2891
2892 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2893 cmd->ioa_cb->ioarcb.cdb[0],
2894 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2895
2896 init_completion(&cancel_cmd->wait_for_completion);
2897 cancel_cmd->completion_req = 1;
2898
2899 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2900 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
2901 cancel_cmd->ioa_cb->ioarcb.cdb[0],
2902 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2903
2904 pmcraid_send_cmd(cancel_cmd,
2905 pmcraid_internal_done,
2906 PMCRAID_INTERNAL_TIMEOUT,
2907 pmcraid_timeout_handler);
2908 return cancel_cmd;
2909}
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2921{
2922 struct pmcraid_resource_entry *res;
2923 u32 ioasc;
2924
2925 wait_for_completion(&cancel_cmd->wait_for_completion);
2926 res = cancel_cmd->res;
2927 cancel_cmd->res = NULL;
2928 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2929
2930
2931
2932
2933
2934
2935 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
2936 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
2937 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
2938 res->sync_reqd = 1;
2939 ioasc = 0;
2940 }
2941
2942
2943 pmcraid_return_cmd(cancel_cmd);
2944 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2945}
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
2958{
2959 struct pmcraid_instance *pinstance;
2960 struct pmcraid_cmd *cmd;
2961 struct pmcraid_resource_entry *res;
2962 unsigned long host_lock_flags;
2963 unsigned long pending_lock_flags;
2964 struct pmcraid_cmd *cancel_cmd = NULL;
2965 int cmd_found = 0;
2966 int rc = FAILED;
2967
2968 pinstance =
2969 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2970
2971 scmd_printk(KERN_INFO, scsi_cmd,
2972 "I/O command timed out, aborting it.\n");
2973
2974 res = scsi_cmd->device->hostdata;
2975
2976 if (res == NULL)
2977 return rc;
2978
2979
2980
2981
2982
2983
2984 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
2985
2986 if (pinstance->ioa_reset_in_progress ||
2987 pinstance->ioa_state == IOA_STATE_DEAD) {
2988 spin_unlock_irqrestore(pinstance->host->host_lock,
2989 host_lock_flags);
2990 return rc;
2991 }
2992
2993
2994
2995
2996
2997
2998 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
2999 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
3000
3001 if (cmd->scsi_cmd == scsi_cmd) {
3002 cmd_found = 1;
3003 break;
3004 }
3005 }
3006
3007 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
3008 pending_lock_flags);
3009
3010
3011
3012
3013 if (cmd_found)
3014 cancel_cmd = pmcraid_abort_cmd(cmd);
3015
3016 spin_unlock_irqrestore(pinstance->host->host_lock,
3017 host_lock_flags);
3018
3019 if (cancel_cmd) {
3020 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
3021 rc = pmcraid_abort_complete(cancel_cmd);
3022 }
3023
3024 return cmd_found ? rc : SUCCESS;
3025}
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3042{
3043 scmd_printk(KERN_INFO, scmd,
3044 "resetting device due to an I/O command timeout.\n");
3045 return pmcraid_reset_device(scmd,
3046 PMCRAID_INTERNAL_TIMEOUT,
3047 RESET_DEVICE_LUN);
3048}
3049
3050static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3051{
3052 scmd_printk(KERN_INFO, scmd,
3053 "Doing bus reset due to an I/O command timeout.\n");
3054 return pmcraid_reset_device(scmd,
3055 PMCRAID_RESET_BUS_TIMEOUT,
3056 RESET_DEVICE_BUS);
3057}
3058
3059static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3060{
3061 scmd_printk(KERN_INFO, scmd,
3062 "Doing target reset due to an I/O command timeout.\n");
3063 return pmcraid_reset_device(scmd,
3064 PMCRAID_INTERNAL_TIMEOUT,
3065 RESET_DEVICE_TARGET);
3066}
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3079{
3080 unsigned long interval = 10000;
3081 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3082 struct pmcraid_instance *pinstance =
3083 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3084
3085
3086
3087
3088
3089
3090 while (waits--) {
3091 if (atomic_read(&pinstance->outstanding_cmds) <=
3092 PMCRAID_MAX_HCAM_CMD)
3093 return SUCCESS;
3094 msleep(interval);
3095 }
3096
3097 dev_err(&pinstance->pdev->dev,
3098 "Adapter being reset due to an I/O command timeout.\n");
3099 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3100}
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111static struct pmcraid_ioadl_desc *
3112pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3113{
3114 struct pmcraid_ioadl_desc *ioadl;
3115 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3116 int ioadl_count = 0;
3117
3118 if (ioarcb->add_cmd_param_length)
3119 ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
3120 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
3121
3122 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3123
3124
3125
3126
3127
3128 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
3129 ioarcb->ioadl_bus_addr =
3130 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3131 offsetof(struct pmcraid_ioarcb,
3132 add_data.u.ioadl[3]));
3133 ioadl = &ioarcb->add_data.u.ioadl[3];
3134 } else {
3135 ioarcb->ioadl_bus_addr =
3136 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3137 offsetof(struct pmcraid_ioarcb,
3138 add_data.u.ioadl[ioadl_count]));
3139
3140 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3141 ioarcb->ioarcb_bus_addr |=
3142 cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
3143 }
3144
3145 return ioadl;
3146}
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159static int pmcraid_build_ioadl(
3160 struct pmcraid_instance *pinstance,
3161 struct pmcraid_cmd *cmd
3162)
3163{
3164 int i, nseg;
3165 struct scatterlist *sglist;
3166
3167 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3168 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
3169 struct pmcraid_ioadl_desc *ioadl;
3170
3171 u32 length = scsi_bufflen(scsi_cmd);
3172
3173 if (!length)
3174 return 0;
3175
3176 nseg = scsi_dma_map(scsi_cmd);
3177
3178 if (nseg < 0) {
3179 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
3180 return -1;
3181 } else if (nseg > PMCRAID_MAX_IOADLS) {
3182 scsi_dma_unmap(scsi_cmd);
3183 scmd_printk(KERN_ERR, scsi_cmd,
3184 "sg count is (%d) more than allowed!\n", nseg);
3185 return -1;
3186 }
3187
3188
3189 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3190 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3191
3192 ioarcb->request_flags0 |= NO_LINK_DESCS;
3193 ioarcb->data_transfer_length = cpu_to_le32(length);
3194 ioadl = pmcraid_init_ioadls(cmd, nseg);
3195
3196
3197 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3198 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3199 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3200 ioadl[i].flags = 0;
3201 }
3202
3203 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3204
3205 return 0;
3206}
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3218{
3219 sgl_free_order(sglist->scatterlist, sglist->order);
3220 kfree(sglist);
3221}
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3234{
3235 struct pmcraid_sglist *sglist;
3236 int sg_size;
3237 int order;
3238
3239 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3240 order = (sg_size > 0) ? get_order(sg_size) : 0;
3241
3242
3243 sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL);
3244 if (sglist == NULL)
3245 return NULL;
3246
3247 sglist->order = order;
3248 sgl_alloc_order(buflen, order, false,
3249 GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg);
3250
3251 return sglist;
3252}
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266static int pmcraid_copy_sglist(
3267 struct pmcraid_sglist *sglist,
3268 void __user *buffer,
3269 u32 len,
3270 int direction
3271)
3272{
3273 struct scatterlist *scatterlist;
3274 void *kaddr;
3275 int bsize_elem;
3276 int i;
3277 int rc = 0;
3278
3279
3280 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3281
3282 scatterlist = sglist->scatterlist;
3283
3284 for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
3285 struct page *page = sg_page(&scatterlist[i]);
3286
3287 kaddr = kmap(page);
3288 if (direction == DMA_TO_DEVICE)
3289 rc = copy_from_user(kaddr, buffer, bsize_elem);
3290 else
3291 rc = copy_to_user(buffer, kaddr, bsize_elem);
3292
3293 kunmap(page);
3294
3295 if (rc) {
3296 pmcraid_err("failed to copy user data into sg list\n");
3297 return -EFAULT;
3298 }
3299
3300 scatterlist[i].length = bsize_elem;
3301 }
3302
3303 if (len % bsize_elem) {
3304 struct page *page = sg_page(&scatterlist[i]);
3305
3306 kaddr = kmap(page);
3307
3308 if (direction == DMA_TO_DEVICE)
3309 rc = copy_from_user(kaddr, buffer, len % bsize_elem);
3310 else
3311 rc = copy_to_user(buffer, kaddr, len % bsize_elem);
3312
3313 kunmap(page);
3314
3315 scatterlist[i].length = len % bsize_elem;
3316 }
3317
3318 if (rc) {
3319 pmcraid_err("failed to copy user data into sg list\n");
3320 rc = -EFAULT;
3321 }
3322
3323 return rc;
3324}
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340static int pmcraid_queuecommand_lck(
3341 struct scsi_cmnd *scsi_cmd,
3342 void (*done) (struct scsi_cmnd *)
3343)
3344{
3345 struct pmcraid_instance *pinstance;
3346 struct pmcraid_resource_entry *res;
3347 struct pmcraid_ioarcb *ioarcb;
3348 struct pmcraid_cmd *cmd;
3349 u32 fw_version;
3350 int rc = 0;
3351
3352 pinstance =
3353 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
3354 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
3355 scsi_cmd->scsi_done = done;
3356 res = scsi_cmd->device->hostdata;
3357 scsi_cmd->result = (DID_OK << 16);
3358
3359
3360
3361
3362 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3363 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3364 scsi_cmd->result = (DID_NO_CONNECT << 16);
3365 scsi_cmd->scsi_done(scsi_cmd);
3366 return 0;
3367 }
3368
3369
3370 if (pinstance->ioa_reset_in_progress)
3371 return SCSI_MLQUEUE_HOST_BUSY;
3372
3373
3374
3375
3376 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3377 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3378 scsi_cmd->scsi_done(scsi_cmd);
3379 return 0;
3380 }
3381
3382
3383 cmd = pmcraid_get_free_cmd(pinstance);
3384
3385 if (cmd == NULL) {
3386 pmcraid_err("free command block is not available\n");
3387 return SCSI_MLQUEUE_HOST_BUSY;
3388 }
3389
3390 cmd->scsi_cmd = scsi_cmd;
3391 ioarcb = &(cmd->ioa_cb->ioarcb);
3392 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3393 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3394 ioarcb->request_type = REQ_TYPE_SCSI;
3395
3396
3397
3398
3399
3400
3401 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3402 pinstance->num_hrrq;
3403 cmd->cmd_done = pmcraid_io_done;
3404
3405 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3406 if (scsi_cmd->underflow == 0)
3407 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3408
3409 if (res->sync_reqd) {
3410 ioarcb->request_flags0 |= SYNC_COMPLETE;
3411 res->sync_reqd = 0;
3412 }
3413
3414 ioarcb->request_flags0 |= NO_LINK_DESCS;
3415
3416 if (scsi_cmd->flags & SCMD_TAGGED)
3417 ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
3418
3419 if (RES_IS_GSCSI(res->cfg_entry))
3420 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3421 }
3422
3423 rc = pmcraid_build_ioadl(pinstance, cmd);
3424
3425 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3426 le32_to_cpu(ioarcb->response_handle) >> 2,
3427 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3428 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3429 PMCRAID_PHYS_BUS_ID,
3430 RES_IS_VSET(res->cfg_entry) ?
3431 (fw_version <= PMCRAID_FW_VERSION_1 ?
3432 res->cfg_entry.unique_flags1 :
3433 le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
3434 RES_TARGET(res->cfg_entry.resource_address),
3435 RES_LUN(res->cfg_entry.resource_address));
3436
3437 if (likely(rc == 0)) {
3438 _pmcraid_fire_command(cmd);
3439 } else {
3440 pmcraid_err("queuecommand could not build ioadl\n");
3441 pmcraid_return_cmd(cmd);
3442 rc = SCSI_MLQUEUE_HOST_BUSY;
3443 }
3444
3445 return rc;
3446}
3447
3448static DEF_SCSI_QCMD(pmcraid_queuecommand)
3449
3450
3451
3452
3453static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3454{
3455 struct pmcraid_instance *pinstance;
3456
3457 if (!capable(CAP_SYS_ADMIN))
3458 return -EACCES;
3459
3460
3461 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3462 filep->private_data = pinstance;
3463
3464 return 0;
3465}
3466
3467
3468
3469
3470
3471
3472
3473static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3474{
3475 struct pmcraid_instance *pinstance;
3476 int rc;
3477
3478 pinstance = filep->private_data;
3479 mutex_lock(&pinstance->aen_queue_lock);
3480 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3481 mutex_unlock(&pinstance->aen_queue_lock);
3482
3483 return rc;
3484}
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498static int pmcraid_build_passthrough_ioadls(
3499 struct pmcraid_cmd *cmd,
3500 int buflen,
3501 int direction
3502)
3503{
3504 struct pmcraid_sglist *sglist = NULL;
3505 struct scatterlist *sg = NULL;
3506 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3507 struct pmcraid_ioadl_desc *ioadl;
3508 int i;
3509
3510 sglist = pmcraid_alloc_sglist(buflen);
3511
3512 if (!sglist) {
3513 pmcraid_err("can't allocate memory for passthrough SGls\n");
3514 return -ENOMEM;
3515 }
3516
3517 sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev,
3518 sglist->scatterlist,
3519 sglist->num_sg, direction);
3520
3521 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3522 dev_err(&cmd->drv_inst->pdev->dev,
3523 "Failed to map passthrough buffer!\n");
3524 pmcraid_free_sglist(sglist);
3525 return -EIO;
3526 }
3527
3528 cmd->sglist = sglist;
3529 ioarcb->request_flags0 |= NO_LINK_DESCS;
3530
3531 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3532
3533
3534 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3535 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3536 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3537 ioadl[i].flags = 0;
3538 }
3539
3540
3541 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3542
3543 return 0;
3544}
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557static void pmcraid_release_passthrough_ioadls(
3558 struct pmcraid_cmd *cmd,
3559 int buflen,
3560 int direction
3561)
3562{
3563 struct pmcraid_sglist *sglist = cmd->sglist;
3564
3565 if (buflen > 0) {
3566 dma_unmap_sg(&cmd->drv_inst->pdev->dev,
3567 sglist->scatterlist,
3568 sglist->num_sg,
3569 direction);
3570 pmcraid_free_sglist(sglist);
3571 cmd->sglist = NULL;
3572 }
3573}
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585static long pmcraid_ioctl_passthrough(
3586 struct pmcraid_instance *pinstance,
3587 unsigned int ioctl_cmd,
3588 unsigned int buflen,
3589 void __user *arg
3590)
3591{
3592 struct pmcraid_passthrough_ioctl_buffer *buffer;
3593 struct pmcraid_ioarcb *ioarcb;
3594 struct pmcraid_cmd *cmd;
3595 struct pmcraid_cmd *cancel_cmd;
3596 void __user *request_buffer;
3597 unsigned long request_offset;
3598 unsigned long lock_flags;
3599 void __user *ioasa;
3600 u32 ioasc;
3601 int request_size;
3602 int buffer_size;
3603 u8 direction;
3604 int rc = 0;
3605
3606
3607 if (pinstance->ioa_reset_in_progress) {
3608 rc = wait_event_interruptible_timeout(
3609 pinstance->reset_wait_q,
3610 !pinstance->ioa_reset_in_progress,
3611 msecs_to_jiffies(10000));
3612
3613 if (!rc)
3614 return -ETIMEDOUT;
3615 else if (rc < 0)
3616 return -ERESTARTSYS;
3617 }
3618
3619
3620 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3621 pmcraid_err("IOA is not operational\n");
3622 return -ENOTTY;
3623 }
3624
3625 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3626 buffer = kmalloc(buffer_size, GFP_KERNEL);
3627
3628 if (!buffer) {
3629 pmcraid_err("no memory for passthrough buffer\n");
3630 return -ENOMEM;
3631 }
3632
3633 request_offset =
3634 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3635
3636 request_buffer = arg + request_offset;
3637
3638 rc = copy_from_user(buffer, arg,
3639 sizeof(struct pmcraid_passthrough_ioctl_buffer));
3640
3641 ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
3642
3643 if (rc) {
3644 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3645 rc = -EFAULT;
3646 goto out_free_buffer;
3647 }
3648
3649 request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
3650
3651 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
3652 direction = DMA_TO_DEVICE;
3653 } else {
3654 direction = DMA_FROM_DEVICE;
3655 }
3656
3657 if (request_size < 0) {
3658 rc = -EINVAL;
3659 goto out_free_buffer;
3660 }
3661
3662
3663 if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
3664 > PMCRAID_ADD_CMD_PARAM_LEN) {
3665 rc = -EINVAL;
3666 goto out_free_buffer;
3667 }
3668
3669 cmd = pmcraid_get_free_cmd(pinstance);
3670
3671 if (!cmd) {
3672 pmcraid_err("free command block is not available\n");
3673 rc = -ENOMEM;
3674 goto out_free_buffer;
3675 }
3676
3677 cmd->scsi_cmd = NULL;
3678 ioarcb = &(cmd->ioa_cb->ioarcb);
3679
3680
3681 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3682 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3683 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3684 ioarcb->request_type = buffer->ioarcb.request_type;
3685 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3686 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3687 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3688
3689 if (buffer->ioarcb.add_cmd_param_length) {
3690 ioarcb->add_cmd_param_length =
3691 buffer->ioarcb.add_cmd_param_length;
3692 ioarcb->add_cmd_param_offset =
3693 buffer->ioarcb.add_cmd_param_offset;
3694 memcpy(ioarcb->add_data.u.add_cmd_params,
3695 buffer->ioarcb.add_data.u.add_cmd_params,
3696 le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
3697 }
3698
3699
3700
3701
3702
3703
3704 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3705 pinstance->num_hrrq;
3706
3707 if (request_size) {
3708 rc = pmcraid_build_passthrough_ioadls(cmd,
3709 request_size,
3710 direction);
3711 if (rc) {
3712 pmcraid_err("couldn't build passthrough ioadls\n");
3713 goto out_free_cmd;
3714 }
3715 }
3716
3717
3718
3719
3720 if (direction == DMA_TO_DEVICE && request_size > 0) {
3721 rc = pmcraid_copy_sglist(cmd->sglist,
3722 request_buffer,
3723 request_size,
3724 direction);
3725 if (rc) {
3726 pmcraid_err("failed to copy user buffer\n");
3727 goto out_free_sglist;
3728 }
3729 }
3730
3731
3732
3733
3734 cmd->cmd_done = pmcraid_internal_done;
3735 init_completion(&cmd->wait_for_completion);
3736 cmd->completion_req = 1;
3737
3738 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3739 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3740 cmd->ioa_cb->ioarcb.cdb[0],
3741 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3742
3743 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3744 _pmcraid_fire_command(cmd);
3745 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3746
3747
3748
3749
3750
3751
3752
3753 buffer->ioarcb.cmd_timeout = 0;
3754
3755
3756
3757
3758
3759 if (buffer->ioarcb.cmd_timeout == 0) {
3760 wait_for_completion(&cmd->wait_for_completion);
3761 } else if (!wait_for_completion_timeout(
3762 &cmd->wait_for_completion,
3763 msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
3764
3765 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
3766 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3767 cmd->ioa_cb->ioarcb.cdb[0]);
3768
3769 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3770 cancel_cmd = pmcraid_abort_cmd(cmd);
3771 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3772
3773 if (cancel_cmd) {
3774 wait_for_completion(&cancel_cmd->wait_for_completion);
3775 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
3776 pmcraid_return_cmd(cancel_cmd);
3777
3778
3779
3780
3781
3782
3783
3784 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3785 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3786 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3787 rc = -ETIMEDOUT;
3788 goto out_handle_response;
3789 }
3790 }
3791
3792
3793
3794
3795
3796 if (!wait_for_completion_timeout(
3797 &cmd->wait_for_completion,
3798 msecs_to_jiffies(150 * 1000))) {
3799 pmcraid_reset_bringup(cmd->drv_inst);
3800 rc = -ETIMEDOUT;
3801 }
3802 }
3803
3804out_handle_response:
3805
3806
3807
3808
3809 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3810 sizeof(struct pmcraid_ioasa))) {
3811 pmcraid_err("failed to copy ioasa buffer to user\n");
3812 rc = -EFAULT;
3813 }
3814
3815
3816
3817
3818 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3819 rc = pmcraid_copy_sglist(cmd->sglist,
3820 request_buffer,
3821 request_size,
3822 direction);
3823 if (rc) {
3824 pmcraid_err("failed to copy user buffer\n");
3825 rc = -EFAULT;
3826 }
3827 }
3828
3829out_free_sglist:
3830 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
3831
3832out_free_cmd:
3833 pmcraid_return_cmd(cmd);
3834
3835out_free_buffer:
3836 kfree(buffer);
3837
3838 return rc;
3839}
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855static long pmcraid_ioctl_driver(
3856 struct pmcraid_instance *pinstance,
3857 unsigned int cmd,
3858 unsigned int buflen,
3859 void __user *user_buffer
3860)
3861{
3862 int rc = -ENOSYS;
3863
3864 switch (cmd) {
3865 case PMCRAID_IOCTL_RESET_ADAPTER:
3866 pmcraid_reset_bringup(pinstance);
3867 rc = 0;
3868 break;
3869
3870 default:
3871 break;
3872 }
3873
3874 return rc;
3875}
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889static int pmcraid_check_ioctl_buffer(
3890 int cmd,
3891 void __user *arg,
3892 struct pmcraid_ioctl_header *hdr
3893)
3894{
3895 int rc;
3896
3897 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
3898 pmcraid_err("couldn't copy ioctl header from user buffer\n");
3899 return -EFAULT;
3900 }
3901
3902
3903 rc = memcmp(hdr->signature,
3904 PMCRAID_IOCTL_SIGNATURE,
3905 sizeof(hdr->signature));
3906 if (rc) {
3907 pmcraid_err("signature verification failed\n");
3908 return -EINVAL;
3909 }
3910
3911 return 0;
3912}
3913
3914
3915
3916
3917static long pmcraid_chr_ioctl(
3918 struct file *filep,
3919 unsigned int cmd,
3920 unsigned long arg
3921)
3922{
3923 struct pmcraid_instance *pinstance = NULL;
3924 struct pmcraid_ioctl_header *hdr = NULL;
3925 void __user *argp = (void __user *)arg;
3926 int retval = -ENOTTY;
3927
3928 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
3929
3930 if (!hdr) {
3931 pmcraid_err("failed to allocate memory for ioctl header\n");
3932 return -ENOMEM;
3933 }
3934
3935 retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
3936
3937 if (retval) {
3938 pmcraid_info("chr_ioctl: header check failed\n");
3939 kfree(hdr);
3940 return retval;
3941 }
3942
3943 pinstance = filep->private_data;
3944
3945 if (!pinstance) {
3946 pmcraid_info("adapter instance is not found\n");
3947 kfree(hdr);
3948 return -ENOTTY;
3949 }
3950
3951 switch (_IOC_TYPE(cmd)) {
3952
3953 case PMCRAID_PASSTHROUGH_IOCTL:
3954
3955
3956
3957 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3958 scsi_block_requests(pinstance->host);
3959
3960 retval = pmcraid_ioctl_passthrough(pinstance, cmd,
3961 hdr->buffer_length, argp);
3962
3963 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3964 scsi_unblock_requests(pinstance->host);
3965 break;
3966
3967 case PMCRAID_DRIVER_IOCTL:
3968 arg += sizeof(struct pmcraid_ioctl_header);
3969 retval = pmcraid_ioctl_driver(pinstance, cmd,
3970 hdr->buffer_length, argp);
3971 break;
3972
3973 default:
3974 retval = -ENOTTY;
3975 break;
3976 }
3977
3978 kfree(hdr);
3979
3980 return retval;
3981}
3982
3983
3984
3985
3986static const struct file_operations pmcraid_fops = {
3987 .owner = THIS_MODULE,
3988 .open = pmcraid_chr_open,
3989 .fasync = pmcraid_chr_fasync,
3990 .unlocked_ioctl = pmcraid_chr_ioctl,
3991#ifdef CONFIG_COMPAT
3992 .compat_ioctl = pmcraid_chr_ioctl,
3993#endif
3994 .llseek = noop_llseek,
3995};
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008static ssize_t pmcraid_show_log_level(
4009 struct device *dev,
4010 struct device_attribute *attr,
4011 char *buf)
4012{
4013 struct Scsi_Host *shost = class_to_shost(dev);
4014 struct pmcraid_instance *pinstance =
4015 (struct pmcraid_instance *)shost->hostdata;
4016 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
4017}
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028static ssize_t pmcraid_store_log_level(
4029 struct device *dev,
4030 struct device_attribute *attr,
4031 const char *buf,
4032 size_t count
4033)
4034{
4035 struct Scsi_Host *shost;
4036 struct pmcraid_instance *pinstance;
4037 u8 val;
4038
4039 if (kstrtou8(buf, 10, &val))
4040 return -EINVAL;
4041
4042 if (val > 2)
4043 return -EINVAL;
4044
4045 shost = class_to_shost(dev);
4046 pinstance = (struct pmcraid_instance *)shost->hostdata;
4047 pinstance->current_log_level = val;
4048
4049 return strlen(buf);
4050}
4051
4052static struct device_attribute pmcraid_log_level_attr = {
4053 .attr = {
4054 .name = "log_level",
4055 .mode = S_IRUGO | S_IWUSR,
4056 },
4057 .show = pmcraid_show_log_level,
4058 .store = pmcraid_store_log_level,
4059};
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069static ssize_t pmcraid_show_drv_version(
4070 struct device *dev,
4071 struct device_attribute *attr,
4072 char *buf
4073)
4074{
4075 return snprintf(buf, PAGE_SIZE, "version: %s\n",
4076 PMCRAID_DRIVER_VERSION);
4077}
4078
4079static struct device_attribute pmcraid_driver_version_attr = {
4080 .attr = {
4081 .name = "drv_version",
4082 .mode = S_IRUGO,
4083 },
4084 .show = pmcraid_show_drv_version,
4085};
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095static ssize_t pmcraid_show_adapter_id(
4096 struct device *dev,
4097 struct device_attribute *attr,
4098 char *buf
4099)
4100{
4101 struct Scsi_Host *shost = class_to_shost(dev);
4102 struct pmcraid_instance *pinstance =
4103 (struct pmcraid_instance *)shost->hostdata;
4104 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4105 pinstance->pdev->devfn;
4106 u32 aen_group = pmcraid_event_family.id;
4107
4108 return snprintf(buf, PAGE_SIZE,
4109 "adapter id: %d\nminor: %d\naen group: %d\n",
4110 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4111}
4112
4113static struct device_attribute pmcraid_adapter_id_attr = {
4114 .attr = {
4115 .name = "adapter_id",
4116 .mode = S_IRUGO,
4117 },
4118 .show = pmcraid_show_adapter_id,
4119};
4120
4121static struct device_attribute *pmcraid_host_attrs[] = {
4122 &pmcraid_log_level_attr,
4123 &pmcraid_driver_version_attr,
4124 &pmcraid_adapter_id_attr,
4125 NULL,
4126};
4127
4128
4129
4130static struct scsi_host_template pmcraid_host_template = {
4131 .module = THIS_MODULE,
4132 .name = PMCRAID_DRIVER_NAME,
4133 .queuecommand = pmcraid_queuecommand,
4134 .eh_abort_handler = pmcraid_eh_abort_handler,
4135 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4136 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4137 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4138 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4139
4140 .slave_alloc = pmcraid_slave_alloc,
4141 .slave_configure = pmcraid_slave_configure,
4142 .slave_destroy = pmcraid_slave_destroy,
4143 .change_queue_depth = pmcraid_change_queue_depth,
4144 .can_queue = PMCRAID_MAX_IO_CMD,
4145 .this_id = -1,
4146 .sg_tablesize = PMCRAID_MAX_IOADLS,
4147 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
4148 .no_write_same = 1,
4149 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
4150 .shost_attrs = pmcraid_host_attrs,
4151 .proc_name = PMCRAID_DRIVER_NAME,
4152};
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
4164{
4165 struct pmcraid_isr_param *hrrq_vector;
4166 struct pmcraid_instance *pinstance;
4167 unsigned long lock_flags;
4168 u32 intrs_val;
4169 int hrrq_id;
4170
4171 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4172 hrrq_id = hrrq_vector->hrrq_id;
4173 pinstance = hrrq_vector->drv_inst;
4174
4175 if (!hrrq_id) {
4176
4177 intrs_val = pmcraid_read_interrupts(pinstance);
4178 if (intrs_val &&
4179 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4180 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4181
4182
4183
4184
4185
4186 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4187 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4188 pinstance->ioa_unit_check = 1;
4189
4190 pmcraid_err("ISR: error interrupts: %x \
4191 initiating reset\n", intrs_val);
4192 spin_lock_irqsave(pinstance->host->host_lock,
4193 lock_flags);
4194 pmcraid_initiate_reset(pinstance);
4195 spin_unlock_irqrestore(
4196 pinstance->host->host_lock,
4197 lock_flags);
4198 }
4199
4200
4201
4202
4203 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4204 pmcraid_clr_trans_op(pinstance);
4205
4206
4207
4208
4209
4210 iowrite32(DOORBELL_INTR_MSIX_CLR,
4211 pinstance->int_regs.host_ioa_interrupt_reg);
4212 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4213
4214
4215 }
4216 }
4217
4218 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4219
4220 return IRQ_HANDLED;
4221}
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4233{
4234 struct pmcraid_isr_param *hrrq_vector;
4235 struct pmcraid_instance *pinstance;
4236 u32 intrs;
4237 unsigned long lock_flags;
4238 int hrrq_id = 0;
4239
4240
4241
4242
4243 if (!dev_id) {
4244 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4245 return IRQ_NONE;
4246 }
4247 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4248 pinstance = hrrq_vector->drv_inst;
4249
4250 intrs = pmcraid_read_interrupts(pinstance);
4251
4252 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
4253 return IRQ_NONE;
4254
4255
4256
4257
4258
4259 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4260
4261 if (intrs & INTRS_IOA_UNIT_CHECK)
4262 pinstance->ioa_unit_check = 1;
4263
4264 iowrite32(intrs,
4265 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4266 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4267 intrs);
4268 intrs = ioread32(
4269 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4270 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
4271 pmcraid_initiate_reset(pinstance);
4272 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
4273 } else {
4274
4275
4276
4277
4278 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4279 pmcraid_clr_trans_op(pinstance);
4280 } else {
4281 iowrite32(intrs,
4282 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4283 ioread32(
4284 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4285
4286 tasklet_schedule(
4287 &(pinstance->isr_tasklet[hrrq_id]));
4288 }
4289 }
4290
4291 return IRQ_HANDLED;
4292}
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304static void pmcraid_worker_function(struct work_struct *workp)
4305{
4306 struct pmcraid_instance *pinstance;
4307 struct pmcraid_resource_entry *res;
4308 struct pmcraid_resource_entry *temp;
4309 struct scsi_device *sdev;
4310 unsigned long lock_flags;
4311 unsigned long host_lock_flags;
4312 u16 fw_version;
4313 u8 bus, target, lun;
4314
4315 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4316
4317 if (!atomic_read(&pinstance->expose_resources))
4318 return;
4319
4320 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4321
4322 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4323 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4324
4325 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4326 sdev = res->scsi_dev;
4327
4328
4329
4330
4331 spin_lock_irqsave(pinstance->host->host_lock,
4332 host_lock_flags);
4333 if (!scsi_device_get(sdev)) {
4334 spin_unlock_irqrestore(
4335 pinstance->host->host_lock,
4336 host_lock_flags);
4337 pmcraid_info("deleting %x from midlayer\n",
4338 res->cfg_entry.resource_address);
4339 list_move_tail(&res->queue,
4340 &pinstance->free_res_q);
4341 spin_unlock_irqrestore(
4342 &pinstance->resource_lock,
4343 lock_flags);
4344 scsi_remove_device(sdev);
4345 scsi_device_put(sdev);
4346 spin_lock_irqsave(&pinstance->resource_lock,
4347 lock_flags);
4348 res->change_detected = 0;
4349 } else {
4350 spin_unlock_irqrestore(
4351 pinstance->host->host_lock,
4352 host_lock_flags);
4353 }
4354 }
4355 }
4356
4357 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4358
4359 if (res->change_detected == RES_CHANGE_ADD) {
4360
4361 if (!pmcraid_expose_resource(fw_version,
4362 &res->cfg_entry))
4363 continue;
4364
4365 if (RES_IS_VSET(res->cfg_entry)) {
4366 bus = PMCRAID_VSET_BUS_ID;
4367 if (fw_version <= PMCRAID_FW_VERSION_1)
4368 target = res->cfg_entry.unique_flags1;
4369 else
4370 target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
4371 lun = PMCRAID_VSET_LUN_ID;
4372 } else {
4373 bus = PMCRAID_PHYS_BUS_ID;
4374 target =
4375 RES_TARGET(
4376 res->cfg_entry.resource_address);
4377 lun = RES_LUN(res->cfg_entry.resource_address);
4378 }
4379
4380 res->change_detected = 0;
4381 spin_unlock_irqrestore(&pinstance->resource_lock,
4382 lock_flags);
4383 scsi_add_device(pinstance->host, bus, target, lun);
4384 spin_lock_irqsave(&pinstance->resource_lock,
4385 lock_flags);
4386 }
4387 }
4388
4389 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4390}
4391
4392
4393
4394
4395
4396
4397
4398
4399
4400static void pmcraid_tasklet_function(unsigned long instance)
4401{
4402 struct pmcraid_isr_param *hrrq_vector;
4403 struct pmcraid_instance *pinstance;
4404 unsigned long hrrq_lock_flags;
4405 unsigned long pending_lock_flags;
4406 unsigned long host_lock_flags;
4407 spinlock_t *lockp;
4408 int id;
4409 u32 resp;
4410
4411 hrrq_vector = (struct pmcraid_isr_param *)instance;
4412 pinstance = hrrq_vector->drv_inst;
4413 id = hrrq_vector->hrrq_id;
4414 lockp = &(pinstance->hrrq_lock[id]);
4415
4416
4417
4418
4419
4420
4421
4422 spin_lock_irqsave(lockp, hrrq_lock_flags);
4423
4424 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4425
4426 while ((resp & HRRQ_TOGGLE_BIT) ==
4427 pinstance->host_toggle_bit[id]) {
4428
4429 int cmd_index = resp >> 2;
4430 struct pmcraid_cmd *cmd = NULL;
4431
4432 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4433 pinstance->hrrq_curr[id]++;
4434 } else {
4435 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4436 pinstance->host_toggle_bit[id] ^= 1u;
4437 }
4438
4439 if (cmd_index >= PMCRAID_MAX_CMD) {
4440
4441 pmcraid_err("Invalid response handle %d\n", cmd_index);
4442 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4443 continue;
4444 }
4445
4446 cmd = pinstance->cmd_list[cmd_index];
4447 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4448
4449 spin_lock_irqsave(&pinstance->pending_pool_lock,
4450 pending_lock_flags);
4451 list_del(&cmd->free_list);
4452 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4453 pending_lock_flags);
4454 del_timer(&cmd->timer);
4455 atomic_dec(&pinstance->outstanding_cmds);
4456
4457 if (cmd->cmd_done == pmcraid_ioa_reset) {
4458 spin_lock_irqsave(pinstance->host->host_lock,
4459 host_lock_flags);
4460 cmd->cmd_done(cmd);
4461 spin_unlock_irqrestore(pinstance->host->host_lock,
4462 host_lock_flags);
4463 } else if (cmd->cmd_done != NULL) {
4464 cmd->cmd_done(cmd);
4465 }
4466
4467 spin_lock_irqsave(lockp, hrrq_lock_flags);
4468 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4469 }
4470
4471 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4472}
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482
4483
4484static
4485void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4486{
4487 struct pci_dev *pdev = pinstance->pdev;
4488 int i;
4489
4490 for (i = 0; i < pinstance->num_hrrq; i++)
4491 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4492
4493 pinstance->interrupt_mode = 0;
4494 pci_free_irq_vectors(pdev);
4495}
4496
4497
4498
4499
4500
4501
4502
4503
4504static int
4505pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4506{
4507 struct pci_dev *pdev = pinstance->pdev;
4508 unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
4509 int num_hrrq, rc, i;
4510 irq_handler_t isr;
4511
4512 if (pmcraid_enable_msix)
4513 irq_flag |= PCI_IRQ_MSIX;
4514
4515 num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
4516 irq_flag);
4517 if (num_hrrq < 0)
4518 return num_hrrq;
4519
4520 if (pdev->msix_enabled) {
4521 flag = 0;
4522 isr = pmcraid_isr_msix;
4523 } else {
4524 flag = IRQF_SHARED;
4525 isr = pmcraid_isr;
4526 }
4527
4528 for (i = 0; i < num_hrrq; i++) {
4529 struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
4530
4531 vec->hrrq_id = i;
4532 vec->drv_inst = pinstance;
4533 rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
4534 PMCRAID_DRIVER_NAME, vec);
4535 if (rc)
4536 goto out_unwind;
4537 }
4538
4539 pinstance->num_hrrq = num_hrrq;
4540 if (pdev->msix_enabled) {
4541 pinstance->interrupt_mode = 1;
4542 iowrite32(DOORBELL_INTR_MODE_MSIX,
4543 pinstance->int_regs.host_ioa_interrupt_reg);
4544 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4545 }
4546
4547 return 0;
4548
4549out_unwind:
4550 while (--i > 0)
4551 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4552 pci_free_irq_vectors(pdev);
4553 return rc;
4554}
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564static void
4565pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4566{
4567 int i;
4568 for (i = 0; i < max_index; i++) {
4569 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4570 pinstance->cmd_list[i] = NULL;
4571 }
4572 kmem_cache_destroy(pinstance->cmd_cachep);
4573 pinstance->cmd_cachep = NULL;
4574}
4575
4576
4577
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587static void
4588pmcraid_release_control_blocks(
4589 struct pmcraid_instance *pinstance,
4590 int max_index
4591)
4592{
4593 int i;
4594
4595 if (pinstance->control_pool == NULL)
4596 return;
4597
4598 for (i = 0; i < max_index; i++) {
4599 dma_pool_free(pinstance->control_pool,
4600 pinstance->cmd_list[i]->ioa_cb,
4601 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4602 pinstance->cmd_list[i]->ioa_cb = NULL;
4603 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4604 }
4605 dma_pool_destroy(pinstance->control_pool);
4606 pinstance->control_pool = NULL;
4607}
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
4619{
4620 int i;
4621
4622 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4623 pinstance->host->unique_id);
4624
4625
4626 pinstance->cmd_cachep = kmem_cache_create(
4627 pinstance->cmd_pool_name,
4628 sizeof(struct pmcraid_cmd), 0,
4629 SLAB_HWCACHE_ALIGN, NULL);
4630 if (!pinstance->cmd_cachep)
4631 return -ENOMEM;
4632
4633 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4634 pinstance->cmd_list[i] =
4635 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4636 if (!pinstance->cmd_list[i]) {
4637 pmcraid_release_cmd_blocks(pinstance, i);
4638 return -ENOMEM;
4639 }
4640 }
4641 return 0;
4642}
4643
4644
4645
4646
4647
4648
4649
4650
4651
4652
4653
4654static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
4655{
4656 int i;
4657
4658 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4659 pinstance->host->unique_id);
4660
4661 pinstance->control_pool =
4662 dma_pool_create(pinstance->ctl_pool_name,
4663 &pinstance->pdev->dev,
4664 sizeof(struct pmcraid_control_block),
4665 PMCRAID_IOARCB_ALIGNMENT, 0);
4666
4667 if (!pinstance->control_pool)
4668 return -ENOMEM;
4669
4670 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4671 pinstance->cmd_list[i]->ioa_cb =
4672 dma_pool_alloc(
4673 pinstance->control_pool,
4674 GFP_KERNEL,
4675 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4676
4677 if (!pinstance->cmd_list[i]->ioa_cb) {
4678 pmcraid_release_control_blocks(pinstance, i);
4679 return -ENOMEM;
4680 }
4681 memset(pinstance->cmd_list[i]->ioa_cb, 0,
4682 sizeof(struct pmcraid_control_block));
4683 }
4684 return 0;
4685}
4686
4687
4688
4689
4690
4691
4692
4693
4694
4695static void
4696pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4697{
4698 int i;
4699
4700 for (i = 0; i < maxindex; i++) {
4701 dma_free_coherent(&pinstance->pdev->dev,
4702 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4703 pinstance->hrrq_start[i],
4704 pinstance->hrrq_start_bus_addr[i]);
4705
4706
4707 pinstance->hrrq_start[i] = NULL;
4708 pinstance->hrrq_start_bus_addr[i] = 0;
4709 pinstance->host_toggle_bit[i] = 0;
4710 }
4711}
4712
4713
4714
4715
4716
4717
4718
4719
4720static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
4721{
4722 int i, buffer_size;
4723
4724 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
4725
4726 for (i = 0; i < pinstance->num_hrrq; i++) {
4727 pinstance->hrrq_start[i] =
4728 dma_alloc_coherent(&pinstance->pdev->dev, buffer_size,
4729 &pinstance->hrrq_start_bus_addr[i],
4730 GFP_KERNEL);
4731 if (!pinstance->hrrq_start[i]) {
4732 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4733 i);
4734 pmcraid_release_host_rrqs(pinstance, i);
4735 return -ENOMEM;
4736 }
4737
4738 memset(pinstance->hrrq_start[i], 0, buffer_size);
4739 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4740 pinstance->hrrq_end[i] =
4741 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
4742 pinstance->host_toggle_bit[i] = 1;
4743 spin_lock_init(&pinstance->hrrq_lock[i]);
4744 }
4745 return 0;
4746}
4747
4748
4749
4750
4751
4752
4753
4754
4755
4756static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4757{
4758 if (pinstance->ccn.msg != NULL) {
4759 dma_free_coherent(&pinstance->pdev->dev,
4760 PMCRAID_AEN_HDR_SIZE +
4761 sizeof(struct pmcraid_hcam_ccn_ext),
4762 pinstance->ccn.msg,
4763 pinstance->ccn.baddr);
4764
4765 pinstance->ccn.msg = NULL;
4766 pinstance->ccn.hcam = NULL;
4767 pinstance->ccn.baddr = 0;
4768 }
4769
4770 if (pinstance->ldn.msg != NULL) {
4771 dma_free_coherent(&pinstance->pdev->dev,
4772 PMCRAID_AEN_HDR_SIZE +
4773 sizeof(struct pmcraid_hcam_ldn),
4774 pinstance->ldn.msg,
4775 pinstance->ldn.baddr);
4776
4777 pinstance->ldn.msg = NULL;
4778 pinstance->ldn.hcam = NULL;
4779 pinstance->ldn.baddr = 0;
4780 }
4781}
4782
4783
4784
4785
4786
4787
4788
4789
4790static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4791{
4792 pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
4793 PMCRAID_AEN_HDR_SIZE +
4794 sizeof(struct pmcraid_hcam_ccn_ext),
4795 &pinstance->ccn.baddr, GFP_KERNEL);
4796
4797 pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
4798 PMCRAID_AEN_HDR_SIZE +
4799 sizeof(struct pmcraid_hcam_ldn),
4800 &pinstance->ldn.baddr, GFP_KERNEL);
4801
4802 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
4803 pmcraid_release_hcams(pinstance);
4804 } else {
4805 pinstance->ccn.hcam =
4806 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
4807 pinstance->ldn.hcam =
4808 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
4809
4810 atomic_set(&pinstance->ccn.ignore, 0);
4811 atomic_set(&pinstance->ldn.ignore, 0);
4812 }
4813
4814 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
4815}
4816
4817
4818
4819
4820
4821
4822
4823
4824static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
4825{
4826 if (pinstance->cfg_table != NULL &&
4827 pinstance->cfg_table_bus_addr != 0) {
4828 dma_free_coherent(&pinstance->pdev->dev,
4829 sizeof(struct pmcraid_config_table),
4830 pinstance->cfg_table,
4831 pinstance->cfg_table_bus_addr);
4832 pinstance->cfg_table = NULL;
4833 pinstance->cfg_table_bus_addr = 0;
4834 }
4835
4836 if (pinstance->res_entries != NULL) {
4837 int i;
4838
4839 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4840 list_del(&pinstance->res_entries[i].queue);
4841 kfree(pinstance->res_entries);
4842 pinstance->res_entries = NULL;
4843 }
4844
4845 pmcraid_release_hcams(pinstance);
4846}
4847
4848
4849
4850
4851
4852
4853
4854
4855static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
4856{
4857 int i;
4858
4859 pinstance->res_entries =
4860 kcalloc(PMCRAID_MAX_RESOURCES,
4861 sizeof(struct pmcraid_resource_entry),
4862 GFP_KERNEL);
4863
4864 if (NULL == pinstance->res_entries) {
4865 pmcraid_err("failed to allocate memory for resource table\n");
4866 return -ENOMEM;
4867 }
4868
4869 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4870 list_add_tail(&pinstance->res_entries[i].queue,
4871 &pinstance->free_res_q);
4872
4873 pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev,
4874 sizeof(struct pmcraid_config_table),
4875 &pinstance->cfg_table_bus_addr,
4876 GFP_KERNEL);
4877
4878 if (NULL == pinstance->cfg_table) {
4879 pmcraid_err("couldn't alloc DMA memory for config table\n");
4880 pmcraid_release_config_buffers(pinstance);
4881 return -ENOMEM;
4882 }
4883
4884 if (pmcraid_allocate_hcams(pinstance)) {
4885 pmcraid_err("could not alloc DMA memory for HCAMS\n");
4886 pmcraid_release_config_buffers(pinstance);
4887 return -ENOMEM;
4888 }
4889
4890 return 0;
4891}
4892
4893
4894
4895
4896
4897
4898
4899
4900
4901static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
4902{
4903 int i;
4904 for (i = 0; i < pinstance->num_hrrq; i++)
4905 tasklet_init(&pinstance->isr_tasklet[i],
4906 pmcraid_tasklet_function,
4907 (unsigned long)&pinstance->hrrq_vector[i]);
4908}
4909
4910
4911
4912
4913
4914
4915
4916
4917
4918static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
4919{
4920 int i;
4921 for (i = 0; i < pinstance->num_hrrq; i++)
4922 tasklet_kill(&pinstance->isr_tasklet[i]);
4923}
4924
4925
4926
4927
4928
4929
4930
4931
4932
4933static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
4934{
4935 pmcraid_release_config_buffers(pinstance);
4936 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
4937 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4938 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4939
4940 if (pinstance->inq_data != NULL) {
4941 dma_free_coherent(&pinstance->pdev->dev,
4942 sizeof(struct pmcraid_inquiry_data),
4943 pinstance->inq_data,
4944 pinstance->inq_data_baddr);
4945
4946 pinstance->inq_data = NULL;
4947 pinstance->inq_data_baddr = 0;
4948 }
4949
4950 if (pinstance->timestamp_data != NULL) {
4951 dma_free_coherent(&pinstance->pdev->dev,
4952 sizeof(struct pmcraid_timestamp_data),
4953 pinstance->timestamp_data,
4954 pinstance->timestamp_data_baddr);
4955
4956 pinstance->timestamp_data = NULL;
4957 pinstance->timestamp_data_baddr = 0;
4958 }
4959}
4960
4961
4962
4963
4964
4965
4966
4967
4968
4969
4970
4971
4972
4973
4974static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
4975{
4976 int i;
4977
4978 if (pmcraid_allocate_host_rrqs(pinstance)) {
4979 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
4980 pinstance->num_hrrq);
4981 return -ENOMEM;
4982 }
4983
4984 if (pmcraid_allocate_config_buffers(pinstance)) {
4985 pmcraid_err("couldn't allocate memory for config buffers\n");
4986 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4987 return -ENOMEM;
4988 }
4989
4990 if (pmcraid_allocate_cmd_blocks(pinstance)) {
4991 pmcraid_err("couldn't allocate memory for cmd blocks\n");
4992 pmcraid_release_config_buffers(pinstance);
4993 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4994 return -ENOMEM;
4995 }
4996
4997 if (pmcraid_allocate_control_blocks(pinstance)) {
4998 pmcraid_err("couldn't allocate memory control blocks\n");
4999 pmcraid_release_config_buffers(pinstance);
5000 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5001 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5002 return -ENOMEM;
5003 }
5004
5005
5006 pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev,
5007 sizeof(struct pmcraid_inquiry_data),
5008 &pinstance->inq_data_baddr, GFP_KERNEL);
5009 if (pinstance->inq_data == NULL) {
5010 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
5011 pmcraid_release_buffers(pinstance);
5012 return -ENOMEM;
5013 }
5014
5015
5016 pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev,
5017 sizeof(struct pmcraid_timestamp_data),
5018 &pinstance->timestamp_data_baddr,
5019 GFP_KERNEL);
5020 if (pinstance->timestamp_data == NULL) {
5021 pmcraid_err("couldn't allocate DMA memory for \
5022 set time_stamp \n");
5023 pmcraid_release_buffers(pinstance);
5024 return -ENOMEM;
5025 }
5026
5027
5028
5029
5030
5031
5032 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5033 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5034 pmcraid_init_cmdblk(cmdp, i);
5035 cmdp->drv_inst = pinstance;
5036 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5037 }
5038
5039 return 0;
5040}
5041
5042
5043
5044
5045
5046
5047
5048static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5049{
5050 int i;
5051 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5052
5053 for (i = 0; i < pinstance->num_hrrq; i++) {
5054 memset(pinstance->hrrq_start[i], 0, buffer_size);
5055 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5056 pinstance->hrrq_end[i] =
5057 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5058 pinstance->host_toggle_bit[i] = 1;
5059 }
5060}
5061
5062
5063
5064
5065
5066
5067
5068
5069
5070
5071static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
5072 void __iomem *mapped_pci_addr)
5073{
5074 struct pmcraid_instance *pinstance =
5075 (struct pmcraid_instance *)host->hostdata;
5076
5077 pinstance->host = host;
5078 pinstance->pdev = pdev;
5079
5080
5081 pinstance->mapped_dma_addr = mapped_pci_addr;
5082
5083
5084 {
5085 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5086 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5087
5088 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5089
5090 pint_regs->ioa_host_interrupt_reg =
5091 mapped_pci_addr + chip_cfg->ioa_host_intr;
5092 pint_regs->ioa_host_interrupt_clr_reg =
5093 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
5094 pint_regs->ioa_host_msix_interrupt_reg =
5095 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
5096 pint_regs->host_ioa_interrupt_reg =
5097 mapped_pci_addr + chip_cfg->host_ioa_intr;
5098 pint_regs->host_ioa_interrupt_clr_reg =
5099 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5100
5101
5102
5103
5104 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5105 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5106 pint_regs->ioa_host_interrupt_mask_reg =
5107 mapped_pci_addr + chip_cfg->ioa_host_mask;
5108 pint_regs->ioa_host_interrupt_mask_clr_reg =
5109 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5110 pint_regs->global_interrupt_mask_reg =
5111 mapped_pci_addr + chip_cfg->global_intr_mask;
5112 };
5113
5114 pinstance->ioa_reset_attempts = 0;
5115 init_waitqueue_head(&pinstance->reset_wait_q);
5116
5117 atomic_set(&pinstance->outstanding_cmds, 0);
5118 atomic_set(&pinstance->last_message_id, 0);
5119 atomic_set(&pinstance->expose_resources, 0);
5120
5121 INIT_LIST_HEAD(&pinstance->free_res_q);
5122 INIT_LIST_HEAD(&pinstance->used_res_q);
5123 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5124 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5125
5126 spin_lock_init(&pinstance->free_pool_lock);
5127 spin_lock_init(&pinstance->pending_pool_lock);
5128 spin_lock_init(&pinstance->resource_lock);
5129 mutex_init(&pinstance->aen_queue_lock);
5130
5131
5132 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5133
5134
5135 pinstance->current_log_level = pmcraid_log_level;
5136
5137
5138 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5139 pinstance->reset_cmd = NULL;
5140 return 0;
5141}
5142
5143
5144
5145
5146
5147
5148
5149
5150
5151
5152static void pmcraid_shutdown(struct pci_dev *pdev)
5153{
5154 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5155 pmcraid_reset_bringdown(pinstance);
5156}
5157
5158
5159
5160
5161
5162static unsigned short pmcraid_get_minor(void)
5163{
5164 int minor;
5165
5166 minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
5167 __set_bit(minor, pmcraid_minor);
5168 return minor;
5169}
5170
5171
5172
5173
5174static void pmcraid_release_minor(unsigned short minor)
5175{
5176 __clear_bit(minor, pmcraid_minor);
5177}
5178
5179
5180
5181
5182
5183
5184
5185
5186
5187static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5188{
5189 int minor;
5190 int error;
5191
5192 minor = pmcraid_get_minor();
5193 cdev_init(&pinstance->cdev, &pmcraid_fops);
5194 pinstance->cdev.owner = THIS_MODULE;
5195
5196 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5197
5198 if (error)
5199 pmcraid_release_minor(minor);
5200 else
5201 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
5202 NULL, "%s%u", PMCRAID_DEVFILE, minor);
5203 return error;
5204}
5205
5206
5207
5208
5209
5210
5211
5212
5213
5214static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5215{
5216 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5217 device_destroy(pmcraid_class,
5218 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5219 cdev_del(&pinstance->cdev);
5220}
5221
5222
5223
5224
5225
5226
5227
5228
5229static void pmcraid_remove(struct pci_dev *pdev)
5230{
5231 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5232
5233
5234 pmcraid_release_chrdev(pinstance);
5235
5236
5237 scsi_remove_host(pinstance->host);
5238
5239
5240 scsi_block_requests(pinstance->host);
5241
5242
5243 pmcraid_shutdown(pdev);
5244
5245 pmcraid_disable_interrupts(pinstance, ~0);
5246 flush_work(&pinstance->worker_q);
5247
5248 pmcraid_kill_tasklets(pinstance);
5249 pmcraid_unregister_interrupt_handler(pinstance);
5250 pmcraid_release_buffers(pinstance);
5251 iounmap(pinstance->mapped_dma_addr);
5252 pci_release_regions(pdev);
5253 scsi_host_put(pinstance->host);
5254 pci_disable_device(pdev);
5255
5256 return;
5257}
5258
5259#ifdef CONFIG_PM
5260
5261
5262
5263
5264
5265
5266
5267static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
5268{
5269 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5270
5271 pmcraid_shutdown(pdev);
5272 pmcraid_disable_interrupts(pinstance, ~0);
5273 pmcraid_kill_tasklets(pinstance);
5274 pci_set_drvdata(pinstance->pdev, pinstance);
5275 pmcraid_unregister_interrupt_handler(pinstance);
5276 pci_save_state(pdev);
5277 pci_disable_device(pdev);
5278 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5279
5280 return 0;
5281}
5282
5283
5284
5285
5286
5287
5288
5289static int pmcraid_resume(struct pci_dev *pdev)
5290{
5291 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5292 struct Scsi_Host *host = pinstance->host;
5293 int rc;
5294
5295 pci_set_power_state(pdev, PCI_D0);
5296 pci_enable_wake(pdev, PCI_D0, 0);
5297 pci_restore_state(pdev);
5298
5299 rc = pci_enable_device(pdev);
5300
5301 if (rc) {
5302 dev_err(&pdev->dev, "resume: Enable device failed\n");
5303 return rc;
5304 }
5305
5306 pci_set_master(pdev);
5307
5308 if (sizeof(dma_addr_t) == 4 ||
5309 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5310 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5311
5312 if (rc == 0)
5313 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
5314
5315 if (rc != 0) {
5316 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
5317 goto disable_device;
5318 }
5319
5320 pmcraid_disable_interrupts(pinstance, ~0);
5321 atomic_set(&pinstance->outstanding_cmds, 0);
5322 rc = pmcraid_register_interrupt_handler(pinstance);
5323
5324 if (rc) {
5325 dev_err(&pdev->dev,
5326 "resume: couldn't register interrupt handlers\n");
5327 rc = -ENODEV;
5328 goto release_host;
5329 }
5330
5331 pmcraid_init_tasklets(pinstance);
5332 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5333
5334
5335
5336
5337 pinstance->ioa_hard_reset = 1;
5338
5339
5340
5341
5342 if (pmcraid_reset_bringup(pinstance)) {
5343 dev_err(&pdev->dev, "couldn't initialize IOA\n");
5344 rc = -ENODEV;
5345 goto release_tasklets;
5346 }
5347
5348 return 0;
5349
5350release_tasklets:
5351 pmcraid_disable_interrupts(pinstance, ~0);
5352 pmcraid_kill_tasklets(pinstance);
5353 pmcraid_unregister_interrupt_handler(pinstance);
5354
5355release_host:
5356 scsi_host_put(host);
5357
5358disable_device:
5359 pci_disable_device(pdev);
5360
5361 return rc;
5362}
5363
5364#else
5365
5366#define pmcraid_suspend NULL
5367#define pmcraid_resume NULL
5368
5369#endif
5370
5371
5372
5373
5374
5375
5376static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5377{
5378 struct pmcraid_instance *pinstance = cmd->drv_inst;
5379 unsigned long flags;
5380
5381 spin_lock_irqsave(pinstance->host->host_lock, flags);
5382 pmcraid_ioa_reset(cmd);
5383 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5384 scsi_unblock_requests(pinstance->host);
5385 schedule_work(&pinstance->worker_q);
5386}
5387
5388
5389
5390
5391
5392
5393
5394
5395
5396static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5397{
5398 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5399 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5400
5401 pmcraid_reinit_cmdblk(cmd);
5402
5403 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5404 ioarcb->request_type = REQ_TYPE_IOACMD;
5405 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5406 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5407
5408
5409
5410
5411
5412 if (cmd->drv_inst->reinit_cfg_table) {
5413 cmd->drv_inst->reinit_cfg_table = 0;
5414 cmd->release = 1;
5415 cmd_done = pmcraid_reinit_cfgtable_done;
5416 }
5417
5418
5419
5420
5421
5422 pmcraid_send_cmd(cmd,
5423 cmd_done,
5424 PMCRAID_SET_SUP_DEV_TIMEOUT,
5425 pmcraid_timeout_handler);
5426 return;
5427}
5428
5429
5430
5431
5432
5433
5434
5435
5436
5437static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5438{
5439 struct pmcraid_instance *pinstance = cmd->drv_inst;
5440 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5441 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
5442 struct pmcraid_ioadl_desc *ioadl;
5443 u64 timestamp;
5444
5445 timestamp = ktime_get_real_seconds() * 1000;
5446
5447 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5448 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5449 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5450 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5451 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5452 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5453
5454 pmcraid_reinit_cmdblk(cmd);
5455 ioarcb->request_type = REQ_TYPE_SCSI;
5456 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5457 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5458 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5459 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5460
5461 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5462 offsetof(struct pmcraid_ioarcb,
5463 add_data.u.ioadl[0]));
5464 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5465 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
5466
5467 ioarcb->request_flags0 |= NO_LINK_DESCS;
5468 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5469 ioarcb->data_transfer_length =
5470 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5471 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5472 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5473 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5474 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5475
5476 if (!pinstance->timestamp_error) {
5477 pinstance->timestamp_error = 0;
5478 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5479 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5480 } else {
5481 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5482 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5483 return;
5484 }
5485}
5486
5487
5488
5489
5490
5491
5492
5493
5494
5495
5496
5497
5498
5499
5500static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5501{
5502 struct pmcraid_instance *pinstance = cmd->drv_inst;
5503 struct pmcraid_resource_entry *res, *temp;
5504 struct pmcraid_config_table_entry *cfgte;
5505 unsigned long lock_flags;
5506 int found, rc, i;
5507 u16 fw_version;
5508 LIST_HEAD(old_res);
5509
5510 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
5511 pmcraid_err("IOA requires microcode download\n");
5512
5513 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5514
5515
5516
5517
5518
5519 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5520
5521 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5522 list_move_tail(&res->queue, &old_res);
5523
5524 for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
5525 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5526 PMCRAID_FW_VERSION_1)
5527 cfgte = &pinstance->cfg_table->entries[i];
5528 else
5529 cfgte = (struct pmcraid_config_table_entry *)
5530 &pinstance->cfg_table->entries_ext[i];
5531
5532 if (!pmcraid_expose_resource(fw_version, cfgte))
5533 continue;
5534
5535 found = 0;
5536
5537
5538 list_for_each_entry_safe(res, temp, &old_res, queue) {
5539
5540 rc = memcmp(&res->cfg_entry.resource_address,
5541 &cfgte->resource_address,
5542 sizeof(cfgte->resource_address));
5543 if (!rc) {
5544 list_move_tail(&res->queue,
5545 &pinstance->used_res_q);
5546 found = 1;
5547 break;
5548 }
5549 }
5550
5551
5552 if (!found) {
5553
5554 if (list_empty(&pinstance->free_res_q)) {
5555 pmcraid_err("Too many devices attached\n");
5556 break;
5557 }
5558
5559 found = 1;
5560 res = list_entry(pinstance->free_res_q.next,
5561 struct pmcraid_resource_entry, queue);
5562
5563 res->scsi_dev = NULL;
5564 res->change_detected = RES_CHANGE_ADD;
5565 res->reset_progress = 0;
5566 list_move_tail(&res->queue, &pinstance->used_res_q);
5567 }
5568
5569
5570
5571
5572 if (found) {
5573 memcpy(&res->cfg_entry, cfgte,
5574 pinstance->config_table_entry_size);
5575 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5576 res->cfg_entry.resource_type,
5577 (fw_version <= PMCRAID_FW_VERSION_1 ?
5578 res->cfg_entry.unique_flags1 :
5579 le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
5580 le32_to_cpu(res->cfg_entry.resource_address));
5581 }
5582 }
5583
5584
5585 list_for_each_entry_safe(res, temp, &old_res, queue) {
5586
5587 if (res->scsi_dev) {
5588 res->change_detected = RES_CHANGE_DEL;
5589 res->cfg_entry.resource_handle =
5590 PMCRAID_INVALID_RES_HANDLE;
5591 list_move_tail(&res->queue, &pinstance->used_res_q);
5592 } else {
5593 list_move_tail(&res->queue, &pinstance->free_res_q);
5594 }
5595 }
5596
5597
5598 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
5599 pmcraid_set_timestamp(cmd);
5600}
5601
5602
5603
5604
5605
5606
5607
5608
5609
5610
5611
5612static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5613{
5614 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5615 struct pmcraid_ioadl_desc *ioadl;
5616 struct pmcraid_instance *pinstance = cmd->drv_inst;
5617 __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
5618
5619 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5620 PMCRAID_FW_VERSION_1)
5621 pinstance->config_table_entry_size =
5622 sizeof(struct pmcraid_config_table_entry);
5623 else
5624 pinstance->config_table_entry_size =
5625 sizeof(struct pmcraid_config_table_entry_ext);
5626
5627 ioarcb->request_type = REQ_TYPE_IOACMD;
5628 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5629
5630 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5631
5632
5633 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5634
5635
5636
5637
5638 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5639 offsetof(struct pmcraid_ioarcb,
5640 add_data.u.ioadl[0]));
5641 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5642 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
5643
5644 ioarcb->request_flags0 |= NO_LINK_DESCS;
5645 ioarcb->data_transfer_length =
5646 cpu_to_le32(sizeof(struct pmcraid_config_table));
5647
5648 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5649 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5650 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5651 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5652
5653 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5654 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5655}
5656
5657
5658
5659
5660
5661
5662
5663
5664
5665
5666
5667static int pmcraid_probe(struct pci_dev *pdev,
5668 const struct pci_device_id *dev_id)
5669{
5670 struct pmcraid_instance *pinstance;
5671 struct Scsi_Host *host;
5672 void __iomem *mapped_pci_addr;
5673 int rc = PCIBIOS_SUCCESSFUL;
5674
5675 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5676 pmcraid_err
5677 ("maximum number(%d) of supported adapters reached\n",
5678 atomic_read(&pmcraid_adapter_count));
5679 return -ENOMEM;
5680 }
5681
5682 atomic_inc(&pmcraid_adapter_count);
5683 rc = pci_enable_device(pdev);
5684
5685 if (rc) {
5686 dev_err(&pdev->dev, "Cannot enable adapter\n");
5687 atomic_dec(&pmcraid_adapter_count);
5688 return rc;
5689 }
5690
5691 dev_info(&pdev->dev,
5692 "Found new IOA(%x:%x), Total IOA count: %d\n",
5693 pdev->vendor, pdev->device,
5694 atomic_read(&pmcraid_adapter_count));
5695
5696 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5697
5698 if (rc < 0) {
5699 dev_err(&pdev->dev,
5700 "Couldn't register memory range of registers\n");
5701 goto out_disable_device;
5702 }
5703
5704 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5705
5706 if (!mapped_pci_addr) {
5707 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5708 rc = -ENOMEM;
5709 goto out_release_regions;
5710 }
5711
5712 pci_set_master(pdev);
5713
5714
5715
5716
5717
5718
5719
5720
5721 if (sizeof(dma_addr_t) == 4 ||
5722 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5723 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5724
5725
5726
5727
5728 if (rc == 0)
5729 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
5730
5731 if (rc != 0) {
5732 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5733 goto cleanup_nomem;
5734 }
5735
5736 host = scsi_host_alloc(&pmcraid_host_template,
5737 sizeof(struct pmcraid_instance));
5738
5739 if (!host) {
5740 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5741 rc = -ENOMEM;
5742 goto cleanup_nomem;
5743 }
5744
5745 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5746 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5747 host->unique_id = host->host_no;
5748 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5749 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5750
5751
5752 pinstance = (struct pmcraid_instance *)host->hostdata;
5753 memset(pinstance, 0, sizeof(*pinstance));
5754
5755 pinstance->chip_cfg =
5756 (struct pmcraid_chip_details *)(dev_id->driver_data);
5757
5758 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5759
5760 if (rc < 0) {
5761 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5762 goto out_scsi_host_put;
5763 }
5764
5765 pci_set_drvdata(pdev, pinstance);
5766
5767
5768 rc = pci_save_state(pinstance->pdev);
5769
5770 if (rc != 0) {
5771 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5772 goto out_scsi_host_put;
5773 }
5774
5775 pmcraid_disable_interrupts(pinstance, ~0);
5776
5777 rc = pmcraid_register_interrupt_handler(pinstance);
5778
5779 if (rc) {
5780 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
5781 goto out_scsi_host_put;
5782 }
5783
5784 pmcraid_init_tasklets(pinstance);
5785
5786
5787 rc = pmcraid_init_buffers(pinstance);
5788
5789 if (rc) {
5790 pmcraid_err("couldn't allocate memory blocks\n");
5791 goto out_unregister_isr;
5792 }
5793
5794
5795 pmcraid_reset_type(pinstance);
5796
5797 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5798
5799
5800
5801
5802 pmcraid_info("starting IOA initialization sequence\n");
5803 if (pmcraid_reset_bringup(pinstance)) {
5804 dev_err(&pdev->dev, "couldn't initialize IOA\n");
5805 rc = 1;
5806 goto out_release_bufs;
5807 }
5808
5809
5810 rc = scsi_add_host(pinstance->host, &pdev->dev);
5811 if (rc != 0) {
5812 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
5813 goto out_release_bufs;
5814 }
5815
5816 scsi_scan_host(pinstance->host);
5817
5818 rc = pmcraid_setup_chrdev(pinstance);
5819
5820 if (rc != 0) {
5821 pmcraid_err("couldn't create mgmt interface, error: %x\n",
5822 rc);
5823 goto out_remove_host;
5824 }
5825
5826
5827
5828
5829 atomic_set(&pinstance->expose_resources, 1);
5830 schedule_work(&pinstance->worker_q);
5831 return rc;
5832
5833out_remove_host:
5834 scsi_remove_host(host);
5835
5836out_release_bufs:
5837 pmcraid_release_buffers(pinstance);
5838
5839out_unregister_isr:
5840 pmcraid_kill_tasklets(pinstance);
5841 pmcraid_unregister_interrupt_handler(pinstance);
5842
5843out_scsi_host_put:
5844 scsi_host_put(host);
5845
5846cleanup_nomem:
5847 iounmap(mapped_pci_addr);
5848
5849out_release_regions:
5850 pci_release_regions(pdev);
5851
5852out_disable_device:
5853 atomic_dec(&pmcraid_adapter_count);
5854 pci_disable_device(pdev);
5855 return -ENODEV;
5856}
5857
5858
5859
5860
5861static struct pci_driver pmcraid_driver = {
5862 .name = PMCRAID_DRIVER_NAME,
5863 .id_table = pmcraid_pci_table,
5864 .probe = pmcraid_probe,
5865 .remove = pmcraid_remove,
5866 .suspend = pmcraid_suspend,
5867 .resume = pmcraid_resume,
5868 .shutdown = pmcraid_shutdown
5869};
5870
5871
5872
5873
5874static int __init pmcraid_init(void)
5875{
5876 dev_t dev;
5877 int error;
5878
5879 pmcraid_info("%s Device Driver version: %s\n",
5880 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
5881
5882 error = alloc_chrdev_region(&dev, 0,
5883 PMCRAID_MAX_ADAPTERS,
5884 PMCRAID_DEVFILE);
5885
5886 if (error) {
5887 pmcraid_err("failed to get a major number for adapters\n");
5888 goto out_init;
5889 }
5890
5891 pmcraid_major = MAJOR(dev);
5892 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
5893
5894 if (IS_ERR(pmcraid_class)) {
5895 error = PTR_ERR(pmcraid_class);
5896 pmcraid_err("failed to register with sysfs, error = %x\n",
5897 error);
5898 goto out_unreg_chrdev;
5899 }
5900
5901 error = pmcraid_netlink_init();
5902
5903 if (error) {
5904 class_destroy(pmcraid_class);
5905 goto out_unreg_chrdev;
5906 }
5907
5908 error = pci_register_driver(&pmcraid_driver);
5909
5910 if (error == 0)
5911 goto out_init;
5912
5913 pmcraid_err("failed to register pmcraid driver, error = %x\n",
5914 error);
5915 class_destroy(pmcraid_class);
5916 pmcraid_netlink_release();
5917
5918out_unreg_chrdev:
5919 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
5920
5921out_init:
5922 return error;
5923}
5924
5925
5926
5927
5928static void __exit pmcraid_exit(void)
5929{
5930 pmcraid_netlink_release();
5931 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
5932 PMCRAID_MAX_ADAPTERS);
5933 pci_unregister_driver(&pmcraid_driver);
5934 class_destroy(pmcraid_class);
5935}
5936
5937module_init(pmcraid_init);
5938module_exit(pmcraid_exit);
5939