linux/drivers/staging/rtl8188eu/hal/usb_halinit.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/******************************************************************************
   3 *
   4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5 *
   6 ******************************************************************************/
   7#define _HCI_HAL_INIT_C_
   8
   9#include <osdep_service.h>
  10#include <drv_types.h>
  11#include <rtw_efuse.h>
  12#include <fw.h>
  13#include <rtl8188e_hal.h>
  14#include <phy.h>
  15
  16#define         HAL_BB_ENABLE           1
  17
  18static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
  19{
  20        struct hal_data_8188e *haldata = adapt->HalData;
  21
  22        switch (NumOutPipe) {
  23        case    3:
  24                haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
  25                haldata->OutEpNumber = 3;
  26                break;
  27        case    2:
  28                haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
  29                haldata->OutEpNumber = 2;
  30                break;
  31        case    1:
  32                haldata->OutEpQueueSel = TX_SELE_HQ;
  33                haldata->OutEpNumber = 1;
  34                break;
  35        default:
  36                break;
  37        }
  38        DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
  39}
  40
  41static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
  42{
  43        bool                    result          = false;
  44
  45        _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
  46
  47        /*  Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
  48        if (adapt->HalData->OutEpNumber == 1) {
  49                if (NumInPipe != 1)
  50                        return result;
  51        }
  52
  53        /*  All config other than above support one Bulk IN and one Interrupt IN. */
  54
  55        result = hal_mapping_out_pipe(adapt, NumOutPipe);
  56
  57        return result;
  58}
  59
  60void rtw_hal_chip_configure(struct adapter *adapt)
  61{
  62        struct hal_data_8188e *haldata = adapt->HalData;
  63        struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(adapt);
  64
  65        if (pdvobjpriv->ishighspeed)
  66                haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
  67        else
  68                haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
  69
  70        haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
  71
  72        haldata->UsbTxAggMode           = 1;
  73        haldata->UsbTxAggDescNum        = 0x6;  /*  only 4 bits */
  74
  75        haldata->UsbRxAggMode           = USB_RX_AGG_DMA;/*  USB_RX_AGG_DMA; */
  76        haldata->UsbRxAggBlockCount     = 8; /* unit : 512b */
  77        haldata->UsbRxAggBlockTimeout   = 0x6;
  78        haldata->UsbRxAggPageCount      = 48; /* uint :128 b 0x0A;      10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
  79        haldata->UsbRxAggPageTimeout    = 0x4; /* 6, absolute time = 34ms/(2^6) */
  80
  81        HalUsbSetQueuePipeMapping8188EUsb(adapt,
  82                                pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
  83}
  84
  85u32 rtw_hal_power_on(struct adapter *adapt)
  86{
  87        u16 value16;
  88        /*  HW Power on sequence */
  89        if (adapt->HalData->bMacPwrCtrlOn)
  90                return _SUCCESS;
  91
  92        if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
  93                                      Rtl8188E_NIC_PWR_ON_FLOW)) {
  94                DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
  95                return _FAIL;
  96        }
  97
  98        /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
  99        /*  Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 100        usb_write16(adapt, REG_CR, 0x00);  /* suggseted by zhouzhou, by page, 20111230 */
 101
 102                /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 103        value16 = usb_read16(adapt, REG_CR);
 104        value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 105                                | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 106        /*  for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 107
 108        usb_write16(adapt, REG_CR, value16);
 109        adapt->HalData->bMacPwrCtrlOn = true;
 110
 111        return _SUCCESS;
 112}
 113
 114/*  Shall USB interface init this? */
 115static void _InitInterrupt(struct adapter *Adapter)
 116{
 117        u32 imr, imr_ex;
 118        u8  usb_opt;
 119
 120        /* HISR write one to clear */
 121        usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
 122        /*  HIMR - */
 123        imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
 124        usb_write32(Adapter, REG_HIMR_88E, imr);
 125        Adapter->HalData->IntrMask[0] = imr;
 126
 127        imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
 128        usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
 129        Adapter->HalData->IntrMask[1] = imr_ex;
 130
 131        /*  REG_USB_SPECIAL_OPTION - BIT(4) */
 132        /*  0; Use interrupt endpoint to upload interrupt pkt */
 133        /*  1; Use bulk endpoint to upload interrupt pkt, */
 134        usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 135
 136        if (!adapter_to_dvobj(Adapter)->ishighspeed)
 137                usb_opt = usb_opt & (~INT_BULK_SEL);
 138        else
 139                usb_opt = usb_opt | (INT_BULK_SEL);
 140
 141        usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
 142}
 143
 144static void _InitQueueReservedPage(struct adapter *Adapter)
 145{
 146        struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 147        u32 numHQ       = 0;
 148        u32 numLQ       = 0;
 149        u32 numNQ       = 0;
 150        u32 numPubQ;
 151        u32 value32;
 152        u8 value8;
 153        bool bWiFiConfig = pregistrypriv->wifi_spec;
 154
 155        if (bWiFiConfig) {
 156                if (Adapter->HalData->OutEpQueueSel & TX_SELE_HQ)
 157                        numHQ =  0x29;
 158
 159                if (Adapter->HalData->OutEpQueueSel & TX_SELE_LQ)
 160                        numLQ = 0x1C;
 161
 162                /*  NOTE: This step shall be proceed before writing REG_RQPN. */
 163                if (Adapter->HalData->OutEpQueueSel & TX_SELE_NQ)
 164                        numNQ = 0x1C;
 165                value8 = (u8)_NPQ(numNQ);
 166                usb_write8(Adapter, REG_RQPN_NPQ, value8);
 167
 168                numPubQ = 0xA8 - numHQ - numLQ - numNQ;
 169
 170                /*  TX DMA */
 171                value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 172                usb_write32(Adapter, REG_RQPN, value32);
 173        } else {
 174                usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
 175                usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
 176                usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
 177        }
 178}
 179
 180static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
 181{
 182        usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 183        usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 184        usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 185        usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 186        usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
 187}
 188
 189static void _InitPageBoundary(struct adapter *Adapter)
 190{
 191        /*  RX Page Boundary */
 192        /*  */
 193        u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
 194
 195        usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 196}
 197
 198static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
 199                                       u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
 200                                       u16 hiQ)
 201{
 202        u16 value16     = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 203
 204        value16 |= _TXDMA_BEQ_MAP(beQ)  | _TXDMA_BKQ_MAP(bkQ) |
 205                   _TXDMA_VIQ_MAP(viQ)  | _TXDMA_VOQ_MAP(voQ) |
 206                   _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
 207
 208        usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
 209}
 210
 211static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
 212{
 213        u16 value = 0;
 214
 215        switch (Adapter->HalData->OutEpQueueSel) {
 216        case TX_SELE_HQ:
 217                value = QUEUE_HIGH;
 218                break;
 219        case TX_SELE_LQ:
 220                value = QUEUE_LOW;
 221                break;
 222        case TX_SELE_NQ:
 223                value = QUEUE_NORMAL;
 224                break;
 225        default:
 226                break;
 227        }
 228        _InitNormalChipRegPriority(Adapter, value, value, value, value,
 229                                   value, value);
 230}
 231
 232static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
 233{
 234        struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 235        u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 236        u16 valueHi = 0;
 237        u16 valueLow = 0;
 238
 239        switch (Adapter->HalData->OutEpQueueSel) {
 240        case (TX_SELE_HQ | TX_SELE_LQ):
 241                valueHi = QUEUE_HIGH;
 242                valueLow = QUEUE_LOW;
 243                break;
 244        case (TX_SELE_NQ | TX_SELE_LQ):
 245                valueHi = QUEUE_NORMAL;
 246                valueLow = QUEUE_LOW;
 247                break;
 248        case (TX_SELE_HQ | TX_SELE_NQ):
 249                valueHi = QUEUE_HIGH;
 250                valueLow = QUEUE_NORMAL;
 251                break;
 252        default:
 253                break;
 254        }
 255
 256        if (!pregistrypriv->wifi_spec) {
 257                beQ     = valueLow;
 258                bkQ     = valueLow;
 259                viQ     = valueHi;
 260                voQ     = valueHi;
 261                mgtQ    = valueHi;
 262                hiQ     = valueHi;
 263        } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
 264                beQ     = valueLow;
 265                bkQ     = valueHi;
 266                viQ     = valueHi;
 267                voQ     = valueLow;
 268                mgtQ    = valueHi;
 269                hiQ     = valueHi;
 270        }
 271        _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 272}
 273
 274static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
 275{
 276        struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 277        u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 278
 279        if (!pregistrypriv->wifi_spec) {/*  typical setting */
 280                beQ     = QUEUE_LOW;
 281                bkQ     = QUEUE_LOW;
 282                viQ     = QUEUE_NORMAL;
 283                voQ     = QUEUE_HIGH;
 284                mgtQ    = QUEUE_HIGH;
 285                hiQ     = QUEUE_HIGH;
 286        } else {/*  for WMM */
 287                beQ     = QUEUE_LOW;
 288                bkQ     = QUEUE_NORMAL;
 289                viQ     = QUEUE_NORMAL;
 290                voQ     = QUEUE_HIGH;
 291                mgtQ    = QUEUE_HIGH;
 292                hiQ     = QUEUE_HIGH;
 293        }
 294        _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 295}
 296
 297static void _InitQueuePriority(struct adapter *Adapter)
 298{
 299        switch (Adapter->HalData->OutEpNumber) {
 300        case 1:
 301                _InitNormalChipOneOutEpPriority(Adapter);
 302                break;
 303        case 2:
 304                _InitNormalChipTwoOutEpPriority(Adapter);
 305                break;
 306        case 3:
 307                _InitNormalChipThreeOutEpPriority(Adapter);
 308                break;
 309        default:
 310                break;
 311        }
 312}
 313
 314static void _InitNetworkType(struct adapter *Adapter)
 315{
 316        u32 value32;
 317
 318        value32 = usb_read32(Adapter, REG_CR);
 319        /*  TODO: use the other function to set network type */
 320        value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 321
 322        usb_write32(Adapter, REG_CR, value32);
 323}
 324
 325static void _InitTransferPageSize(struct adapter *Adapter)
 326{
 327        /*  Tx page size is always 128. */
 328
 329        u8 value8;
 330
 331        value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 332        usb_write8(Adapter, REG_PBP, value8);
 333}
 334
 335static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
 336{
 337        usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 338}
 339
 340static void _InitWMACSetting(struct adapter *Adapter)
 341{
 342        struct hal_data_8188e *haldata = Adapter->HalData;
 343
 344        haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
 345                                  RCR_CBSSID_DATA | RCR_CBSSID_BCN |
 346                                  RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
 347                                  RCR_APP_MIC | RCR_APP_PHYSTS;
 348
 349        /*  some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
 350        usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
 351
 352        /*  Accept all multicast address */
 353        usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
 354        usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
 355}
 356
 357static void _InitAdaptiveCtrl(struct adapter *Adapter)
 358{
 359        u16 value16;
 360        u32 value32;
 361
 362        /*  Response Rate Set */
 363        value32 = usb_read32(Adapter, REG_RRSR);
 364        value32 &= ~RATE_BITMAP_ALL;
 365        value32 |= RATE_RRSR_CCK_ONLY_1M;
 366        usb_write32(Adapter, REG_RRSR, value32);
 367
 368        /*  CF-END Threshold */
 369
 370        /*  SIFS (used in NAV) */
 371        value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 372        usb_write16(Adapter, REG_SPEC_SIFS, value16);
 373
 374        /*  Retry Limit */
 375        value16 = _LRL(0x30) | _SRL(0x30);
 376        usb_write16(Adapter, REG_RL, value16);
 377}
 378
 379static void _InitEDCA(struct adapter *Adapter)
 380{
 381        /*  Set Spec SIFS (used in NAV) */
 382        usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
 383        usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
 384
 385        /*  Set SIFS for CCK */
 386        usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
 387
 388        /*  Set SIFS for OFDM */
 389        usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
 390
 391        /*  TXOP */
 392        usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 393        usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 394        usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
 395        usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
 396}
 397
 398static void _InitRDGSetting(struct adapter *Adapter)
 399{
 400        usb_write8(Adapter, REG_RD_CTRL, 0xFF);
 401        usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
 402        usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
 403}
 404
 405static void _InitRxSetting(struct adapter *Adapter)
 406{
 407        usb_write32(Adapter, REG_MACID, 0x87654321);
 408        usb_write32(Adapter, 0x0700, 0x87654321);
 409}
 410
 411static void _InitRetryFunction(struct adapter *Adapter)
 412{
 413        u8 value8;
 414
 415        value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
 416        value8 |= EN_AMPDU_RTY_NEW;
 417        usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
 418
 419        /*  Set ACK timeout */
 420        usb_write8(Adapter, REG_ACKTO, 0x40);
 421}
 422
 423/*-----------------------------------------------------------------------------
 424 * Function:    usb_AggSettingTxUpdate()
 425 *
 426 * Overview:    Separate TX/RX parameters update independent for TP detection and
 427 *                      dynamic TX/RX aggreagtion parameters update.
 428 *
 429 * Input:                       struct adapter *
 430 *
 431 * Output/Return:       NONE
 432 *
 433 * Revised History:
 434 *      When            Who             Remark
 435 *      12/10/2010      MHC             Separate to smaller function.
 436 *
 437 *---------------------------------------------------------------------------
 438 */
 439static void usb_AggSettingTxUpdate(struct adapter *Adapter)
 440{
 441        struct hal_data_8188e *haldata = Adapter->HalData;
 442        u32 value32;
 443
 444        if (Adapter->registrypriv.wifi_spec)
 445                haldata->UsbTxAggMode = false;
 446
 447        if (haldata->UsbTxAggMode) {
 448                value32 = usb_read32(Adapter, REG_TDECTRL);
 449                value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
 450                value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
 451
 452                usb_write32(Adapter, REG_TDECTRL, value32);
 453        }
 454}       /*  usb_AggSettingTxUpdate */
 455
 456/*-----------------------------------------------------------------------------
 457 * Function:    usb_AggSettingRxUpdate()
 458 *
 459 * Overview:    Separate TX/RX parameters update independent for TP detection and
 460 *                      dynamic TX/RX aggreagtion parameters update.
 461 *
 462 * Input:                       struct adapter *
 463 *
 464 * Output/Return:       NONE
 465 *
 466 * Revised History:
 467 *      When            Who             Remark
 468 *      12/10/2010      MHC             Separate to smaller function.
 469 *
 470 *---------------------------------------------------------------------------
 471 */
 472static void
 473usb_AggSettingRxUpdate(
 474                struct adapter *Adapter
 475        )
 476{
 477        struct hal_data_8188e *haldata = Adapter->HalData;
 478        u8 valueDMA;
 479        u8 valueUSB;
 480
 481        valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
 482        valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 483
 484        switch (haldata->UsbRxAggMode) {
 485        case USB_RX_AGG_DMA:
 486                valueDMA |= RXDMA_AGG_EN;
 487                valueUSB &= ~USB_AGG_EN;
 488                break;
 489        case USB_RX_AGG_USB:
 490                valueDMA &= ~RXDMA_AGG_EN;
 491                valueUSB |= USB_AGG_EN;
 492                break;
 493        case USB_RX_AGG_MIX:
 494                valueDMA |= RXDMA_AGG_EN;
 495                valueUSB |= USB_AGG_EN;
 496                break;
 497        case USB_RX_AGG_DISABLE:
 498        default:
 499                valueDMA &= ~RXDMA_AGG_EN;
 500                valueUSB &= ~USB_AGG_EN;
 501                break;
 502        }
 503
 504        usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
 505        usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
 506
 507        switch (haldata->UsbRxAggMode) {
 508        case USB_RX_AGG_DMA:
 509                usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 510                usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
 511                break;
 512        case USB_RX_AGG_USB:
 513                usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 514                usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 515                break;
 516        case USB_RX_AGG_MIX:
 517                usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 518                usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
 519                usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 520                usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 521                break;
 522        case USB_RX_AGG_DISABLE:
 523        default:
 524                /*  TODO: */
 525                break;
 526        }
 527
 528        switch (PBP_128) {
 529        case PBP_128:
 530                haldata->HwRxPageSize = 128;
 531                break;
 532        case PBP_64:
 533                haldata->HwRxPageSize = 64;
 534                break;
 535        case PBP_256:
 536                haldata->HwRxPageSize = 256;
 537                break;
 538        case PBP_512:
 539                haldata->HwRxPageSize = 512;
 540                break;
 541        case PBP_1024:
 542                haldata->HwRxPageSize = 1024;
 543                break;
 544        default:
 545                break;
 546        }
 547}       /*  usb_AggSettingRxUpdate */
 548
 549static void InitUsbAggregationSetting(struct adapter *Adapter)
 550{
 551        /*  Tx aggregation setting */
 552        usb_AggSettingTxUpdate(Adapter);
 553
 554        /*  Rx aggregation setting */
 555        usb_AggSettingRxUpdate(Adapter);
 556}
 557
 558static void _InitBeaconParameters(struct adapter *Adapter)
 559{
 560        struct hal_data_8188e *haldata = Adapter->HalData;
 561
 562        usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
 563
 564        /*  TODO: Remove these magic number */
 565        usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
 566        usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*  5ms */
 567        usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /*  2ms */
 568
 569        /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
 570        /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
 571        usb_write16(Adapter, REG_BCNTCFG, 0x660F);
 572
 573        haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
 574        haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
 575        haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
 576        haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
 577        haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
 578}
 579
 580static void _BeaconFunctionEnable(struct adapter *Adapter,
 581                                  bool Enable, bool Linked)
 582{
 583        usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
 584
 585        usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
 586}
 587
 588/*  Set CCK and OFDM Block "ON" */
 589static void _BBTurnOnBlock(struct adapter *Adapter)
 590{
 591        phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 592        phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 593}
 594
 595static void _InitAntenna_Selection(struct adapter *Adapter)
 596{
 597        struct hal_data_8188e *haldata = Adapter->HalData;
 598
 599        if (haldata->AntDivCfg == 0)
 600                return;
 601        DBG_88E("==>  %s ....\n", __func__);
 602
 603        usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23));
 604        phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
 605
 606        if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
 607                haldata->CurAntenna = Antenna_A;
 608        else
 609                haldata->CurAntenna = Antenna_B;
 610        DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
 611}
 612
 613/*-----------------------------------------------------------------------------
 614 * Function:    HwSuspendModeEnable92Cu()
 615 *
 616 * Overview:    HW suspend mode switch.
 617 *
 618 * Input:               NONE
 619 *
 620 * Output:      NONE
 621 *
 622 * Return:      NONE
 623 *
 624 * Revised History:
 625 *      When            Who             Remark
 626 *      08/23/2010      MHC             HW suspend mode switch test..
 627 *---------------------------------------------------------------------------
 628 */
 629enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
 630{
 631        u8 val8;
 632        enum rt_rf_power_state rfpowerstate = rf_off;
 633
 634        if (adapt->pwrctrlpriv.bHWPowerdown) {
 635                val8 = usb_read8(adapt, REG_HSISR);
 636                DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8);
 637                rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
 638        } else { /*  rf on/off */
 639                usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT(3)));
 640                val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
 641                DBG_88E("GPIO_IN=%02x\n", val8);
 642                rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
 643        }
 644        return rfpowerstate;
 645}       /*  HalDetectPwrDownMode */
 646
 647u32 rtl8188eu_hal_init(struct adapter *Adapter)
 648{
 649        u8 value8 = 0;
 650        u16  value16;
 651        u8 txpktbuf_bndy;
 652        u32 status = _SUCCESS;
 653        struct hal_data_8188e *haldata = Adapter->HalData;
 654        struct pwrctrl_priv             *pwrctrlpriv = &Adapter->pwrctrlpriv;
 655        struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 656        unsigned long init_start_time = jiffies;
 657
 658        #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
 659
 660        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
 661
 662        if (Adapter->pwrctrlpriv.bkeepfwalive) {
 663                if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 664                        rtl88eu_phy_iq_calibrate(Adapter, true);
 665                } else {
 666                        rtl88eu_phy_iq_calibrate(Adapter, false);
 667                        haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 668                }
 669
 670                ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 671                rtl88eu_phy_lc_calibrate(Adapter);
 672
 673                goto exit;
 674        }
 675
 676        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
 677        status = rtw_hal_power_on(Adapter);
 678        if (status == _FAIL) {
 679                RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
 680                goto exit;
 681        }
 682
 683        /*  Save target channel */
 684        haldata->CurrentChannel = 6;/* default set to 6 */
 685
 686        if (pwrctrlpriv->reg_rfoff)
 687                pwrctrlpriv->rf_pwrstate = rf_off;
 688
 689        /*  2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
 690        /*  HW GPIO pin. Before PHY_RFConfig8192C. */
 691        /*  2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
 692
 693        if (!pregistrypriv->wifi_spec) {
 694                txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
 695        } else {
 696                /*  for WMM */
 697                txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
 698        }
 699
 700        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
 701        _InitQueueReservedPage(Adapter);
 702        _InitQueuePriority(Adapter);
 703        _InitPageBoundary(Adapter);
 704        _InitTransferPageSize(Adapter);
 705
 706        _InitTxBufferBoundary(Adapter, 0);
 707
 708        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
 709        if (Adapter->registrypriv.mp_mode == 1) {
 710                _InitRxSetting(Adapter);
 711                Adapter->bFWReady = false;
 712        } else {
 713                status = rtl88eu_download_fw(Adapter);
 714
 715                if (status) {
 716                        DBG_88E("%s: Download Firmware failed!!\n", __func__);
 717                        Adapter->bFWReady = false;
 718                        return status;
 719                }
 720                RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
 721                Adapter->bFWReady = true;
 722        }
 723        rtl8188e_InitializeFirmwareVars(Adapter);
 724
 725        rtl88eu_phy_mac_config(Adapter);
 726
 727        rtl88eu_phy_bb_config(Adapter);
 728
 729        rtl88eu_phy_rf_config(Adapter);
 730
 731        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
 732        status = rtl8188e_iol_efuse_patch(Adapter);
 733        if (status == _FAIL) {
 734                DBG_88E("%s  rtl8188e_iol_efuse_patch failed\n", __func__);
 735                goto exit;
 736        }
 737
 738        _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
 739
 740        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
 741        status =  InitLLTTable(Adapter, txpktbuf_bndy);
 742        if (status == _FAIL) {
 743                RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
 744                goto exit;
 745        }
 746
 747        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
 748        /*  Get Rx PHY status in order to report RSSI and others. */
 749        _InitDriverInfoSize(Adapter, DRVINFO_SZ);
 750
 751        _InitInterrupt(Adapter);
 752        hal_init_macaddr(Adapter);/* set mac_address */
 753        _InitNetworkType(Adapter);/* set msr */
 754        _InitWMACSetting(Adapter);
 755        _InitAdaptiveCtrl(Adapter);
 756        _InitEDCA(Adapter);
 757        _InitRetryFunction(Adapter);
 758        InitUsbAggregationSetting(Adapter);
 759        _InitBeaconParameters(Adapter);
 760        /*  Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
 761        /*  Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
 762        /*  Enable MACTXEN/MACRXEN block */
 763        value16 = usb_read16(Adapter, REG_CR);
 764        value16 |= (MACTXEN | MACRXEN);
 765        usb_write8(Adapter, REG_CR, value16);
 766
 767        if (haldata->bRDGEnable)
 768                _InitRDGSetting(Adapter);
 769
 770        /* Enable TX Report */
 771        /* Enable Tx Report Timer */
 772        value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 773        usb_write8(Adapter,  REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
 774        /* Set MAX RPT MACID */
 775        usb_write8(Adapter,  REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
 776        /* Tx RPT Timer. Unit: 32us */
 777        usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
 778
 779        usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
 780
 781        usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 782        usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 783
 784        /* Keep RfRegChnlVal for later use. */
 785        haldata->RfRegChnlVal[0] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
 786        haldata->RfRegChnlVal[1] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
 787
 788        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
 789        _BBTurnOnBlock(Adapter);
 790
 791        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 792        invalidate_cam_all(Adapter);
 793
 794        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
 795        /*  2010/12/17 MH We need to set TX power according to EFUSE content at first. */
 796        phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
 797
 798/*  Move by Neo for USB SS to below setp */
 799/* _RfPowerSave(Adapter); */
 800
 801        _InitAntenna_Selection(Adapter);
 802
 803        /*  */
 804        /*  Disable BAR, suggested by Scott */
 805        /*  2010.04.09 add by hpfan */
 806        /*  */
 807        usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
 808
 809        /*  HW SEQ CTRL */
 810        /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
 811        usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
 812
 813        if (pregistrypriv->wifi_spec)
 814                usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
 815
 816        /* Nav limit , suggest by scott */
 817        usb_write8(Adapter, 0x652, 0x0);
 818
 819        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
 820        rtl8188e_InitHalDm(Adapter);
 821
 822        /*  2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
 823        /*  and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
 824        /*  call initstruct adapter. May cause some problem?? */
 825        /*  Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
 826        /*  in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
 827        /*  is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
 828        /*  Added by tynli. 2010.03.30. */
 829        pwrctrlpriv->rf_pwrstate = rf_on;
 830
 831        /*  enable Tx report. */
 832        usb_write8(Adapter,  REG_FWHW_TXQ_CTRL+1, 0x0F);
 833
 834        /*  Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
 835        usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
 836
 837        /* tynli_test_tx_report. */
 838        usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
 839
 840        /* enable tx DMA to drop the redundate data of packet */
 841        usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
 842
 843        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
 844        /*  2010/08/26 MH Merge from 8192CE. */
 845        if (pwrctrlpriv->rf_pwrstate == rf_on) {
 846                if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 847                        rtl88eu_phy_iq_calibrate(Adapter, true);
 848                } else {
 849                        rtl88eu_phy_iq_calibrate(Adapter, false);
 850                        haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 851                }
 852
 853                HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
 854
 855                ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 856
 857                HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
 858                rtl88eu_phy_lc_calibrate(Adapter);
 859        }
 860
 861/* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
 862/*      _InitPABias(Adapter); */
 863        usb_write8(Adapter, REG_USB_HRPWM, 0);
 864
 865        /* ack for xmit mgmt frames. */
 866        usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
 867
 868exit:
 869        HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
 870
 871        DBG_88E("%s in %dms\n", __func__,
 872                jiffies_to_msecs(jiffies - init_start_time));
 873
 874        return status;
 875}
 876
 877static void CardDisableRTL8188EU(struct adapter *Adapter)
 878{
 879        u8 val8;
 880
 881        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
 882
 883        /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
 884        val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 885        usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT(1)));
 886
 887        /*  stop rx */
 888        usb_write8(Adapter, REG_CR, 0x0);
 889
 890        /*  Run LPS WL RFOFF flow */
 891        rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 892                                 Rtl8188E_NIC_LPS_ENTER_FLOW);
 893
 894        /*  2. 0x1F[7:0] = 0            turn off RF */
 895
 896        val8 = usb_read8(Adapter, REG_MCUFWDL);
 897        if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
 898                /*  Reset MCU 0x2[10]=0. */
 899                val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
 900                val8 &= ~BIT(2);        /*  0x2[10], FEN_CPUEN */
 901                usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
 902        }
 903
 904        /*  reset MCU ready status */
 905        usb_write8(Adapter, REG_MCUFWDL, 0);
 906
 907        /* YJ,add,111212 */
 908        /* Disable 32k */
 909        val8 = usb_read8(Adapter, REG_32K_CTRL);
 910        usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0)));
 911
 912        /*  Card disable power action flow */
 913        rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 914                                 Rtl8188E_NIC_DISABLE_FLOW);
 915
 916        /*  Reset MCU IO Wrapper */
 917        val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 918        usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT(3))));
 919        val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 920        usb_write8(Adapter, REG_RSV_CTRL+1, val8 | BIT(3));
 921
 922        /* YJ,test add, 111207. For Power Consumption. */
 923        val8 = usb_read8(Adapter, GPIO_IN);
 924        usb_write8(Adapter, GPIO_OUT, val8);
 925        usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
 926
 927        val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
 928        usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
 929        val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
 930        usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
 931        usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
 932        Adapter->HalData->bMacPwrCtrlOn = false;
 933        Adapter->bFWReady = false;
 934}
 935
 936static void rtl8192cu_hw_power_down(struct adapter *adapt)
 937{
 938        /*  2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
 939        /*  Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
 940
 941        /*  Enable register area 0x0-0xc. */
 942        usb_write8(adapt, REG_RSV_CTRL, 0x0);
 943        usb_write16(adapt, REG_APS_FSMCO, 0x8812);
 944}
 945
 946u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
 947{
 948        DBG_88E("==> %s\n", __func__);
 949
 950        usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
 951        usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
 952
 953        DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
 954        if (Adapter->pwrctrlpriv.bkeepfwalive) {
 955                if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 956                        rtl8192cu_hw_power_down(Adapter);
 957        } else {
 958                if (Adapter->hw_init_completed) {
 959                        CardDisableRTL8188EU(Adapter);
 960
 961                        if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 962                                rtl8192cu_hw_power_down(Adapter);
 963                }
 964        }
 965        return _SUCCESS;
 966}
 967
 968u32 rtw_hal_inirp_init(struct adapter *Adapter)
 969{
 970        u8 i;
 971        struct recv_buf *precvbuf;
 972        uint    status;
 973        struct recv_priv *precvpriv = &Adapter->recvpriv;
 974
 975        status = _SUCCESS;
 976
 977        RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
 978                 ("===> usb_inirp_init\n"));
 979
 980        /* issue Rx irp to receive data */
 981        precvbuf = precvpriv->precv_buf;
 982        for (i = 0; i < NR_RECVBUFF; i++) {
 983                if (!usb_read_port(Adapter, RECV_BULK_IN_ADDR, precvbuf)) {
 984                        RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
 985                        status = _FAIL;
 986                        goto exit;
 987                }
 988
 989                precvbuf++;
 990        }
 991
 992exit:
 993
 994        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
 995
 996        return status;
 997}
 998
 999/*  */
1000/*  */
1001/*      EEPROM/EFUSE Content Parsing */
1002/*  */
1003/*  */
1004static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1005{
1006        struct hal_data_8188e *haldata = adapt->HalData;
1007
1008        if (!AutoLoadFail) {
1009                /*  VID, PID */
1010                haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1011                haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1012
1013                /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1014                haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1015                haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1016        } else {
1017                haldata->EEPROMVID                      = EEPROM_Default_VID;
1018                haldata->EEPROMPID                      = EEPROM_Default_PID;
1019
1020                /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1021                haldata->EEPROMCustomerID               = EEPROM_Default_CustomerID;
1022                haldata->EEPROMSubCustomerID    = EEPROM_Default_SubCustomerID;
1023        }
1024
1025        DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1026        DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1027}
1028
1029static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1030{
1031        u16 i;
1032        u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1033        struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1034
1035        if (AutoLoadFail) {
1036                for (i = 0; i < 6; i++)
1037                        eeprom->mac_addr[i] = sMacAddr[i];
1038        } else {
1039                /* Read Permanent MAC address */
1040                memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1041        }
1042        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1043                 ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
1044                 eeprom->mac_addr));
1045}
1046
1047static void
1048readAdapterInfo_8188EU(
1049                struct adapter *adapt
1050        )
1051{
1052        struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1053
1054        /* parse the eeprom/efuse content */
1055        Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1056        Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1057        Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1058
1059        Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1060        Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1061        Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1062        rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1063        Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1064        Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1065        Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1066        Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1067        Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1068}
1069
1070static void _ReadPROMContent(
1071        struct adapter *Adapter
1072        )
1073{
1074        struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1075        u8 eeValue;
1076
1077        /* check system boot selection */
1078        eeValue = usb_read8(Adapter, REG_9346CR);
1079        eeprom->EepromOrEfuse           = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1080        eeprom->bautoload_fail_flag     = (eeValue & EEPROM_EN) ? false : true;
1081
1082        DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1083                (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1084
1085        Hal_InitPGData88E(Adapter);
1086        readAdapterInfo_8188EU(Adapter);
1087}
1088
1089void rtw_hal_read_chip_info(struct adapter *Adapter)
1090{
1091        unsigned long start = jiffies;
1092
1093        MSG_88E("====> %s\n", __func__);
1094
1095        _ReadPROMContent(Adapter);
1096
1097        MSG_88E("<==== %s in %d ms\n", __func__,
1098                jiffies_to_msecs(jiffies - start));
1099}
1100
1101#define GPIO_DEBUG_PORT_NUM 0
1102static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1103{
1104}
1105
1106static void ResumeTxBeacon(struct adapter *adapt)
1107{
1108        struct hal_data_8188e *haldata = adapt->HalData;
1109
1110        /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1111        /*  which should be read from register to a global variable. */
1112
1113        usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT(6));
1114        haldata->RegFwHwTxQCtrl |= BIT(6);
1115        usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1116        haldata->RegReg542 |= BIT(0);
1117        usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1118}
1119
1120static void StopTxBeacon(struct adapter *adapt)
1121{
1122        struct hal_data_8188e *haldata = adapt->HalData;
1123
1124        /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1125        /*  which should be read from register to a global variable. */
1126
1127        usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
1128        haldata->RegFwHwTxQCtrl &= (~BIT(6));
1129        usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1130        haldata->RegReg542 &= ~(BIT(0));
1131        usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1132
1133         /* todo: CheckFwRsvdPageContent(Adapter);  2010.06.23. Added by tynli. */
1134}
1135
1136static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1137{
1138        u8 val8;
1139        u8 mode = *((u8 *)val);
1140
1141        /*  disable Port0 TSF update */
1142        usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1143
1144        /*  set net_type */
1145        val8 = usb_read8(Adapter, MSR)&0x0c;
1146        val8 |= mode;
1147        usb_write8(Adapter, MSR, val8);
1148
1149        DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1150
1151        if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1152                StopTxBeacon(Adapter);
1153
1154                usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1155        } else if (mode == _HW_STATE_ADHOC_) {
1156                ResumeTxBeacon(Adapter);
1157                usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1158        } else if (mode == _HW_STATE_AP_) {
1159                ResumeTxBeacon(Adapter);
1160
1161                usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1162
1163                /* Set RCR */
1164                usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1165                /* enable to rx data frame */
1166                usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1167                /* enable to rx ps-poll */
1168                usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1169
1170                /* Beacon Control related register for first time */
1171                usb_write8(Adapter, REG_BCNDMATIM, 0x02); /*  2ms */
1172
1173                usb_write8(Adapter, REG_ATIMWND, 0x0a); /*  10ms */
1174                usb_write16(Adapter, REG_BCNTCFG, 0x00);
1175                usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1176                usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/*  +32767 (~32ms) */
1177
1178                /* reset TSF */
1179                usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1180
1181                /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1182                usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1183
1184                /* enable BCN0 Function for if1 */
1185                /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1186                usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1187
1188                /* dis BCN1 ATIM  WND if if2 is station */
1189                usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1190        }
1191}
1192
1193static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1194{
1195        u8 idx = 0;
1196        u32 reg_macid;
1197
1198        reg_macid = REG_MACID;
1199
1200        for (idx = 0; idx < 6; idx++)
1201                usb_write8(Adapter, (reg_macid+idx), val[idx]);
1202}
1203
1204static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1205{
1206        u8 idx = 0;
1207        u32 reg_bssid;
1208
1209        reg_bssid = REG_BSSID;
1210
1211        for (idx = 0; idx < 6; idx++)
1212                usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1213}
1214
1215static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1216{
1217        u32 bcn_ctrl_reg;
1218
1219        bcn_ctrl_reg = REG_BCN_CTRL;
1220
1221        if (*((u8 *)val))
1222                usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1223        else
1224                usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1225}
1226
1227void rtw_hal_set_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1228{
1229        struct hal_data_8188e *haldata = Adapter->HalData;
1230        struct dm_priv  *pdmpriv = &haldata->dmpriv;
1231        struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1232
1233        switch (variable) {
1234        case HW_VAR_MEDIA_STATUS:
1235                {
1236                        u8 val8;
1237
1238                        val8 = usb_read8(Adapter, MSR)&0x0c;
1239                        val8 |= *((u8 *)val);
1240                        usb_write8(Adapter, MSR, val8);
1241                }
1242                break;
1243        case HW_VAR_MEDIA_STATUS1:
1244                {
1245                        u8 val8;
1246
1247                        val8 = usb_read8(Adapter, MSR) & 0x03;
1248                        val8 |= *((u8 *)val) << 2;
1249                        usb_write8(Adapter, MSR, val8);
1250                }
1251                break;
1252        case HW_VAR_SET_OPMODE:
1253                hw_var_set_opmode(Adapter, variable, val);
1254                break;
1255        case HW_VAR_MAC_ADDR:
1256                hw_var_set_macaddr(Adapter, variable, val);
1257                break;
1258        case HW_VAR_BSSID:
1259                hw_var_set_bssid(Adapter, variable, val);
1260                break;
1261        case HW_VAR_BASIC_RATE:
1262                {
1263                        u16 BrateCfg = 0;
1264                        u8 RateIndex = 0;
1265
1266                        /*  2007.01.16, by Emily */
1267                        /*  Select RRSR (in Legacy-OFDM and CCK) */
1268                        /*  For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1269                        /*  We do not use other rates. */
1270                        hal_set_brate_cfg(val, &BrateCfg);
1271                        DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1272
1273                        /* 2011.03.30 add by Luke Lee */
1274                        /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1275                        /* because CCK 2M has poor TXEVM */
1276                        /* CCK 5.5M & 11M ACK should be enabled for better performance */
1277
1278                        BrateCfg = (BrateCfg | 0xd) & 0x15d;
1279                        haldata->BasicRateSet = BrateCfg;
1280
1281                        BrateCfg |= 0x01; /*  default enable 1M ACK rate */
1282                        /*  Set RRSR rate table. */
1283                        usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1284                        usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1285                        usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1286
1287                        /*  Set RTS initial rate */
1288                        while (BrateCfg > 0x1) {
1289                                BrateCfg >>= 1;
1290                                RateIndex++;
1291                        }
1292                        /*  Ziv - Check */
1293                        usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1294                }
1295                break;
1296        case HW_VAR_TXPAUSE:
1297                usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1298                break;
1299        case HW_VAR_BCN_FUNC:
1300                hw_var_set_bcn_func(Adapter, variable, val);
1301                break;
1302        case HW_VAR_CORRECT_TSF:
1303                {
1304                        u64     tsf;
1305                        struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1306                        struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1307
1308                        tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */
1309
1310                        if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1311                                StopTxBeacon(Adapter);
1312
1313                        /* disable related TSF function */
1314                        usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1315
1316                        usb_write32(Adapter, REG_TSFTR, tsf);
1317                        usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1318
1319                        /* enable related TSF function */
1320                        usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3));
1321
1322                        if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1323                                ResumeTxBeacon(Adapter);
1324                }
1325                break;
1326        case HW_VAR_CHECK_BSSID:
1327                if (*((u8 *)val)) {
1328                        usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1329                } else {
1330                        u32 val32;
1331
1332                        val32 = usb_read32(Adapter, REG_RCR);
1333
1334                        val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1335
1336                        usb_write32(Adapter, REG_RCR, val32);
1337                }
1338                break;
1339        case HW_VAR_MLME_DISCONNECT:
1340                /* Set RCR to not to receive data frame when NO LINK state */
1341                /* reject all data frames */
1342                usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1343
1344                /* reset TSF */
1345                usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
1346
1347                /* disable update TSF */
1348                usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1349                break;
1350        case HW_VAR_MLME_SITESURVEY:
1351                if (*((u8 *)val)) { /* under sitesurvey */
1352                        /* config RCR to receive different BSSID & not to receive data frame */
1353                        u32 v = usb_read32(Adapter, REG_RCR);
1354
1355                        v &= ~(RCR_CBSSID_BCN);
1356                        usb_write32(Adapter, REG_RCR, v);
1357                        /* reject all data frame */
1358                        usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1359
1360                        /* disable update TSF */
1361                        usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1362                } else { /* sitesurvey done */
1363                        struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1364                        struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1365
1366                        if ((is_client_associated_to_ap(Adapter)) ||
1367                            ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1368                                /* enable to rx data frame */
1369                                usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1370
1371                                /* enable update TSF */
1372                                usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1373                        } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1374                                usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1375                                /* enable update TSF */
1376                                usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1377                        }
1378
1379                        usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1380                }
1381                break;
1382        case HW_VAR_MLME_JOIN:
1383                {
1384                        u8 RetryLimit = 0x30;
1385                        u8 type = *((u8 *)val);
1386                        struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
1387
1388                        if (type == 0) { /*  prepare to join */
1389                                /* enable to rx data frame.Accept all data frame */
1390                                usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1391
1392                                usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1393
1394                                if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1395                                        RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1396                                else /*  Ad-hoc Mode */
1397                                        RetryLimit = 0x7;
1398                        } else if (type == 1) {
1399                                /* joinbss_event call back when join res < 0 */
1400                                usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1401                        } else if (type == 2) {
1402                                /* sta add event call back */
1403                                /* enable update TSF */
1404                                usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1405
1406                                if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1407                                        RetryLimit = 0x7;
1408                        }
1409                        usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1410                }
1411                break;
1412        case HW_VAR_BEACON_INTERVAL:
1413                usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1414                break;
1415        case HW_VAR_SLOT_TIME:
1416                {
1417                        u8 u1bAIFS, aSifsTime;
1418                        struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1419                        struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1420
1421                        usb_write8(Adapter, REG_SLOT, val[0]);
1422
1423                        if (pmlmeinfo->WMM_enable == 0) {
1424                                if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1425                                        aSifsTime = 10;
1426                                else
1427                                        aSifsTime = 16;
1428
1429                                u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1430
1431                                /*  <Roger_EXP> Temporary removed, 2008.06.20. */
1432                                usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1433                                usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1434                                usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1435                                usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1436                        }
1437                }
1438                break;
1439        case HW_VAR_RESP_SIFS:
1440                /* RESP_SIFS for CCK */
1441                usb_write8(Adapter, REG_R2T_SIFS, val[0]); /*  SIFS_T2T_CCK (0x08) */
1442                usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
1443                /* RESP_SIFS for OFDM */
1444                usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1445                usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1446                break;
1447        case HW_VAR_ACK_PREAMBLE:
1448                {
1449                        u8 regTmp;
1450                        u8 bShortPreamble = *((bool *)val);
1451                        /*  Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1452                        regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1453                        if (bShortPreamble)
1454                                regTmp |= 0x80;
1455
1456                        usb_write8(Adapter, REG_RRSR+2, regTmp);
1457                }
1458                break;
1459        case HW_VAR_SEC_CFG:
1460                usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1461                break;
1462        case HW_VAR_DM_FUNC_OP:
1463                if (val[0])
1464                        podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1465                else
1466                        podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1467                break;
1468        case HW_VAR_DM_FUNC_SET:
1469                if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1470                        pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1471                        podmpriv->SupportAbility =      pdmpriv->InitODMFlag;
1472                } else {
1473                        podmpriv->SupportAbility |= *((u32 *)val);
1474                }
1475                break;
1476        case HW_VAR_DM_FUNC_CLR:
1477                podmpriv->SupportAbility &= *((u32 *)val);
1478                break;
1479        case HW_VAR_CAM_EMPTY_ENTRY:
1480                {
1481                        u8 ucIndex = *((u8 *)val);
1482                        u8 i;
1483                        u32 ulCommand = 0;
1484                        u32 ulContent = 0;
1485                        u32 ulEncAlgo = CAM_AES;
1486
1487                        for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1488                                /*  filled id in CAM config 2 byte */
1489                                if (i == 0)
1490                                        ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1491                                else
1492                                        ulContent = 0;
1493                                /*  polling bit, and No Write enable, and address */
1494                                ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1495                                ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1496                                /*  write content 0 is equall to mark invalid */
1497                                usb_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
1498                                usb_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
1499                        }
1500                }
1501                break;
1502        case HW_VAR_CAM_INVALID_ALL:
1503                usb_write32(Adapter, RWCAM, BIT(31) | BIT(30));
1504                break;
1505        case HW_VAR_CAM_WRITE:
1506                {
1507                        u32 cmd;
1508                        u32 *cam_val = (u32 *)val;
1509
1510                        usb_write32(Adapter, WCAMI, cam_val[0]);
1511
1512                        cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1513                        usb_write32(Adapter, RWCAM, cmd);
1514                }
1515                break;
1516        case HW_VAR_AC_PARAM_VO:
1517                usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1518                break;
1519        case HW_VAR_AC_PARAM_VI:
1520                usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1521                break;
1522        case HW_VAR_AC_PARAM_BE:
1523                haldata->AcParam_BE = ((u32 *)(val))[0];
1524                usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1525                break;
1526        case HW_VAR_AC_PARAM_BK:
1527                usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1528                break;
1529        case HW_VAR_ACM_CTRL:
1530                {
1531                        u8 acm_ctrl = *((u8 *)val);
1532                        u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1533
1534                        if (acm_ctrl > 1)
1535                                AcmCtrl = AcmCtrl | 0x1;
1536
1537                        if (acm_ctrl & BIT(3))
1538                                AcmCtrl |= AcmHw_VoqEn;
1539                        else
1540                                AcmCtrl &= (~AcmHw_VoqEn);
1541
1542                        if (acm_ctrl & BIT(2))
1543                                AcmCtrl |= AcmHw_ViqEn;
1544                        else
1545                                AcmCtrl &= (~AcmHw_ViqEn);
1546
1547                        if (acm_ctrl & BIT(1))
1548                                AcmCtrl |= AcmHw_BeqEn;
1549                        else
1550                                AcmCtrl &= (~AcmHw_BeqEn);
1551
1552                        DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1553                        usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1554                }
1555                break;
1556        case HW_VAR_AMPDU_MIN_SPACE:
1557                {
1558                        u8 MinSpacingToSet;
1559                        u8 SecMinSpace;
1560
1561                        MinSpacingToSet = *((u8 *)val);
1562                        if (MinSpacingToSet <= 7) {
1563                                switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1564                                case _NO_PRIVACY_:
1565                                case _AES_:
1566                                        SecMinSpace = 0;
1567                                        break;
1568                                case _WEP40_:
1569                                case _WEP104_:
1570                                case _TKIP_:
1571                                case _TKIP_WTMIC_:
1572                                        SecMinSpace = 6;
1573                                        break;
1574                                default:
1575                                        SecMinSpace = 7;
1576                                        break;
1577                                }
1578                                if (MinSpacingToSet < SecMinSpace)
1579                                        MinSpacingToSet = SecMinSpace;
1580                                usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1581                        }
1582                }
1583                break;
1584        case HW_VAR_AMPDU_FACTOR:
1585                {
1586                        u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1587                        u8 FactorToSet;
1588                        u8 *pRegToSet;
1589                        u8 index = 0;
1590
1591                        pRegToSet = RegToSet_Normal; /*  0xb972a841; */
1592                        FactorToSet = *((u8 *)val);
1593                        if (FactorToSet <= 3) {
1594                                FactorToSet = 1 << (FactorToSet + 2);
1595                                if (FactorToSet > 0xf)
1596                                        FactorToSet = 0xf;
1597
1598                                for (index = 0; index < 4; index++) {
1599                                        if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1600                                                pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1601
1602                                        if ((pRegToSet[index] & 0x0f) > FactorToSet)
1603                                                pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1604
1605                                        usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1606                                }
1607                        }
1608                }
1609                break;
1610        case HW_VAR_RXDMA_AGG_PG_TH:
1611                {
1612                        u8 threshold = *((u8 *)val);
1613
1614                        if (threshold == 0)
1615                                threshold = haldata->UsbRxAggPageCount;
1616                        usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1617                }
1618                break;
1619        case HW_VAR_SET_RPWM:
1620                break;
1621        case HW_VAR_H2C_FW_PWRMODE:
1622                {
1623                        u8 psmode = (*(u8 *)val);
1624
1625                        /*  Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1626                        /*  saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1627                        if (psmode != PS_MODE_ACTIVE)
1628                                ODM_RF_Saving(podmpriv, true);
1629                        rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1630                }
1631                break;
1632        case HW_VAR_H2C_FW_JOINBSSRPT:
1633                {
1634                        u8 mstatus = (*(u8 *)val);
1635
1636                        rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1637                }
1638                break;
1639        case HW_VAR_INITIAL_GAIN:
1640                {
1641                        struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1642                        u32 rx_gain = ((u32 *)(val))[0];
1643
1644                        if (rx_gain == 0xff) {/* restore rx gain */
1645                                ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1646                        } else {
1647                                pDigTable->BackupIGValue = pDigTable->CurIGValue;
1648                                ODM_Write_DIG(podmpriv, rx_gain);
1649                        }
1650                }
1651                break;
1652        case HW_VAR_TRIGGER_GPIO_0:
1653                rtl8192cu_trigger_gpio_0(Adapter);
1654                break;
1655        case HW_VAR_RPT_TIMER_SETTING:
1656                {
1657                        u16 min_rpt_time = (*(u16 *)val);
1658
1659                        ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1660                }
1661                break;
1662        case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1663                {
1664                        u8 Optimum_antenna = (*(u8 *)val);
1665                        u8 Ant;
1666                        /* switch antenna to Optimum_antenna */
1667                        if (haldata->CurAntenna !=  Optimum_antenna) {
1668                                Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1669                                rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1670
1671                                haldata->CurAntenna = Optimum_antenna;
1672                        }
1673                }
1674                break;
1675        case HW_VAR_EFUSE_BYTES: /*  To set EFUE total used bytes, added by Roger, 2008.12.22. */
1676                haldata->EfuseUsedBytes = *((u16 *)val);
1677                break;
1678        case HW_VAR_FIFO_CLEARN_UP:
1679                {
1680                        struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1681                        u8 trycnt = 100;
1682
1683                        /* pause tx */
1684                        usb_write8(Adapter, REG_TXPAUSE, 0xff);
1685
1686                        /* keep sn */
1687                        Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1688
1689                        if (!pwrpriv->bkeepfwalive) {
1690                                /* RX DMA stop */
1691                                usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1692                                do {
1693                                        if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1694                                                break;
1695                                } while (trycnt--);
1696                                if (trycnt == 0)
1697                                        DBG_88E("Stop RX DMA failed......\n");
1698
1699                                /* RQPN Load 0 */
1700                                usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1701                                usb_write32(Adapter, REG_RQPN, 0x80000000);
1702                                mdelay(10);
1703                        }
1704                }
1705                break;
1706        case HW_VAR_CHECK_TXBUF:
1707                break;
1708        case HW_VAR_APFM_ON_MAC:
1709                haldata->bMacPwrCtrlOn = *val;
1710                DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1711                break;
1712        case HW_VAR_TX_RPT_MAX_MACID:
1713                {
1714                        u8 maxMacid = *val;
1715
1716                        DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1717                        usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1718                }
1719                break;
1720        case HW_VAR_H2C_MEDIA_STATUS_RPT:
1721                rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val));
1722                break;
1723        case HW_VAR_BCN_VALID:
1724                /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1725                usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT(0));
1726                break;
1727        default:
1728                break;
1729        }
1730}
1731
1732void rtw_hal_get_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1733{
1734        switch (variable) {
1735        case HW_VAR_BASIC_RATE:
1736                *((u16 *)(val)) = Adapter->HalData->BasicRateSet;
1737                /* fall through */
1738        case HW_VAR_TXPAUSE:
1739                val[0] = usb_read8(Adapter, REG_TXPAUSE);
1740                break;
1741        case HW_VAR_BCN_VALID:
1742                /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1743                val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1744                break;
1745        case HW_VAR_FWLPS_RF_ON:
1746                {
1747                        /* When we halt NIC, we should check if FW LPS is leave. */
1748                        if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1749                                /*  If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1750                                /*  because Fw is unload. */
1751                                val[0] = true;
1752                        } else {
1753                                u32 valRCR;
1754
1755                                valRCR = usb_read32(Adapter, REG_RCR);
1756                                valRCR &= 0x00070000;
1757                                if (valRCR)
1758                                        val[0] = false;
1759                                else
1760                                        val[0] = true;
1761                        }
1762                }
1763                break;
1764        case HW_VAR_CURRENT_ANTENNA:
1765                val[0] = Adapter->HalData->CurAntenna;
1766                break;
1767        case HW_VAR_EFUSE_BYTES: /*  To get EFUE total used bytes, added by Roger, 2008.12.22. */
1768                *((u16 *)(val)) = Adapter->HalData->EfuseUsedBytes;
1769                break;
1770        case HW_VAR_APFM_ON_MAC:
1771                *val = Adapter->HalData->bMacPwrCtrlOn;
1772                break;
1773        case HW_VAR_CHK_HI_QUEUE_EMPTY:
1774                *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1775                break;
1776        default:
1777                break;
1778        }
1779}
1780
1781/*  */
1782/*      Description: */
1783/*              Query setting of specified variable. */
1784/*  */
1785u8 rtw_hal_get_def_var(
1786                struct adapter *Adapter,
1787                enum hal_def_variable eVariable,
1788                void *pValue
1789        )
1790{
1791        struct hal_data_8188e *haldata = Adapter->HalData;
1792        u8 bResult = _SUCCESS;
1793
1794        switch (eVariable) {
1795        case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1796                {
1797                        struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1798                        struct sta_priv *pstapriv = &Adapter->stapriv;
1799                        struct sta_info *psta;
1800
1801                        psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1802                        if (psta)
1803                                *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1804                }
1805                break;
1806        case HAL_DEF_IS_SUPPORT_ANT_DIV:
1807                *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1808                break;
1809        case HAL_DEF_CURRENT_ANTENNA:
1810                *((u8 *)pValue) = haldata->CurAntenna;
1811                break;
1812        case HAL_DEF_DRVINFO_SZ:
1813                *((u32 *)pValue) = DRVINFO_SZ;
1814                break;
1815        case HAL_DEF_MAX_RECVBUF_SZ:
1816                *((u32 *)pValue) = MAX_RECVBUF_SZ;
1817                break;
1818        case HAL_DEF_RX_PACKET_OFFSET:
1819                *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1820                break;
1821        case HAL_DEF_DBG_DM_FUNC:
1822                *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1823                break;
1824        case HAL_DEF_RA_DECISION_RATE:
1825                {
1826                        u8 MacID = *((u8 *)pValue);
1827
1828                        *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, MacID);
1829                }
1830                break;
1831        case HAL_DEF_RA_SGI:
1832                {
1833                        u8 MacID = *((u8 *)pValue);
1834
1835                        *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&haldata->odmpriv, MacID);
1836                }
1837                break;
1838        case HAL_DEF_PT_PWR_STATUS:
1839                {
1840                        u8 MacID = *((u8 *)pValue);
1841
1842                        *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, MacID);
1843                }
1844                break;
1845        case HW_VAR_MAX_RX_AMPDU_FACTOR:
1846                *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1847                break;
1848        case HW_DEF_RA_INFO_DUMP:
1849                {
1850                        u8 entry_id = *((u8 *)pValue);
1851
1852                        if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1853                                DBG_88E("============ RA status check ===================\n");
1854                                DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1855                                        entry_id,
1856                                        haldata->odmpriv.RAInfo[entry_id].RateID,
1857                                        haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1858                                        haldata->odmpriv.RAInfo[entry_id].RateSGI,
1859                                        haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1860                                        haldata->odmpriv.RAInfo[entry_id].PTStage);
1861                        }
1862                }
1863                break;
1864        case HW_DEF_ODM_DBG_FLAG:
1865                {
1866                        struct odm_dm_struct *dm_ocm = &haldata->odmpriv;
1867
1868                        pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1869                }
1870                break;
1871        case HAL_DEF_DBG_DUMP_RXPKT:
1872                *((u8 *)pValue) = haldata->bDumpRxPkt;
1873                break;
1874        case HAL_DEF_DBG_DUMP_TXPKT:
1875                *((u8 *)pValue) = haldata->bDumpTxPkt;
1876                break;
1877        default:
1878                bResult = _FAIL;
1879                break;
1880        }
1881
1882        return bResult;
1883}
1884
1885void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1886{
1887        u8 init_rate = 0;
1888        u8 networkType, raid;
1889        u32 mask, rate_bitmap;
1890        u8 shortGIrate = false;
1891        int     supportRateNum = 0;
1892        struct sta_info *psta;
1893        struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv;
1894        struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1895        struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1896        struct wlan_bssid_ex    *cur_network = &pmlmeinfo->network;
1897
1898        if (mac_id >= NUM_STA) /* CAM_SIZE */
1899                return;
1900        psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1901        if (psta == NULL)
1902                return;
1903        switch (mac_id) {
1904        case 0:/*  for infra mode */
1905                supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1906                networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
1907                raid = networktype_to_raid(networkType);
1908                mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1909                mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&pmlmeinfo->HT_caps) : 0;
1910                if (support_short_GI(adapt, &pmlmeinfo->HT_caps))
1911                        shortGIrate = true;
1912                break;
1913        case 1:/* for broadcast/multicast */
1914                supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1915                if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1916                        networkType = WIRELESS_11B;
1917                else
1918                        networkType = WIRELESS_11G;
1919                raid = networktype_to_raid(networkType);
1920                mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1921                break;
1922        default: /* for each sta in IBSS */
1923                supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1924                networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
1925                raid = networktype_to_raid(networkType);
1926                mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1927
1928                /* todo: support HT in IBSS */
1929                break;
1930        }
1931
1932        rate_bitmap = ODM_Get_Rate_Bitmap(odmpriv, mac_id, mask, rssi_level);
1933        DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
1934                __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
1935
1936        mask &= rate_bitmap;
1937
1938        init_rate = get_highest_rate_idx(mask)&0x3f;
1939
1940        ODM_RA_UpdateRateInfo_8188E(odmpriv, mac_id, raid, mask, shortGIrate);
1941
1942        /* set ra_id */
1943        psta->raid = raid;
1944        psta->init_rate = init_rate;
1945}
1946
1947void rtw_hal_bcn_related_reg_setting(struct adapter *adapt)
1948{
1949        u32 value32;
1950        struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1951        struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1952        u32 bcn_ctrl_reg                        = REG_BCN_CTRL;
1953        /* reset TSF, enable update TSF, correcting TSF On Beacon */
1954
1955        /* BCN interval */
1956        usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
1957        usb_write8(adapt, REG_ATIMWND, 0x02);/*  2ms */
1958
1959        _InitBeaconParameters(adapt);
1960
1961        usb_write8(adapt, REG_SLOT, 0x09);
1962
1963        value32 = usb_read32(adapt, REG_TCR);
1964        value32 &= ~TSFRST;
1965        usb_write32(adapt,  REG_TCR, value32);
1966
1967        value32 |= TSFRST;
1968        usb_write32(adapt, REG_TCR, value32);
1969
1970        /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
1971        usb_write8(adapt,  REG_RXTSF_OFFSET_CCK, 0x50);
1972        usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
1973
1974        _BeaconFunctionEnable(adapt, true, true);
1975
1976        ResumeTxBeacon(adapt);
1977
1978        usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1));
1979}
1980
1981void rtw_hal_def_value_init(struct adapter *adapt)
1982{
1983        struct hal_data_8188e *haldata = adapt->HalData;
1984        struct pwrctrl_priv *pwrctrlpriv;
1985        u8 i;
1986
1987        pwrctrlpriv = &adapt->pwrctrlpriv;
1988
1989        /* init default value */
1990        if (!pwrctrlpriv->bkeepfwalive)
1991                haldata->LastHMEBoxNum = 0;
1992
1993        /* init dm default value */
1994        haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
1995        haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
1996        haldata->pwrGroupCnt = 0;
1997        haldata->PGMaxGroup = 13;
1998        haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
1999        for (i = 0; i < HP_THERMAL_NUM; i++)
2000                haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2001}
2002