LXR linux/include/linux/cacheinfo.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef _LINUX_CACHEINFO_H
   3#define _LINUX_CACHEINFO_H
   4
   5#include <linux/bitops.h>
   6#include <linux/cpumask.h>
   7#include <linux/smp.h>
   8
   9struct device_node;
  10struct attribute;
  11
  12enum cache_type {
  13        CACHE_TYPE_NOCACHE = 0,
  14        CACHE_TYPE_INST = BIT(0),
  15        CACHE_TYPE_DATA = BIT(1),
  16        CACHE_TYPE_SEPARATE = CACHE_TYPE_INST | CACHE_TYPE_DATA,
  17        CACHE_TYPE_UNIFIED = BIT(2),
  18};
  19
  20/**
  21 * struct cacheinfo - represent a cache leaf node
  22 * @id: This cache's id. It is unique among caches with the same (type, level).
  23 * @type: type of the cache - data, inst or unified
  24 * @level: represents the hierarchy in the multi-level cache
  25 * @coherency_line_size: size of each cache line usually representing
  26 *      the minimum amount of data that gets transferred from memory
  27 * @number_of_sets: total number of sets, a set is a collection of cache
  28 *      lines sharing the same index
  29 * @ways_of_associativity: number of ways in which a particular memory
  30 *      block can be placed in the cache
  31 * @physical_line_partition: number of physical cache lines sharing the
  32 *      same cachetag
  33 * @size: Total size of the cache
  34 * @shared_cpu_map: logical cpumask representing all the cpus sharing
  35 *      this cache node
  36 * @attributes: bitfield representing various cache attributes
  37 * @fw_token: Unique value used to determine if different cacheinfo
  38 *      structures represent a single hardware cache instance.
  39 * @disable_sysfs: indicates whether this node is visible to the user via
  40 *      sysfs or not
  41 * @priv: pointer to any private data structure specific to particular
  42 *      cache design
  43 *
  44 * While @of_node, @disable_sysfs and @priv are used for internal book
  45 * keeping, the remaining members form the core properties of the cache
  46 */
  47struct cacheinfo {
  48        unsigned int id;
  49        enum cache_type type;
  50        unsigned int level;
  51        unsigned int coherency_line_size;
  52        unsigned int number_of_sets;
  53        unsigned int ways_of_associativity;
  54        unsigned int physical_line_partition;
  55        unsigned int size;
  56        cpumask_t shared_cpu_map;
  57        unsigned int attributes;
  58#define CACHE_WRITE_THROUGH     BIT(0)
  59#define CACHE_WRITE_BACK        BIT(1)
  60#define CACHE_WRITE_POLICY_MASK         \
  61        (CACHE_WRITE_THROUGH | CACHE_WRITE_BACK)
  62#define CACHE_READ_ALLOCATE     BIT(2)
  63#define CACHE_WRITE_ALLOCATE    BIT(3)
  64#define CACHE_ALLOCATE_POLICY_MASK      \
  65        (CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE)
  66#define CACHE_ID                BIT(4)
  67        void *fw_token;
  68        bool disable_sysfs;
  69        void *priv;
  70};
  71
  72struct cpu_cacheinfo {
  73        struct cacheinfo *info_list;
  74        unsigned int num_levels;
  75        unsigned int num_leaves;
  76        bool cpu_map_populated;
  77};
  78
  79/*
  80 * Helpers to make sure "func" is executed on the cpu whose cache
  81 * attributes are being detected
  82 */
  83#define DEFINE_SMP_CALL_CACHE_FUNCTION(func)                    \
  84static inline void _##func(void *ret)                           \
  85{                                                               \
  86        int cpu = smp_processor_id();                           \
  87        *(int *)ret = __##func(cpu);                            \
  88}                                                               \
  89                                                                \
  90int func(unsigned int cpu)                                      \
  91{                                                               \
  92        int ret;                                                \
  93        smp_call_function_single(cpu, _##func, &ret, true);     \
  94        return ret;                                             \
  95}
  96
  97struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu);
  98int init_cache_level(unsigned int cpu);
  99int populate_cache_leaves(unsigned int cpu);
 100int cache_setup_acpi(unsigned int cpu);
 101#ifndef CONFIG_ACPI_PPTT
 102/*
 103 * acpi_find_last_cache_level is only called on ACPI enabled
 104 * platforms using the PPTT for topology. This means that if
 105 * the platform supports other firmware configuration methods
 106 * we need to stub out the call when ACPI is disabled.
 107 * ACPI enabled platforms not using PPTT won't be making calls
 108 * to this function so we need not worry about them.
 109 */
 110static inline int acpi_find_last_cache_level(unsigned int cpu)
 111{
 112        return 0;
 113}
 114#else
 115int acpi_find_last_cache_level(unsigned int cpu);
 116#endif
 117
 118const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf);
 119
 120#endif /* _LINUX_CACHEINFO_H */
 121