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10#include <linux/kernel.h>
11#include <linux/ioport.h>
12#include <linux/of.h>
13#include <linux/of_address.h>
14#include <linux/smp.h>
15#include <asm/io.h>
16#include <asm/cputype.h>
17#include "common.h"
18#include "rcar-gen2.h"
19
20
21#define RST 0xe6160000
22
23#define CA15BAR 0x0020
24#define CA7BAR 0x0030
25#define CA15RESCNT 0x0040
26#define CA7RESCNT 0x0044
27
28
29#define SBAR_BAREN BIT(4)
30
31
32#define CA15RESCNT_CODE 0xa5a50000
33#define CA15RESCNT_CPUS 0xf
34#define CA7RESCNT_CODE 0x5a5a0000
35#define CA7RESCNT_CPUS 0xf
36
37
38#define ICRAM1 0xe63c0000
39
40static inline u32 phys_to_sbar(phys_addr_t addr)
41{
42 return (addr >> 8) & 0xfffffc00;
43}
44
45void __init rcar_gen2_pm_init(void)
46{
47 void __iomem *p;
48 u32 bar;
49 static int once;
50 struct device_node *np;
51 bool has_a7 = false;
52 bool has_a15 = false;
53 struct resource res;
54 int error;
55
56 if (once++)
57 return;
58
59 for_each_of_cpu_node(np) {
60 if (of_device_is_compatible(np, "arm,cortex-a15"))
61 has_a15 = true;
62 else if (of_device_is_compatible(np, "arm,cortex-a7"))
63 has_a7 = true;
64 }
65
66 np = of_find_compatible_node(NULL, NULL, "renesas,smp-sram");
67 if (!np) {
68
69 res = (struct resource)DEFINE_RES_MEM(ICRAM1,
70 shmobile_boot_size);
71 goto map;
72 }
73
74 error = of_address_to_resource(np, 0, &res);
75 if (error) {
76 pr_err("Failed to get smp-sram address: %d\n", error);
77 return;
78 }
79
80map:
81
82 if (res.start & (256 * 1024 - 1) ||
83 resource_size(&res) < shmobile_boot_size) {
84 pr_err("Invalid smp-sram region\n");
85 return;
86 }
87
88 p = ioremap(res.start, resource_size(&res));
89 if (!p)
90 return;
91
92
93
94
95 if (resource_size(&res) >= shmobile_boot_size_gen2) {
96 shmobile_boot_cpu_gen2 = read_cpuid_mpidr();
97 memcpy_toio(p, shmobile_boot_vector_gen2,
98 shmobile_boot_size_gen2);
99 } else {
100 memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
101 }
102 iounmap(p);
103
104
105 p = ioremap_nocache(RST, 0x63);
106 bar = phys_to_sbar(res.start);
107 if (has_a15) {
108 writel_relaxed(bar, p + CA15BAR);
109 writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);
110
111
112 writel_relaxed((readl_relaxed(p + CA15RESCNT) &
113 ~CA15RESCNT_CPUS) | CA15RESCNT_CODE,
114 p + CA15RESCNT);
115 }
116 if (has_a7) {
117 writel_relaxed(bar, p + CA7BAR);
118 writel_relaxed(bar | SBAR_BAREN, p + CA7BAR);
119
120
121 writel_relaxed((readl_relaxed(p + CA7RESCNT) &
122 ~CA7RESCNT_CPUS) | CA7RESCNT_CODE,
123 p + CA7RESCNT);
124 }
125 iounmap(p);
126
127 shmobile_smp_apmu_suspend_init();
128}
129