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20#include <linux/acpi.h>
21#include <linux/arm_sdei.h>
22#include <linux/delay.h>
23#include <linux/init.h>
24#include <linux/spinlock.h>
25#include <linux/sched/mm.h>
26#include <linux/sched/hotplug.h>
27#include <linux/sched/task_stack.h>
28#include <linux/interrupt.h>
29#include <linux/cache.h>
30#include <linux/profile.h>
31#include <linux/errno.h>
32#include <linux/mm.h>
33#include <linux/err.h>
34#include <linux/cpu.h>
35#include <linux/smp.h>
36#include <linux/seq_file.h>
37#include <linux/irq.h>
38#include <linux/irqchip/arm-gic-v3.h>
39#include <linux/percpu.h>
40#include <linux/clockchips.h>
41#include <linux/completion.h>
42#include <linux/of.h>
43#include <linux/irq_work.h>
44#include <linux/kexec.h>
45
46#include <asm/alternative.h>
47#include <asm/atomic.h>
48#include <asm/cacheflush.h>
49#include <asm/cpu.h>
50#include <asm/cputype.h>
51#include <asm/cpu_ops.h>
52#include <asm/daifflags.h>
53#include <asm/mmu_context.h>
54#include <asm/numa.h>
55#include <asm/pgtable.h>
56#include <asm/pgalloc.h>
57#include <asm/processor.h>
58#include <asm/smp_plat.h>
59#include <asm/sections.h>
60#include <asm/tlbflush.h>
61#include <asm/ptrace.h>
62#include <asm/virt.h>
63
64#define CREATE_TRACE_POINTS
65#include <trace/events/ipi.h>
66
67DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
68EXPORT_PER_CPU_SYMBOL(cpu_number);
69
70
71
72
73
74
75struct secondary_data secondary_data;
76
77int cpus_stuck_in_kernel;
78
79enum ipi_msg_type {
80 IPI_RESCHEDULE,
81 IPI_CALL_FUNC,
82 IPI_CPU_STOP,
83 IPI_CPU_CRASH_STOP,
84 IPI_TIMER,
85 IPI_IRQ_WORK,
86 IPI_WAKEUP
87};
88
89#ifdef CONFIG_HOTPLUG_CPU
90static int op_cpu_kill(unsigned int cpu);
91#else
92static inline int op_cpu_kill(unsigned int cpu)
93{
94 return -ENOSYS;
95}
96#endif
97
98
99
100
101
102
103static int boot_secondary(unsigned int cpu, struct task_struct *idle)
104{
105 if (cpu_ops[cpu]->cpu_boot)
106 return cpu_ops[cpu]->cpu_boot(cpu);
107
108 return -EOPNOTSUPP;
109}
110
111static DECLARE_COMPLETION(cpu_running);
112
113int __cpu_up(unsigned int cpu, struct task_struct *idle)
114{
115 int ret;
116 long status;
117
118
119
120
121
122 secondary_data.task = idle;
123 secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
124 update_cpu_boot_status(CPU_MMU_OFF);
125 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
126
127
128
129
130 ret = boot_secondary(cpu, idle);
131 if (ret == 0) {
132
133
134
135
136 wait_for_completion_timeout(&cpu_running,
137 msecs_to_jiffies(1000));
138
139 if (!cpu_online(cpu)) {
140 pr_crit("CPU%u: failed to come online\n", cpu);
141 ret = -EIO;
142 }
143 } else {
144 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
145 return ret;
146 }
147
148 secondary_data.task = NULL;
149 secondary_data.stack = NULL;
150 status = READ_ONCE(secondary_data.status);
151 if (ret && status) {
152
153 if (status == CPU_MMU_OFF)
154 status = READ_ONCE(__early_cpu_boot_status);
155
156 switch (status & CPU_BOOT_STATUS_MASK) {
157 default:
158 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
159 cpu, status);
160 break;
161 case CPU_KILL_ME:
162 if (!op_cpu_kill(cpu)) {
163 pr_crit("CPU%u: died during early boot\n", cpu);
164 break;
165 }
166
167 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
168 case CPU_STUCK_IN_KERNEL:
169 pr_crit("CPU%u: is stuck in kernel\n", cpu);
170 if (status & CPU_STUCK_REASON_52_BIT_VA)
171 pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
172 if (status & CPU_STUCK_REASON_NO_GRAN)
173 pr_crit("CPU%u: does not support %luK granule \n", cpu, PAGE_SIZE / SZ_1K);
174 cpus_stuck_in_kernel++;
175 break;
176 case CPU_PANIC_KERNEL:
177 panic("CPU%u detected unsupported configuration\n", cpu);
178 }
179 }
180
181 return ret;
182}
183
184static void init_gic_priority_masking(void)
185{
186 u32 cpuflags;
187
188 if (WARN_ON(!gic_enable_sre()))
189 return;
190
191 cpuflags = read_sysreg(daif);
192
193 WARN_ON(!(cpuflags & PSR_I_BIT));
194
195 gic_write_pmr(GIC_PRIO_IRQOFF);
196
197
198 if (!(cpuflags & PSR_A_BIT))
199 write_sysreg(cpuflags & ~PSR_I_BIT, daif);
200}
201
202
203
204
205
206asmlinkage notrace void secondary_start_kernel(void)
207{
208 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
209 struct mm_struct *mm = &init_mm;
210 unsigned int cpu;
211
212 cpu = task_cpu(current);
213 set_my_cpu_offset(per_cpu_offset(cpu));
214
215
216
217
218
219 mmgrab(mm);
220 current->active_mm = mm;
221
222
223
224
225
226 cpu_uninstall_idmap();
227
228 if (system_uses_irq_prio_masking())
229 init_gic_priority_masking();
230
231 preempt_disable();
232 trace_hardirqs_off();
233
234
235
236
237
238
239 check_local_cpu_capabilities();
240
241 if (cpu_ops[cpu]->cpu_postboot)
242 cpu_ops[cpu]->cpu_postboot();
243
244
245
246
247 cpuinfo_store_cpu();
248
249
250
251
252 notify_cpu_starting(cpu);
253
254 store_cpu_topology(cpu);
255 numa_add_cpu(cpu);
256
257
258
259
260
261
262 pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
263 cpu, (unsigned long)mpidr,
264 read_cpuid_id());
265 update_cpu_boot_status(CPU_BOOT_SUCCESS);
266 set_cpu_online(cpu, true);
267 complete(&cpu_running);
268
269 local_daif_restore(DAIF_PROCCTX);
270
271
272
273
274 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
275}
276
277#ifdef CONFIG_HOTPLUG_CPU
278static int op_cpu_disable(unsigned int cpu)
279{
280
281
282
283
284 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
285 return -EOPNOTSUPP;
286
287
288
289
290
291 if (cpu_ops[cpu]->cpu_disable)
292 return cpu_ops[cpu]->cpu_disable(cpu);
293
294 return 0;
295}
296
297
298
299
300int __cpu_disable(void)
301{
302 unsigned int cpu = smp_processor_id();
303 int ret;
304
305 ret = op_cpu_disable(cpu);
306 if (ret)
307 return ret;
308
309 remove_cpu_topology(cpu);
310 numa_remove_cpu(cpu);
311
312
313
314
315
316 set_cpu_online(cpu, false);
317
318
319
320
321 irq_migrate_all_off_this_cpu();
322
323 return 0;
324}
325
326static int op_cpu_kill(unsigned int cpu)
327{
328
329
330
331
332
333 if (!cpu_ops[cpu]->cpu_kill)
334 return 0;
335
336 return cpu_ops[cpu]->cpu_kill(cpu);
337}
338
339
340
341
342
343void __cpu_die(unsigned int cpu)
344{
345 int err;
346
347 if (!cpu_wait_death(cpu, 5)) {
348 pr_crit("CPU%u: cpu didn't die\n", cpu);
349 return;
350 }
351 pr_notice("CPU%u: shutdown\n", cpu);
352
353
354
355
356
357
358
359 err = op_cpu_kill(cpu);
360 if (err)
361 pr_warn("CPU%d may not have shut down cleanly: %d\n",
362 cpu, err);
363}
364
365
366
367
368
369void cpu_die(void)
370{
371 unsigned int cpu = smp_processor_id();
372
373 idle_task_exit();
374
375 local_daif_mask();
376
377
378 (void)cpu_report_death();
379
380
381
382
383
384
385 cpu_ops[cpu]->cpu_die(cpu);
386
387 BUG();
388}
389#endif
390
391
392
393
394
395void cpu_die_early(void)
396{
397 int cpu = smp_processor_id();
398
399 pr_crit("CPU%d: will not boot\n", cpu);
400
401
402 set_cpu_present(cpu, 0);
403
404#ifdef CONFIG_HOTPLUG_CPU
405 update_cpu_boot_status(CPU_KILL_ME);
406
407 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
408 cpu_ops[cpu]->cpu_die(cpu);
409#endif
410 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
411
412 cpu_park_loop();
413}
414
415static void __init hyp_mode_check(void)
416{
417 if (is_hyp_mode_available())
418 pr_info("CPU: All CPU(s) started at EL2\n");
419 else if (is_hyp_mode_mismatched())
420 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
421 "CPU: CPUs started in inconsistent modes");
422 else
423 pr_info("CPU: All CPU(s) started at EL1\n");
424}
425
426void __init smp_cpus_done(unsigned int max_cpus)
427{
428 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
429 setup_cpu_features();
430 hyp_mode_check();
431 apply_alternatives_all();
432 mark_linear_text_alias_ro();
433}
434
435void __init smp_prepare_boot_cpu(void)
436{
437 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
438
439
440
441
442 jump_label_init();
443 cpuinfo_store_boot_cpu();
444
445
446
447
448
449
450 apply_boot_alternatives();
451
452
453 if (system_uses_irq_prio_masking())
454 init_gic_priority_masking();
455}
456
457static u64 __init of_get_cpu_mpidr(struct device_node *dn)
458{
459 const __be32 *cell;
460 u64 hwid;
461
462
463
464
465
466
467 cell = of_get_property(dn, "reg", NULL);
468 if (!cell) {
469 pr_err("%pOF: missing reg property\n", dn);
470 return INVALID_HWID;
471 }
472
473 hwid = of_read_number(cell, of_n_addr_cells(dn));
474
475
476
477 if (hwid & ~MPIDR_HWID_BITMASK) {
478 pr_err("%pOF: invalid reg property\n", dn);
479 return INVALID_HWID;
480 }
481 return hwid;
482}
483
484
485
486
487
488
489
490static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
491{
492 unsigned int i;
493
494 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
495 if (cpu_logical_map(i) == hwid)
496 return true;
497 return false;
498}
499
500
501
502
503
504static int __init smp_cpu_setup(int cpu)
505{
506 if (cpu_read_ops(cpu))
507 return -ENODEV;
508
509 if (cpu_ops[cpu]->cpu_init(cpu))
510 return -ENODEV;
511
512 set_cpu_possible(cpu, true);
513
514 return 0;
515}
516
517static bool bootcpu_valid __initdata;
518static unsigned int cpu_count = 1;
519
520#ifdef CONFIG_ACPI
521static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
522
523struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
524{
525 return &cpu_madt_gicc[cpu];
526}
527
528
529
530
531
532
533
534static void __init
535acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
536{
537 u64 hwid = processor->arm_mpidr;
538
539 if (!(processor->flags & ACPI_MADT_ENABLED)) {
540 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
541 return;
542 }
543
544 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
545 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
546 return;
547 }
548
549 if (is_mpidr_duplicate(cpu_count, hwid)) {
550 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
551 return;
552 }
553
554
555 if (cpu_logical_map(0) == hwid) {
556 if (bootcpu_valid) {
557 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
558 hwid);
559 return;
560 }
561 bootcpu_valid = true;
562 cpu_madt_gicc[0] = *processor;
563 return;
564 }
565
566 if (cpu_count >= NR_CPUS)
567 return;
568
569
570 cpu_logical_map(cpu_count) = hwid;
571
572 cpu_madt_gicc[cpu_count] = *processor;
573
574
575
576
577
578
579
580
581
582
583 acpi_set_mailbox_entry(cpu_count, processor);
584
585 cpu_count++;
586}
587
588static int __init
589acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
590 const unsigned long end)
591{
592 struct acpi_madt_generic_interrupt *processor;
593
594 processor = (struct acpi_madt_generic_interrupt *)header;
595 if (BAD_MADT_GICC_ENTRY(processor, end))
596 return -EINVAL;
597
598 acpi_table_print_madt_entry(header);
599
600 acpi_map_gic_cpu_interface(processor);
601
602 return 0;
603}
604
605static void __init acpi_parse_and_init_cpus(void)
606{
607 int i;
608
609
610
611
612
613
614 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
615 acpi_parse_gic_cpu_interface, 0);
616
617
618
619
620
621
622
623
624
625 acpi_map_cpus_to_nodes();
626
627 for (i = 0; i < nr_cpu_ids; i++)
628 early_map_cpu_to_node(i, acpi_numa_get_nid(i));
629}
630#else
631#define acpi_parse_and_init_cpus(...) do { } while (0)
632#endif
633
634
635
636
637
638
639static void __init of_parse_and_init_cpus(void)
640{
641 struct device_node *dn;
642
643 for_each_of_cpu_node(dn) {
644 u64 hwid = of_get_cpu_mpidr(dn);
645
646 if (hwid == INVALID_HWID)
647 goto next;
648
649 if (is_mpidr_duplicate(cpu_count, hwid)) {
650 pr_err("%pOF: duplicate cpu reg properties in the DT\n",
651 dn);
652 goto next;
653 }
654
655
656
657
658
659
660
661 if (hwid == cpu_logical_map(0)) {
662 if (bootcpu_valid) {
663 pr_err("%pOF: duplicate boot cpu reg property in DT\n",
664 dn);
665 goto next;
666 }
667
668 bootcpu_valid = true;
669 early_map_cpu_to_node(0, of_node_to_nid(dn));
670
671
672
673
674
675
676
677 continue;
678 }
679
680 if (cpu_count >= NR_CPUS)
681 goto next;
682
683 pr_debug("cpu logical map 0x%llx\n", hwid);
684 cpu_logical_map(cpu_count) = hwid;
685
686 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
687next:
688 cpu_count++;
689 }
690}
691
692
693
694
695
696
697void __init smp_init_cpus(void)
698{
699 int i;
700
701 if (acpi_disabled)
702 of_parse_and_init_cpus();
703 else
704 acpi_parse_and_init_cpus();
705
706 if (cpu_count > nr_cpu_ids)
707 pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
708 cpu_count, nr_cpu_ids);
709
710 if (!bootcpu_valid) {
711 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
712 return;
713 }
714
715
716
717
718
719
720
721
722 for (i = 1; i < nr_cpu_ids; i++) {
723 if (cpu_logical_map(i) != INVALID_HWID) {
724 if (smp_cpu_setup(i))
725 cpu_logical_map(i) = INVALID_HWID;
726 }
727 }
728}
729
730void __init smp_prepare_cpus(unsigned int max_cpus)
731{
732 int err;
733 unsigned int cpu;
734 unsigned int this_cpu;
735
736 init_cpu_topology();
737
738 this_cpu = smp_processor_id();
739 store_cpu_topology(this_cpu);
740 numa_store_cpu_info(this_cpu);
741 numa_add_cpu(this_cpu);
742
743
744
745
746
747 if (max_cpus == 0)
748 return;
749
750
751
752
753
754
755 for_each_possible_cpu(cpu) {
756
757 per_cpu(cpu_number, cpu) = cpu;
758
759 if (cpu == smp_processor_id())
760 continue;
761
762 if (!cpu_ops[cpu])
763 continue;
764
765 err = cpu_ops[cpu]->cpu_prepare(cpu);
766 if (err)
767 continue;
768
769 set_cpu_present(cpu, true);
770 numa_store_cpu_info(cpu);
771 }
772}
773
774void (*__smp_cross_call)(const struct cpumask *, unsigned int);
775
776void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
777{
778 __smp_cross_call = fn;
779}
780
781static const char *ipi_types[NR_IPI] __tracepoint_string = {
782#define S(x,s) [x] = s
783 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
784 S(IPI_CALL_FUNC, "Function call interrupts"),
785 S(IPI_CPU_STOP, "CPU stop interrupts"),
786 S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
787 S(IPI_TIMER, "Timer broadcast interrupts"),
788 S(IPI_IRQ_WORK, "IRQ work interrupts"),
789 S(IPI_WAKEUP, "CPU wake-up interrupts"),
790};
791
792static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
793{
794 trace_ipi_raise(target, ipi_types[ipinr]);
795 __smp_cross_call(target, ipinr);
796}
797
798void show_ipi_list(struct seq_file *p, int prec)
799{
800 unsigned int cpu, i;
801
802 for (i = 0; i < NR_IPI; i++) {
803 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
804 prec >= 4 ? " " : "");
805 for_each_online_cpu(cpu)
806 seq_printf(p, "%10u ",
807 __get_irq_stat(cpu, ipi_irqs[i]));
808 seq_printf(p, " %s\n", ipi_types[i]);
809 }
810}
811
812u64 smp_irq_stat_cpu(unsigned int cpu)
813{
814 u64 sum = 0;
815 int i;
816
817 for (i = 0; i < NR_IPI; i++)
818 sum += __get_irq_stat(cpu, ipi_irqs[i]);
819
820 return sum;
821}
822
823void arch_send_call_function_ipi_mask(const struct cpumask *mask)
824{
825 smp_cross_call(mask, IPI_CALL_FUNC);
826}
827
828void arch_send_call_function_single_ipi(int cpu)
829{
830 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
831}
832
833#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
834void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
835{
836 smp_cross_call(mask, IPI_WAKEUP);
837}
838#endif
839
840#ifdef CONFIG_IRQ_WORK
841void arch_irq_work_raise(void)
842{
843 if (__smp_cross_call)
844 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
845}
846#endif
847
848
849
850
851static void ipi_cpu_stop(unsigned int cpu)
852{
853 set_cpu_online(cpu, false);
854
855 local_daif_mask();
856 sdei_mask_local_cpu();
857
858 while (1)
859 cpu_relax();
860}
861
862#ifdef CONFIG_KEXEC_CORE
863static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
864#endif
865
866static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
867{
868#ifdef CONFIG_KEXEC_CORE
869 crash_save_cpu(regs, cpu);
870
871 atomic_dec(&waiting_for_crash_ipi);
872
873 local_irq_disable();
874 sdei_mask_local_cpu();
875
876#ifdef CONFIG_HOTPLUG_CPU
877 if (cpu_ops[cpu]->cpu_die)
878 cpu_ops[cpu]->cpu_die(cpu);
879#endif
880
881
882 cpu_park_loop();
883#endif
884}
885
886
887
888
889void handle_IPI(int ipinr, struct pt_regs *regs)
890{
891 unsigned int cpu = smp_processor_id();
892 struct pt_regs *old_regs = set_irq_regs(regs);
893
894 if ((unsigned)ipinr < NR_IPI) {
895 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
896 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
897 }
898
899 switch (ipinr) {
900 case IPI_RESCHEDULE:
901 scheduler_ipi();
902 break;
903
904 case IPI_CALL_FUNC:
905 irq_enter();
906 generic_smp_call_function_interrupt();
907 irq_exit();
908 break;
909
910 case IPI_CPU_STOP:
911 irq_enter();
912 ipi_cpu_stop(cpu);
913 irq_exit();
914 break;
915
916 case IPI_CPU_CRASH_STOP:
917 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
918 irq_enter();
919 ipi_cpu_crash_stop(cpu, regs);
920
921 unreachable();
922 }
923 break;
924
925#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
926 case IPI_TIMER:
927 irq_enter();
928 tick_receive_broadcast();
929 irq_exit();
930 break;
931#endif
932
933#ifdef CONFIG_IRQ_WORK
934 case IPI_IRQ_WORK:
935 irq_enter();
936 irq_work_run();
937 irq_exit();
938 break;
939#endif
940
941#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
942 case IPI_WAKEUP:
943 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
944 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
945 cpu);
946 break;
947#endif
948
949 default:
950 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
951 break;
952 }
953
954 if ((unsigned)ipinr < NR_IPI)
955 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
956 set_irq_regs(old_regs);
957}
958
959void smp_send_reschedule(int cpu)
960{
961 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
962}
963
964#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
965void tick_broadcast(const struct cpumask *mask)
966{
967 smp_cross_call(mask, IPI_TIMER);
968}
969#endif
970
971void smp_send_stop(void)
972{
973 unsigned long timeout;
974
975 if (num_online_cpus() > 1) {
976 cpumask_t mask;
977
978 cpumask_copy(&mask, cpu_online_mask);
979 cpumask_clear_cpu(smp_processor_id(), &mask);
980
981 if (system_state <= SYSTEM_RUNNING)
982 pr_crit("SMP: stopping secondary CPUs\n");
983 smp_cross_call(&mask, IPI_CPU_STOP);
984 }
985
986
987 timeout = USEC_PER_SEC;
988 while (num_online_cpus() > 1 && timeout--)
989 udelay(1);
990
991 if (num_online_cpus() > 1)
992 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
993 cpumask_pr_args(cpu_online_mask));
994
995 sdei_mask_local_cpu();
996}
997
998#ifdef CONFIG_KEXEC_CORE
999void crash_smp_send_stop(void)
1000{
1001 static int cpus_stopped;
1002 cpumask_t mask;
1003 unsigned long timeout;
1004
1005
1006
1007
1008
1009 if (cpus_stopped)
1010 return;
1011
1012 cpus_stopped = 1;
1013
1014 if (num_online_cpus() == 1) {
1015 sdei_mask_local_cpu();
1016 return;
1017 }
1018
1019 cpumask_copy(&mask, cpu_online_mask);
1020 cpumask_clear_cpu(smp_processor_id(), &mask);
1021
1022 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
1023
1024 pr_crit("SMP: stopping secondary CPUs\n");
1025 smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
1026
1027
1028 timeout = USEC_PER_SEC;
1029 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
1030 udelay(1);
1031
1032 if (atomic_read(&waiting_for_crash_ipi) > 0)
1033 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
1034 cpumask_pr_args(&mask));
1035
1036 sdei_mask_local_cpu();
1037}
1038
1039bool smp_crash_stop_failed(void)
1040{
1041 return (atomic_read(&waiting_for_crash_ipi) > 0);
1042}
1043#endif
1044
1045
1046
1047
1048int setup_profiling_timer(unsigned int multiplier)
1049{
1050 return -EINVAL;
1051}
1052
1053static bool have_cpu_die(void)
1054{
1055#ifdef CONFIG_HOTPLUG_CPU
1056 int any_cpu = raw_smp_processor_id();
1057
1058 if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
1059 return true;
1060#endif
1061 return false;
1062}
1063
1064bool cpus_are_stuck_in_kernel(void)
1065{
1066 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1067
1068 return !!cpus_stuck_in_kernel || smp_spin_tables;
1069}
1070