LXR linux/drivers/gpu/drm/exynos/exynos_drm

   1/* exynos_drm_drv.h
   2 *
   3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4 * Authors:
   5 *      Inki Dae <inki.dae@samsung.com>
   6 *      Joonyoung Shim <jy0922.shim@samsung.com>
   7 *      Seung-Woo Kim <sw0312.kim@samsung.com>
   8 *
   9 * This program is free software; you can redistribute  it and/or modify it
  10 * under  the terms of  the GNU General  Public License as published by the
  11 * Free Software Foundation;  either version 2 of the  License, or (at your
  12 * option) any later version.
  13 */
  14
  15#ifndef _EXYNOS_DRM_DRV_H_
  16#define _EXYNOS_DRM_DRV_H_
  17
  18#include <drm/drmP.h>
  19#include <linux/module.h>
  20
  21#define MAX_CRTC        3
  22#define MAX_PLANE       5
  23#define MAX_FB_BUFFER   4
  24
  25#define DEFAULT_WIN     0
  26
  27#define to_exynos_crtc(x)       container_of(x, struct exynos_drm_crtc, base)
  28#define to_exynos_plane(x)      container_of(x, struct exynos_drm_plane, base)
  29
  30/* this enumerates display type. */
  31enum exynos_drm_output_type {
  32        EXYNOS_DISPLAY_TYPE_NONE,
  33        /* RGB or CPU Interface. */
  34        EXYNOS_DISPLAY_TYPE_LCD,
  35        /* HDMI Interface. */
  36        EXYNOS_DISPLAY_TYPE_HDMI,
  37        /* Virtual Display Interface. */
  38        EXYNOS_DISPLAY_TYPE_VIDI,
  39};
  40
  41struct exynos_drm_rect {
  42        unsigned int x, y;
  43        unsigned int w, h;
  44};
  45
  46/*
  47 * Exynos drm plane state structure.
  48 *
  49 * @base: plane_state object (contains drm_framebuffer pointer)
  50 * @src: rectangle of the source image data to be displayed (clipped to
  51 *       visible part).
  52 * @crtc: rectangle of the target image position on hardware screen
  53 *       (clipped to visible part).
  54 * @h_ratio: horizontal scaling ratio, 16.16 fixed point
  55 * @v_ratio: vertical scaling ratio, 16.16 fixed point
  56 *
  57 * this structure consists plane state data that will be applied to hardware
  58 * specific overlay info.
  59 */
  60
  61struct exynos_drm_plane_state {
  62        struct drm_plane_state base;
  63        struct exynos_drm_rect crtc;
  64        struct exynos_drm_rect src;
  65        unsigned int h_ratio;
  66        unsigned int v_ratio;
  67};
  68
  69static inline struct exynos_drm_plane_state *
  70to_exynos_plane_state(struct drm_plane_state *state)
  71{
  72        return container_of(state, struct exynos_drm_plane_state, base);
  73}
  74
  75/*
  76 * Exynos drm common overlay structure.
  77 *
  78 * @base: plane object
  79 * @index: hardware index of the overlay layer
  80 *
  81 * this structure is common to exynos SoC and its contents would be copied
  82 * to hardware specific overlay info.
  83 */
  84
  85struct exynos_drm_plane {
  86        struct drm_plane base;
  87        const struct exynos_drm_plane_config *config;
  88        unsigned int index;
  89};
  90
  91#define EXYNOS_DRM_PLANE_CAP_DOUBLE     (1 << 0)
  92#define EXYNOS_DRM_PLANE_CAP_SCALE      (1 << 1)
  93#define EXYNOS_DRM_PLANE_CAP_ZPOS       (1 << 2)
  94#define EXYNOS_DRM_PLANE_CAP_TILE       (1 << 3)
  95#define EXYNOS_DRM_PLANE_CAP_PIX_BLEND  (1 << 4)
  96#define EXYNOS_DRM_PLANE_CAP_WIN_BLEND  (1 << 5)
  97
  98/*
  99 * Exynos DRM plane configuration structure.
 100 *
 101 * @zpos: initial z-position of the plane.
 102 * @type: type of the plane (primary, cursor or overlay).
 103 * @pixel_formats: supported pixel formats.
 104 * @num_pixel_formats: number of elements in 'pixel_formats'.
 105 * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)
 106 */
 107
 108struct exynos_drm_plane_config {
 109        unsigned int zpos;
 110        enum drm_plane_type type;
 111        const uint32_t *pixel_formats;
 112        unsigned int num_pixel_formats;
 113        unsigned int capabilities;
 114};
 115
 116/*
 117 * Exynos drm crtc ops
 118 *
 119 * @enable: enable the device
 120 * @disable: disable the device
 121 * @enable_vblank: specific driver callback for enabling vblank interrupt.
 122 * @disable_vblank: specific driver callback for disabling vblank interrupt.
 123 * @mode_valid: specific driver callback for mode validation
 124 * @atomic_check: validate state
 125 * @atomic_begin: prepare device to receive an update
 126 * @atomic_flush: mark the end of device update
 127 * @update_plane: apply hardware specific overlay data to registers.
 128 * @disable_plane: disable hardware specific overlay.
 129 * @te_handler: trigger to transfer video image at the tearing effect
 130 *      synchronization signal if there is a page flip request.
 131 */
 132struct exynos_drm_crtc;
 133struct exynos_drm_crtc_ops {
 134        void (*enable)(struct exynos_drm_crtc *crtc);
 135        void (*disable)(struct exynos_drm_crtc *crtc);
 136        int (*enable_vblank)(struct exynos_drm_crtc *crtc);
 137        void (*disable_vblank)(struct exynos_drm_crtc *crtc);
 138        enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc,
 139                const struct drm_display_mode *mode);
 140        bool (*mode_fixup)(struct exynos_drm_crtc *crtc,
 141                           const struct drm_display_mode *mode,
 142                           struct drm_display_mode *adjusted_mode);
 143        int (*atomic_check)(struct exynos_drm_crtc *crtc,
 144                            struct drm_crtc_state *state);
 145        void (*atomic_begin)(struct exynos_drm_crtc *crtc);
 146        void (*update_plane)(struct exynos_drm_crtc *crtc,
 147                             struct exynos_drm_plane *plane);
 148        void (*disable_plane)(struct exynos_drm_crtc *crtc,
 149                              struct exynos_drm_plane *plane);
 150        void (*atomic_flush)(struct exynos_drm_crtc *crtc);
 151        void (*te_handler)(struct exynos_drm_crtc *crtc);
 152};
 153
 154struct exynos_drm_clk {
 155        void (*enable)(struct exynos_drm_clk *clk, bool enable);
 156};
 157
 158/*
 159 * Exynos specific crtc structure.
 160 *
 161 * @base: crtc object.
 162 * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
 163 * @ops: pointer to callbacks for exynos drm specific functionality
 164 * @ctx: A pointer to the crtc's implementation specific context
 165 * @pipe_clk: A pointer to the crtc's pipeline clock.
 166 */
 167struct exynos_drm_crtc {
 168        struct drm_crtc                 base;
 169        enum exynos_drm_output_type     type;
 170        const struct exynos_drm_crtc_ops        *ops;
 171        void                            *ctx;
 172        struct exynos_drm_clk           *pipe_clk;
 173        bool                            i80_mode : 1;
 174};
 175
 176static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
 177                                              bool enable)
 178{
 179        if (crtc->pipe_clk)
 180                crtc->pipe_clk->enable(crtc->pipe_clk, enable);
 181}
 182
 183struct drm_exynos_file_private {
 184        /* for g2d api */
 185        struct list_head        inuse_cmdlist;
 186        struct list_head        event_list;
 187        struct list_head        userptr_list;
 188};
 189
 190/*
 191 * Exynos drm private structure.
 192 *
 193 * @pending: the crtcs that have pending updates to finish
 194 * @lock: protect access to @pending
 195 * @wait: wait an atomic commit to finish
 196 */
 197struct exynos_drm_private {
 198        struct drm_fb_helper *fb_helper;
 199
 200        struct device *g2d_dev;
 201        struct device *dma_dev;
 202        void *mapping;
 203
 204        /* for atomic commit */
 205        u32                     pending;
 206        spinlock_t              lock;
 207        wait_queue_head_t       wait;
 208};
 209
 210static inline struct device *to_dma_dev(struct drm_device *dev)
 211{
 212        struct exynos_drm_private *priv = dev->dev_private;
 213
 214        return priv->dma_dev;
 215}
 216
 217static inline bool is_drm_iommu_supported(struct drm_device *drm_dev)
 218{
 219        struct exynos_drm_private *priv = drm_dev->dev_private;
 220
 221        return priv->mapping ? true : false;
 222}
 223
 224int exynos_drm_register_dma(struct drm_device *drm, struct device *dev);
 225void exynos_drm_unregister_dma(struct drm_device *drm, struct device *dev);
 226void exynos_drm_cleanup_dma(struct drm_device *drm);
 227
 228#ifdef CONFIG_DRM_EXYNOS_DPI
 229struct drm_encoder *exynos_dpi_probe(struct device *dev);
 230int exynos_dpi_remove(struct drm_encoder *encoder);
 231int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder);
 232#else
 233static inline struct drm_encoder *
 234exynos_dpi_probe(struct device *dev) { return NULL; }
 235static inline int exynos_dpi_remove(struct drm_encoder *encoder)
 236{
 237        return 0;
 238}
 239static inline int exynos_dpi_bind(struct drm_device *dev,
 240                                  struct drm_encoder *encoder)
 241{
 242        return 0;
 243}
 244#endif
 245
 246#ifdef CONFIG_DRM_EXYNOS_FIMC
 247int exynos_drm_check_fimc_device(struct device *dev);
 248#else
 249static inline int exynos_drm_check_fimc_device(struct device *dev)
 250{
 251        return 0;
 252}
 253#endif
 254
 255int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
 256                         bool nonblock);
 257
 258
 259extern struct platform_driver fimd_driver;
 260extern struct platform_driver exynos5433_decon_driver;
 261extern struct platform_driver decon_driver;
 262extern struct platform_driver dp_driver;
 263extern struct platform_driver dsi_driver;
 264extern struct platform_driver mixer_driver;
 265extern struct platform_driver hdmi_driver;
 266extern struct platform_driver vidi_driver;
 267extern struct platform_driver g2d_driver;
 268extern struct platform_driver fimc_driver;
 269extern struct platform_driver rotator_driver;
 270extern struct platform_driver scaler_driver;
 271extern struct platform_driver gsc_driver;
 272extern struct platform_driver mic_driver;
 273#endif
 274