LXR linux/drivers/gpu/drm/msm/dsi/dsi

   1/*
   2 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 and
   6 * only version 2 as published by the Free Software Foundation.
   7 *
   8 * This program is distributed in the hope that it will be useful,
   9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 * GNU General Public License for more details.
  12 */
  13
  14#include "dsi_cfg.h"
  15
  16static const char * const dsi_v2_bus_clk_names[] = {
  17        "core_mmss", "iface", "bus",
  18};
  19
  20static const struct msm_dsi_config apq8064_dsi_cfg = {
  21        .io_offset = 0,
  22        .reg_cfg = {
  23                .num = 3,
  24                .regs = {
  25                        {"vdda", 100000, 100},  /* 1.2 V */
  26                        {"avdd", 10000, 100},   /* 3.0 V */
  27                        {"vddio", 100000, 100}, /* 1.8 V */
  28                },
  29        },
  30        .bus_clk_names = dsi_v2_bus_clk_names,
  31        .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
  32        .io_start = { 0x4700000, 0x5800000 },
  33        .num_dsi = 2,
  34};
  35
  36static const char * const dsi_6g_bus_clk_names[] = {
  37        "mdp_core", "iface", "bus", "core_mmss",
  38};
  39
  40static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
  41        .io_offset = DSI_6G_REG_SHIFT,
  42        .reg_cfg = {
  43                .num = 4,
  44                .regs = {
  45                        {"gdsc", -1, -1},
  46                        {"vdd", 150000, 100},   /* 3.0 V */
  47                        {"vdda", 100000, 100},  /* 1.2 V */
  48                        {"vddio", 100000, 100}, /* 1.8 V */
  49                },
  50        },
  51        .bus_clk_names = dsi_6g_bus_clk_names,
  52        .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
  53        .io_start = { 0xfd922800, 0xfd922b00 },
  54        .num_dsi = 2,
  55};
  56
  57static const char * const dsi_8916_bus_clk_names[] = {
  58        "mdp_core", "iface", "bus",
  59};
  60
  61static const struct msm_dsi_config msm8916_dsi_cfg = {
  62        .io_offset = DSI_6G_REG_SHIFT,
  63        .reg_cfg = {
  64                .num = 3,
  65                .regs = {
  66                        {"gdsc", -1, -1},
  67                        {"vdda", 100000, 100},  /* 1.2 V */
  68                        {"vddio", 100000, 100}, /* 1.8 V */
  69                },
  70        },
  71        .bus_clk_names = dsi_8916_bus_clk_names,
  72        .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
  73        .io_start = { 0x1a98000 },
  74        .num_dsi = 1,
  75};
  76
  77static const struct msm_dsi_config msm8994_dsi_cfg = {
  78        .io_offset = DSI_6G_REG_SHIFT,
  79        .reg_cfg = {
  80                .num = 7,
  81                .regs = {
  82                        {"gdsc", -1, -1},
  83                        {"vdda", 100000, 100},  /* 1.25 V */
  84                        {"vddio", 100000, 100}, /* 1.8 V */
  85                        {"vcca", 10000, 100},   /* 1.0 V */
  86                        {"vdd", 100000, 100},   /* 1.8 V */
  87                        {"lab_reg", -1, -1},
  88                        {"ibb_reg", -1, -1},
  89                },
  90        },
  91        .bus_clk_names = dsi_6g_bus_clk_names,
  92        .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
  93        .io_start = { 0xfd998000, 0xfd9a0000 },
  94        .num_dsi = 2,
  95};
  96
  97/*
  98 * TODO: core_mmss_clk fails to enable for some reason, but things work fine
  99 * without it too. Figure out why it doesn't enable and uncomment below
 100 */
 101static const char * const dsi_8996_bus_clk_names[] = {
 102        "mdp_core", "iface", "bus", /* "core_mmss", */
 103};
 104
 105static const struct msm_dsi_config msm8996_dsi_cfg = {
 106        .io_offset = DSI_6G_REG_SHIFT,
 107        .reg_cfg = {
 108                .num = 2,
 109                .regs = {
 110                        {"vdda", 18160, 1 },    /* 1.25 V */
 111                        {"vcca", 17000, 32 },   /* 0.925 V */
 112                        {"vddio", 100000, 100 },/* 1.8 V */
 113                },
 114        },
 115        .bus_clk_names = dsi_8996_bus_clk_names,
 116        .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
 117        .io_start = { 0x994000, 0x996000 },
 118        .num_dsi = 2,
 119};
 120
 121static const char * const dsi_sdm845_bus_clk_names[] = {
 122        "iface", "bus",
 123};
 124
 125static const struct msm_dsi_config sdm845_dsi_cfg = {
 126        .io_offset = DSI_6G_REG_SHIFT,
 127        .reg_cfg = {
 128                .num = 1,
 129                .regs = {
 130                        {"vdda", 21800, 4 },    /* 1.2 V */
 131                },
 132        },
 133        .bus_clk_names = dsi_sdm845_bus_clk_names,
 134        .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
 135        .io_start = { 0xae94000, 0xae96000 },
 136        .num_dsi = 2,
 137};
 138
 139const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
 140        .link_clk_enable = dsi_link_clk_enable_v2,
 141        .link_clk_disable = dsi_link_clk_disable_v2,
 142        .clk_init_ver = dsi_clk_init_v2,
 143        .tx_buf_alloc = dsi_tx_buf_alloc_v2,
 144        .tx_buf_get = dsi_tx_buf_get_v2,
 145        .tx_buf_put = NULL,
 146        .dma_base_get = dsi_dma_base_get_v2,
 147        .calc_clk_rate = dsi_calc_clk_rate_v2,
 148};
 149
 150const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
 151        .link_clk_enable = dsi_link_clk_enable_6g,
 152        .link_clk_disable = dsi_link_clk_disable_6g,
 153        .clk_init_ver = NULL,
 154        .tx_buf_alloc = dsi_tx_buf_alloc_6g,
 155        .tx_buf_get = dsi_tx_buf_get_6g,
 156        .tx_buf_put = dsi_tx_buf_put_6g,
 157        .dma_base_get = dsi_dma_base_get_6g,
 158        .calc_clk_rate = dsi_calc_clk_rate_6g,
 159};
 160
 161const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
 162        .link_clk_enable = dsi_link_clk_enable_6g,
 163        .link_clk_disable = dsi_link_clk_disable_6g,
 164        .clk_init_ver = dsi_clk_init_6g_v2,
 165        .tx_buf_alloc = dsi_tx_buf_alloc_6g,
 166        .tx_buf_get = dsi_tx_buf_get_6g,
 167        .tx_buf_put = dsi_tx_buf_put_6g,
 168        .dma_base_get = dsi_dma_base_get_6g,
 169        .calc_clk_rate = dsi_calc_clk_rate_6g,
 170};
 171
 172static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
 173        {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
 174                &apq8064_dsi_cfg, &msm_dsi_v2_host_ops},
 175        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
 176                &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 177        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
 178                &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 179        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
 180                &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 181        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
 182                &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 183        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
 184                &msm8994_dsi_cfg, &msm_dsi_6g_host_ops},
 185        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
 186                &msm8916_dsi_cfg, &msm_dsi_6g_host_ops},
 187        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
 188                &msm8996_dsi_cfg, &msm_dsi_6g_host_ops},
 189        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
 190                &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 191};
 192
 193const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
 194{
 195        const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
 196        int i;
 197
 198        for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
 199                if ((dsi_cfg_handlers[i].major == major) &&
 200                        (dsi_cfg_handlers[i].minor == minor)) {
 201                        cfg_hnd = &dsi_cfg_handlers[i];
 202                        break;
 203                }
 204        }
 205
 206        return cfg_hnd;
 207}
 208
 209