linux/drivers/gpu/host1x/hw/channel_hw.c
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   1/*
   2 * Tegra host1x Channel
   3 *
   4 * Copyright (c) 2010-2013, NVIDIA Corporation.
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms and conditions of the GNU General Public License,
   8 * version 2, as published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope it will be useful, but WITHOUT
  11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13 * more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17 */
  18
  19#include <linux/host1x.h>
  20#include <linux/iommu.h>
  21#include <linux/slab.h>
  22
  23#include <trace/events/host1x.h>
  24
  25#include "../channel.h"
  26#include "../dev.h"
  27#include "../intr.h"
  28#include "../job.h"
  29
  30#define TRACE_MAX_LENGTH 128U
  31
  32static void trace_write_gather(struct host1x_cdma *cdma, struct host1x_bo *bo,
  33                               u32 offset, u32 words)
  34{
  35        struct device *dev = cdma_to_channel(cdma)->dev;
  36        void *mem = NULL;
  37
  38        if (host1x_debug_trace_cmdbuf)
  39                mem = host1x_bo_mmap(bo);
  40
  41        if (mem) {
  42                u32 i;
  43                /*
  44                 * Write in batches of 128 as there seems to be a limit
  45                 * of how much you can output to ftrace at once.
  46                 */
  47                for (i = 0; i < words; i += TRACE_MAX_LENGTH) {
  48                        u32 num_words = min(words - i, TRACE_MAX_LENGTH);
  49
  50                        offset += i * sizeof(u32);
  51
  52                        trace_host1x_cdma_push_gather(dev_name(dev), bo,
  53                                                      num_words, offset,
  54                                                      mem);
  55                }
  56
  57                host1x_bo_munmap(bo, mem);
  58        }
  59}
  60
  61static void submit_gathers(struct host1x_job *job)
  62{
  63        struct host1x_cdma *cdma = &job->channel->cdma;
  64#if HOST1X_HW < 6
  65        struct device *dev = job->channel->dev;
  66#endif
  67        unsigned int i;
  68
  69        for (i = 0; i < job->num_gathers; i++) {
  70                struct host1x_job_gather *g = &job->gathers[i];
  71                dma_addr_t addr = g->base + g->offset;
  72                u32 op2, op3;
  73
  74                op2 = lower_32_bits(addr);
  75                op3 = upper_32_bits(addr);
  76
  77                trace_write_gather(cdma, g->bo, g->offset, g->words);
  78
  79                if (op3 != 0) {
  80#if HOST1X_HW >= 6
  81                        u32 op1 = host1x_opcode_gather_wide(g->words);
  82                        u32 op4 = HOST1X_OPCODE_NOP;
  83
  84                        host1x_cdma_push_wide(cdma, op1, op2, op3, op4);
  85#else
  86                        dev_err(dev, "invalid gather for push buffer %pad\n",
  87                                &addr);
  88                        continue;
  89#endif
  90                } else {
  91                        u32 op1 = host1x_opcode_gather(g->words);
  92
  93                        host1x_cdma_push(cdma, op1, op2);
  94                }
  95        }
  96}
  97
  98static inline void synchronize_syncpt_base(struct host1x_job *job)
  99{
 100        struct host1x *host = dev_get_drvdata(job->channel->dev->parent);
 101        struct host1x_syncpt *sp = host->syncpt + job->syncpt_id;
 102        unsigned int id;
 103        u32 value;
 104
 105        value = host1x_syncpt_read_max(sp);
 106        id = sp->base->id;
 107
 108        host1x_cdma_push(&job->channel->cdma,
 109                         host1x_opcode_setclass(HOST1X_CLASS_HOST1X,
 110                                HOST1X_UCLASS_LOAD_SYNCPT_BASE, 1),
 111                         HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(id) |
 112                         HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(value));
 113}
 114
 115static void host1x_channel_set_streamid(struct host1x_channel *channel)
 116{
 117#if HOST1X_HW >= 6
 118        u32 sid = 0x7f;
 119#ifdef CONFIG_IOMMU_API
 120        struct iommu_fwspec *spec = dev_iommu_fwspec_get(channel->dev->parent);
 121        if (spec)
 122                sid = spec->ids[0] & 0xffff;
 123#endif
 124
 125        host1x_ch_writel(channel, sid, HOST1X_CHANNEL_SMMU_STREAMID);
 126#endif
 127}
 128
 129static int channel_submit(struct host1x_job *job)
 130{
 131        struct host1x_channel *ch = job->channel;
 132        struct host1x_syncpt *sp;
 133        u32 user_syncpt_incrs = job->syncpt_incrs;
 134        u32 prev_max = 0;
 135        u32 syncval;
 136        int err;
 137        struct host1x_waitlist *completed_waiter = NULL;
 138        struct host1x *host = dev_get_drvdata(ch->dev->parent);
 139
 140        sp = host->syncpt + job->syncpt_id;
 141        trace_host1x_channel_submit(dev_name(ch->dev),
 142                                    job->num_gathers, job->num_relocs,
 143                                    job->syncpt_id, job->syncpt_incrs);
 144
 145        /* before error checks, return current max */
 146        prev_max = job->syncpt_end = host1x_syncpt_read_max(sp);
 147
 148        /* get submit lock */
 149        err = mutex_lock_interruptible(&ch->submitlock);
 150        if (err)
 151                goto error;
 152
 153        completed_waiter = kzalloc(sizeof(*completed_waiter), GFP_KERNEL);
 154        if (!completed_waiter) {
 155                mutex_unlock(&ch->submitlock);
 156                err = -ENOMEM;
 157                goto error;
 158        }
 159
 160        host1x_channel_set_streamid(ch);
 161
 162        /* begin a CDMA submit */
 163        err = host1x_cdma_begin(&ch->cdma, job);
 164        if (err) {
 165                mutex_unlock(&ch->submitlock);
 166                goto error;
 167        }
 168
 169        if (job->serialize) {
 170                /*
 171                 * Force serialization by inserting a host wait for the
 172                 * previous job to finish before this one can commence.
 173                 */
 174                host1x_cdma_push(&ch->cdma,
 175                                 host1x_opcode_setclass(HOST1X_CLASS_HOST1X,
 176                                        host1x_uclass_wait_syncpt_r(), 1),
 177                                 host1x_class_host_wait_syncpt(job->syncpt_id,
 178                                        host1x_syncpt_read_max(sp)));
 179        }
 180
 181        /* Synchronize base register to allow using it for relative waiting */
 182        if (sp->base)
 183                synchronize_syncpt_base(job);
 184
 185        syncval = host1x_syncpt_incr_max(sp, user_syncpt_incrs);
 186
 187        host1x_hw_syncpt_assign_to_channel(host, sp, ch);
 188
 189        job->syncpt_end = syncval;
 190
 191        /* add a setclass for modules that require it */
 192        if (job->class)
 193                host1x_cdma_push(&ch->cdma,
 194                                 host1x_opcode_setclass(job->class, 0, 0),
 195                                 HOST1X_OPCODE_NOP);
 196
 197        submit_gathers(job);
 198
 199        /* end CDMA submit & stash pinned hMems into sync queue */
 200        host1x_cdma_end(&ch->cdma, job);
 201
 202        trace_host1x_channel_submitted(dev_name(ch->dev), prev_max, syncval);
 203
 204        /* schedule a submit complete interrupt */
 205        err = host1x_intr_add_action(host, sp, syncval,
 206                                     HOST1X_INTR_ACTION_SUBMIT_COMPLETE, ch,
 207                                     completed_waiter, NULL);
 208        completed_waiter = NULL;
 209        WARN(err, "Failed to set submit complete interrupt");
 210
 211        mutex_unlock(&ch->submitlock);
 212
 213        return 0;
 214
 215error:
 216        kfree(completed_waiter);
 217        return err;
 218}
 219
 220static void enable_gather_filter(struct host1x *host,
 221                                 struct host1x_channel *ch)
 222{
 223#if HOST1X_HW >= 6
 224        u32 val;
 225
 226        if (!host->hv_regs)
 227                return;
 228
 229        val = host1x_hypervisor_readl(
 230                host, HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(ch->id / 32));
 231        val |= BIT(ch->id % 32);
 232        host1x_hypervisor_writel(
 233                host, val, HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(ch->id / 32));
 234#elif HOST1X_HW >= 4
 235        host1x_ch_writel(ch,
 236                         HOST1X_CHANNEL_CHANNELCTRL_KERNEL_FILTER_GBUFFER(1),
 237                         HOST1X_CHANNEL_CHANNELCTRL);
 238#endif
 239}
 240
 241static int host1x_channel_init(struct host1x_channel *ch, struct host1x *dev,
 242                               unsigned int index)
 243{
 244#if HOST1X_HW < 6
 245        ch->regs = dev->regs + index * 0x4000;
 246#else
 247        ch->regs = dev->regs + index * 0x100;
 248#endif
 249        enable_gather_filter(dev, ch);
 250        return 0;
 251}
 252
 253static const struct host1x_channel_ops host1x_channel_ops = {
 254        .init = host1x_channel_init,
 255        .submit = channel_submit,
 256};
 257