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2
3
4#ifndef _ICE_TXRX_H_
5#define _ICE_TXRX_H_
6
7#define ICE_DFLT_IRQ_WORK 256
8#define ICE_RXBUF_2048 2048
9#define ICE_MAX_CHAINED_RX_BUFS 5
10#define ICE_MAX_BUF_TXD 8
11#define ICE_MIN_TX_LEN 17
12
13
14
15
16
17#define ICE_MAX_READ_REQ_SIZE 4096
18#define ICE_MAX_DATA_PER_TXD (16 * 1024 - 1)
19#define ICE_MAX_DATA_PER_TXD_ALIGNED \
20 (~(ICE_MAX_READ_REQ_SIZE - 1) & ICE_MAX_DATA_PER_TXD)
21
22#define ICE_RX_BUF_WRITE 16
23#define ICE_MAX_TXQ_PER_TXQG 128
24
25
26
27
28
29
30
31
32#define ICE_CACHE_LINE_BYTES 64
33#define ICE_DESCS_PER_CACHE_LINE (ICE_CACHE_LINE_BYTES / \
34 sizeof(struct ice_tx_desc))
35#define ICE_DESCS_FOR_CTX_DESC 1
36#define ICE_DESCS_FOR_SKB_DATA_PTR 1
37
38#define DESC_NEEDED (MAX_SKB_FRAGS + ICE_DESCS_FOR_CTX_DESC + \
39 ICE_DESCS_PER_CACHE_LINE + ICE_DESCS_FOR_SKB_DATA_PTR)
40#define ICE_DESC_UNUSED(R) \
41 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
42 (R)->next_to_clean - (R)->next_to_use - 1)
43
44#define ICE_TX_FLAGS_TSO BIT(0)
45#define ICE_TX_FLAGS_HW_VLAN BIT(1)
46#define ICE_TX_FLAGS_SW_VLAN BIT(2)
47#define ICE_TX_FLAGS_VLAN_M 0xffff0000
48#define ICE_TX_FLAGS_VLAN_S 16
49
50struct ice_tx_buf {
51 struct ice_tx_desc *next_to_watch;
52 struct sk_buff *skb;
53 unsigned int bytecount;
54 unsigned short gso_segs;
55 u32 tx_flags;
56 DEFINE_DMA_UNMAP_ADDR(dma);
57 DEFINE_DMA_UNMAP_LEN(len);
58};
59
60struct ice_tx_offload_params {
61 u8 header_len;
62 u32 td_cmd;
63 u32 td_offset;
64 u32 td_l2tag1;
65 u16 cd_l2tag2;
66 u32 cd_tunnel_params;
67 u64 cd_qw1;
68 struct ice_ring *tx_ring;
69};
70
71struct ice_rx_buf {
72 struct sk_buff *skb;
73 dma_addr_t dma;
74 struct page *page;
75 unsigned int page_offset;
76};
77
78struct ice_q_stats {
79 u64 pkts;
80 u64 bytes;
81};
82
83struct ice_txq_stats {
84 u64 restart_q;
85 u64 tx_busy;
86 u64 tx_linearize;
87 int prev_pkt;
88};
89
90struct ice_rxq_stats {
91 u64 non_eop_descs;
92 u64 alloc_page_failed;
93 u64 alloc_buf_failed;
94 u64 page_reuse_count;
95};
96
97
98
99
100
101
102enum ice_dyn_idx_t {
103 ICE_IDX_ITR0 = 0,
104 ICE_IDX_ITR1 = 1,
105 ICE_IDX_ITR2 = 2,
106 ICE_ITR_NONE = 3
107};
108
109
110enum ice_rx_dtype {
111 ICE_RX_DTYPE_NO_SPLIT = 0,
112 ICE_RX_DTYPE_HEADER_SPLIT = 1,
113 ICE_RX_DTYPE_SPLIT_ALWAYS = 2,
114};
115
116
117#define ICE_RX_ITR ICE_IDX_ITR0
118#define ICE_TX_ITR ICE_IDX_ITR1
119#define ICE_ITR_8K 124
120#define ICE_ITR_20K 50
121#define ICE_ITR_MAX 8160
122#define ICE_DFLT_TX_ITR (ICE_ITR_20K | ICE_ITR_DYNAMIC)
123#define ICE_DFLT_RX_ITR (ICE_ITR_20K | ICE_ITR_DYNAMIC)
124#define ICE_ITR_DYNAMIC 0x8000
125#define ITR_IS_DYNAMIC(setting) (!!((setting) & ICE_ITR_DYNAMIC))
126#define ITR_TO_REG(setting) ((setting) & ~ICE_ITR_DYNAMIC)
127#define ICE_ITR_GRAN_S 1
128#define ICE_ITR_MASK 0x1FFE
129#define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~ICE_ITR_MASK)
130
131#define ICE_DFLT_INTRL 0
132
133
134#define ICE_TX_ADVANCED 0
135#define ICE_TX_LEGACY 1
136
137
138struct ice_ring {
139 struct ice_ring *next;
140 void *desc;
141 struct device *dev;
142 struct net_device *netdev;
143 struct ice_vsi *vsi;
144 struct ice_q_vector *q_vector;
145 u8 __iomem *tail;
146 union {
147 struct ice_tx_buf *tx_buf;
148 struct ice_rx_buf *rx_buf;
149 };
150 u16 q_index;
151 u32 txq_teid;
152
153 u16 count;
154 u16 reg_idx;
155
156
157 u16 next_to_use;
158 u16 next_to_clean;
159
160 u8 ring_active;
161
162
163 struct ice_q_stats stats;
164 struct u64_stats_sync syncp;
165 union {
166 struct ice_txq_stats tx_stats;
167 struct ice_rxq_stats rx_stats;
168 };
169
170 unsigned int size;
171 dma_addr_t dma;
172 struct rcu_head rcu;
173 u16 next_to_alloc;
174} ____cacheline_internodealigned_in_smp;
175
176enum ice_latency_range {
177 ICE_LOWEST_LATENCY = 0,
178 ICE_LOW_LATENCY = 1,
179 ICE_BULK_LATENCY = 2,
180 ICE_ULTRA_LATENCY = 3,
181};
182
183struct ice_ring_container {
184
185 struct ice_ring *ring;
186 unsigned long next_update;
187 unsigned int total_bytes;
188 unsigned int total_pkts;
189 enum ice_latency_range latency_range;
190 int itr_idx;
191 u16 target_itr;
192 u16 current_itr;
193
194
195
196
197 u16 itr_setting;
198};
199
200
201#define ice_for_each_ring(pos, head) \
202 for (pos = (head).ring; pos; pos = pos->next)
203
204bool ice_alloc_rx_bufs(struct ice_ring *rxr, u16 cleaned_count);
205netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev);
206void ice_clean_tx_ring(struct ice_ring *tx_ring);
207void ice_clean_rx_ring(struct ice_ring *rx_ring);
208int ice_setup_tx_ring(struct ice_ring *tx_ring);
209int ice_setup_rx_ring(struct ice_ring *rx_ring);
210void ice_free_tx_ring(struct ice_ring *tx_ring);
211void ice_free_rx_ring(struct ice_ring *rx_ring);
212int ice_napi_poll(struct napi_struct *napi, int budget);
213
214#endif
215