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6#ifndef WCN3990_QMI_SVC_V01_H
7#define WCN3990_QMI_SVC_V01_H
8
9#define WLFW_SERVICE_ID_V01 0x45
10#define WLFW_SERVICE_VERS_V01 0x01
11
12#define QMI_WLFW_BDF_DOWNLOAD_REQ_V01 0x0025
13#define QMI_WLFW_MEM_READY_IND_V01 0x0037
14#define QMI_WLFW_DYNAMIC_FEATURE_MASK_RESP_V01 0x003B
15#define QMI_WLFW_INITIATE_CAL_UPDATE_IND_V01 0x002A
16#define QMI_WLFW_HOST_CAP_REQ_V01 0x0034
17#define QMI_WLFW_M3_INFO_REQ_V01 0x003C
18#define QMI_WLFW_CAP_REQ_V01 0x0024
19#define QMI_WLFW_FW_INIT_DONE_IND_V01 0x0038
20#define QMI_WLFW_CAL_REPORT_REQ_V01 0x0026
21#define QMI_WLFW_M3_INFO_RESP_V01 0x003C
22#define QMI_WLFW_CAL_UPDATE_RESP_V01 0x0029
23#define QMI_WLFW_CAL_DOWNLOAD_RESP_V01 0x0027
24#define QMI_WLFW_XO_CAL_IND_V01 0x003D
25#define QMI_WLFW_INI_RESP_V01 0x002F
26#define QMI_WLFW_CAL_REPORT_RESP_V01 0x0026
27#define QMI_WLFW_MAC_ADDR_RESP_V01 0x0033
28#define QMI_WLFW_INITIATE_CAL_DOWNLOAD_IND_V01 0x0028
29#define QMI_WLFW_HOST_CAP_RESP_V01 0x0034
30#define QMI_WLFW_MSA_READY_IND_V01 0x002B
31#define QMI_WLFW_ATHDIAG_WRITE_RESP_V01 0x0031
32#define QMI_WLFW_WLAN_MODE_REQ_V01 0x0022
33#define QMI_WLFW_IND_REGISTER_REQ_V01 0x0020
34#define QMI_WLFW_WLAN_CFG_RESP_V01 0x0023
35#define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035
36#define QMI_WLFW_REJUVENATE_IND_V01 0x0039
37#define QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01 0x003B
38#define QMI_WLFW_ATHDIAG_WRITE_REQ_V01 0x0031
39#define QMI_WLFW_WLAN_MODE_RESP_V01 0x0022
40#define QMI_WLFW_RESPOND_MEM_REQ_V01 0x0036
41#define QMI_WLFW_PIN_CONNECT_RESULT_IND_V01 0x002C
42#define QMI_WLFW_FW_READY_IND_V01 0x0021
43#define QMI_WLFW_MSA_READY_RESP_V01 0x002E
44#define QMI_WLFW_CAL_UPDATE_REQ_V01 0x0029
45#define QMI_WLFW_INI_REQ_V01 0x002F
46#define QMI_WLFW_BDF_DOWNLOAD_RESP_V01 0x0025
47#define QMI_WLFW_REJUVENATE_ACK_RESP_V01 0x003A
48#define QMI_WLFW_MSA_INFO_RESP_V01 0x002D
49#define QMI_WLFW_MSA_READY_REQ_V01 0x002E
50#define QMI_WLFW_CAP_RESP_V01 0x0024
51#define QMI_WLFW_REJUVENATE_ACK_REQ_V01 0x003A
52#define QMI_WLFW_ATHDIAG_READ_RESP_V01 0x0030
53#define QMI_WLFW_VBATT_REQ_V01 0x0032
54#define QMI_WLFW_MAC_ADDR_REQ_V01 0x0033
55#define QMI_WLFW_RESPOND_MEM_RESP_V01 0x0036
56#define QMI_WLFW_VBATT_RESP_V01 0x0032
57#define QMI_WLFW_MSA_INFO_REQ_V01 0x002D
58#define QMI_WLFW_CAL_DOWNLOAD_REQ_V01 0x0027
59#define QMI_WLFW_ATHDIAG_READ_REQ_V01 0x0030
60#define QMI_WLFW_WLAN_CFG_REQ_V01 0x0023
61#define QMI_WLFW_IND_REGISTER_RESP_V01 0x0020
62
63#define QMI_WLFW_MAX_MEM_REG_V01 2
64#define QMI_WLFW_MAX_NUM_MEM_SEG_V01 16
65#define QMI_WLFW_MAX_NUM_CAL_V01 5
66#define QMI_WLFW_MAX_DATA_SIZE_V01 6144
67#define QMI_WLFW_FUNCTION_NAME_LEN_V01 128
68#define QMI_WLFW_MAX_NUM_CE_V01 12
69#define QMI_WLFW_MAX_TIMESTAMP_LEN_V01 32
70#define QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01 6144
71#define QMI_WLFW_MAX_NUM_GPIO_V01 32
72#define QMI_WLFW_MAX_BUILD_ID_LEN_V01 128
73#define QMI_WLFW_MAX_NUM_MEM_CFG_V01 2
74#define QMI_WLFW_MAX_STR_LEN_V01 16
75#define QMI_WLFW_MAX_NUM_SHADOW_REG_V01 24
76#define QMI_WLFW_MAC_ADDR_SIZE_V01 6
77#define QMI_WLFW_MAX_SHADOW_REG_V2 36
78#define QMI_WLFW_MAX_NUM_SVC_V01 24
79
80enum wlfw_driver_mode_enum_v01 {
81 QMI_WLFW_MISSION_V01 = 0,
82 QMI_WLFW_FTM_V01 = 1,
83 QMI_WLFW_EPPING_V01 = 2,
84 QMI_WLFW_WALTEST_V01 = 3,
85 QMI_WLFW_OFF_V01 = 4,
86 QMI_WLFW_CCPM_V01 = 5,
87 QMI_WLFW_QVIT_V01 = 6,
88 QMI_WLFW_CALIBRATION_V01 = 7,
89};
90
91enum wlfw_cal_temp_id_enum_v01 {
92 QMI_WLFW_CAL_TEMP_IDX_0_V01 = 0,
93 QMI_WLFW_CAL_TEMP_IDX_1_V01 = 1,
94 QMI_WLFW_CAL_TEMP_IDX_2_V01 = 2,
95 QMI_WLFW_CAL_TEMP_IDX_3_V01 = 3,
96 QMI_WLFW_CAL_TEMP_IDX_4_V01 = 4,
97};
98
99enum wlfw_pipedir_enum_v01 {
100 QMI_WLFW_PIPEDIR_NONE_V01 = 0,
101 QMI_WLFW_PIPEDIR_IN_V01 = 1,
102 QMI_WLFW_PIPEDIR_OUT_V01 = 2,
103 QMI_WLFW_PIPEDIR_INOUT_V01 = 3,
104};
105
106enum wlfw_mem_type_enum_v01 {
107 QMI_WLFW_MEM_TYPE_MSA_V01 = 0,
108 QMI_WLFW_MEM_TYPE_DDR_V01 = 1,
109};
110
111#define QMI_WLFW_CE_ATTR_FLAGS_V01 ((u32)0x00)
112#define QMI_WLFW_CE_ATTR_NO_SNOOP_V01 ((u32)0x01)
113#define QMI_WLFW_CE_ATTR_BYTE_SWAP_DATA_V01 ((u32)0x02)
114#define QMI_WLFW_CE_ATTR_SWIZZLE_DESCRIPTORS_V01 ((u32)0x04)
115#define QMI_WLFW_CE_ATTR_DISABLE_INTR_V01 ((u32)0x08)
116#define QMI_WLFW_CE_ATTR_ENABLE_POLL_V01 ((u32)0x10)
117
118#define QMI_WLFW_ALREADY_REGISTERED_V01 ((u64)0x01ULL)
119#define QMI_WLFW_FW_READY_V01 ((u64)0x02ULL)
120#define QMI_WLFW_MSA_READY_V01 ((u64)0x04ULL)
121#define QMI_WLFW_MEM_READY_V01 ((u64)0x08ULL)
122#define QMI_WLFW_FW_INIT_DONE_V01 ((u64)0x10ULL)
123
124#define QMI_WLFW_FW_REJUVENATE_V01 ((u64)0x01ULL)
125
126struct wlfw_ce_tgt_pipe_cfg_s_v01 {
127 __le32 pipe_num;
128 __le32 pipe_dir;
129 __le32 nentries;
130 __le32 nbytes_max;
131 __le32 flags;
132};
133
134struct wlfw_ce_svc_pipe_cfg_s_v01 {
135 __le32 service_id;
136 __le32 pipe_dir;
137 __le32 pipe_num;
138};
139
140struct wlfw_shadow_reg_cfg_s_v01 {
141 u16 id;
142 u16 offset;
143};
144
145struct wlfw_shadow_reg_v2_cfg_s_v01 {
146 u32 addr;
147};
148
149struct wlfw_memory_region_info_s_v01 {
150 u64 region_addr;
151 u32 size;
152 u8 secure_flag;
153};
154
155struct wlfw_mem_cfg_s_v01 {
156 u64 offset;
157 u32 size;
158 u8 secure_flag;
159};
160
161struct wlfw_mem_seg_s_v01 {
162 u32 size;
163 enum wlfw_mem_type_enum_v01 type;
164 u32 mem_cfg_len;
165 struct wlfw_mem_cfg_s_v01 mem_cfg[QMI_WLFW_MAX_NUM_MEM_CFG_V01];
166};
167
168struct wlfw_mem_seg_resp_s_v01 {
169 u64 addr;
170 u32 size;
171 enum wlfw_mem_type_enum_v01 type;
172};
173
174struct wlfw_rf_chip_info_s_v01 {
175 u32 chip_id;
176 u32 chip_family;
177};
178
179struct wlfw_rf_board_info_s_v01 {
180 u32 board_id;
181};
182
183struct wlfw_soc_info_s_v01 {
184 u32 soc_id;
185};
186
187struct wlfw_fw_version_info_s_v01 {
188 u32 fw_version;
189 char fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN_V01 + 1];
190};
191
192struct wlfw_ind_register_req_msg_v01 {
193 u8 fw_ready_enable_valid;
194 u8 fw_ready_enable;
195 u8 initiate_cal_download_enable_valid;
196 u8 initiate_cal_download_enable;
197 u8 initiate_cal_update_enable_valid;
198 u8 initiate_cal_update_enable;
199 u8 msa_ready_enable_valid;
200 u8 msa_ready_enable;
201 u8 pin_connect_result_enable_valid;
202 u8 pin_connect_result_enable;
203 u8 client_id_valid;
204 u32 client_id;
205 u8 request_mem_enable_valid;
206 u8 request_mem_enable;
207 u8 mem_ready_enable_valid;
208 u8 mem_ready_enable;
209 u8 fw_init_done_enable_valid;
210 u8 fw_init_done_enable;
211 u8 rejuvenate_enable_valid;
212 u32 rejuvenate_enable;
213 u8 xo_cal_enable_valid;
214 u8 xo_cal_enable;
215};
216
217#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 50
218extern struct qmi_elem_info wlfw_ind_register_req_msg_v01_ei[];
219
220struct wlfw_ind_register_resp_msg_v01 {
221 struct qmi_response_type_v01 resp;
222 u8 fw_status_valid;
223 u64 fw_status;
224};
225
226#define WLFW_IND_REGISTER_RESP_MSG_V01_MAX_MSG_LEN 18
227extern struct qmi_elem_info wlfw_ind_register_resp_msg_v01_ei[];
228
229struct wlfw_fw_ready_ind_msg_v01 {
230 char placeholder;
231};
232
233#define WLFW_FW_READY_IND_MSG_V01_MAX_MSG_LEN 0
234extern struct qmi_elem_info wlfw_fw_ready_ind_msg_v01_ei[];
235
236struct wlfw_msa_ready_ind_msg_v01 {
237 char placeholder;
238};
239
240#define WLFW_MSA_READY_IND_MSG_V01_MAX_MSG_LEN 0
241extern struct qmi_elem_info wlfw_msa_ready_ind_msg_v01_ei[];
242
243struct wlfw_pin_connect_result_ind_msg_v01 {
244 u8 pwr_pin_result_valid;
245 u32 pwr_pin_result;
246 u8 phy_io_pin_result_valid;
247 u32 phy_io_pin_result;
248 u8 rf_pin_result_valid;
249 u32 rf_pin_result;
250};
251
252#define WLFW_PIN_CONNECT_RESULT_IND_MSG_V01_MAX_MSG_LEN 21
253extern struct qmi_elem_info wlfw_pin_connect_result_ind_msg_v01_ei[];
254
255struct wlfw_wlan_mode_req_msg_v01 {
256 enum wlfw_driver_mode_enum_v01 mode;
257 u8 hw_debug_valid;
258 u8 hw_debug;
259};
260
261#define WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN 11
262extern struct qmi_elem_info wlfw_wlan_mode_req_msg_v01_ei[];
263
264struct wlfw_wlan_mode_resp_msg_v01 {
265 struct qmi_response_type_v01 resp;
266};
267
268#define WLFW_WLAN_MODE_RESP_MSG_V01_MAX_MSG_LEN 7
269extern struct qmi_elem_info wlfw_wlan_mode_resp_msg_v01_ei[];
270
271struct wlfw_wlan_cfg_req_msg_v01 {
272 u8 host_version_valid;
273 char host_version[QMI_WLFW_MAX_STR_LEN_V01 + 1];
274 u8 tgt_cfg_valid;
275 u32 tgt_cfg_len;
276 struct wlfw_ce_tgt_pipe_cfg_s_v01 tgt_cfg[QMI_WLFW_MAX_NUM_CE_V01];
277 u8 svc_cfg_valid;
278 u32 svc_cfg_len;
279 struct wlfw_ce_svc_pipe_cfg_s_v01 svc_cfg[QMI_WLFW_MAX_NUM_SVC_V01];
280 u8 shadow_reg_valid;
281 u32 shadow_reg_len;
282 struct wlfw_shadow_reg_cfg_s_v01 shadow_reg[QMI_WLFW_MAX_NUM_SHADOW_REG_V01];
283 u8 shadow_reg_v2_valid;
284 u32 shadow_reg_v2_len;
285 struct wlfw_shadow_reg_v2_cfg_s_v01 shadow_reg_v2[QMI_WLFW_MAX_SHADOW_REG_V2];
286};
287
288#define WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN 803
289extern struct qmi_elem_info wlfw_wlan_cfg_req_msg_v01_ei[];
290
291struct wlfw_wlan_cfg_resp_msg_v01 {
292 struct qmi_response_type_v01 resp;
293};
294
295#define WLFW_WLAN_CFG_RESP_MSG_V01_MAX_MSG_LEN 7
296extern struct qmi_elem_info wlfw_wlan_cfg_resp_msg_v01_ei[];
297
298struct wlfw_cap_req_msg_v01 {
299 char placeholder;
300};
301
302#define WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN 0
303extern struct qmi_elem_info wlfw_cap_req_msg_v01_ei[];
304
305struct wlfw_cap_resp_msg_v01 {
306 struct qmi_response_type_v01 resp;
307 u8 chip_info_valid;
308 struct wlfw_rf_chip_info_s_v01 chip_info;
309 u8 board_info_valid;
310 struct wlfw_rf_board_info_s_v01 board_info;
311 u8 soc_info_valid;
312 struct wlfw_soc_info_s_v01 soc_info;
313 u8 fw_version_info_valid;
314 struct wlfw_fw_version_info_s_v01 fw_version_info;
315 u8 fw_build_id_valid;
316 char fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN_V01 + 1];
317 u8 num_macs_valid;
318 u8 num_macs;
319};
320
321#define WLFW_CAP_RESP_MSG_V01_MAX_MSG_LEN 207
322extern struct qmi_elem_info wlfw_cap_resp_msg_v01_ei[];
323
324struct wlfw_bdf_download_req_msg_v01 {
325 u8 valid;
326 u8 file_id_valid;
327 enum wlfw_cal_temp_id_enum_v01 file_id;
328 u8 total_size_valid;
329 u32 total_size;
330 u8 seg_id_valid;
331 u32 seg_id;
332 u8 data_valid;
333 u32 data_len;
334 u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
335 u8 end_valid;
336 u8 end;
337 u8 bdf_type_valid;
338 u8 bdf_type;
339};
340
341#define WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6182
342extern struct qmi_elem_info wlfw_bdf_download_req_msg_v01_ei[];
343
344struct wlfw_bdf_download_resp_msg_v01 {
345 struct qmi_response_type_v01 resp;
346};
347
348#define WLFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7
349extern struct qmi_elem_info wlfw_bdf_download_resp_msg_v01_ei[];
350
351struct wlfw_cal_report_req_msg_v01 {
352 u32 meta_data_len;
353 enum wlfw_cal_temp_id_enum_v01 meta_data[QMI_WLFW_MAX_NUM_CAL_V01];
354 u8 xo_cal_data_valid;
355 u8 xo_cal_data;
356};
357
358#define WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN 28
359extern struct qmi_elem_info wlfw_cal_report_req_msg_v01_ei[];
360
361struct wlfw_cal_report_resp_msg_v01 {
362 struct qmi_response_type_v01 resp;
363};
364
365#define WLFW_CAL_REPORT_RESP_MSG_V01_MAX_MSG_LEN 7
366extern struct qmi_elem_info wlfw_cal_report_resp_msg_v01_ei[];
367
368struct wlfw_initiate_cal_download_ind_msg_v01 {
369 enum wlfw_cal_temp_id_enum_v01 cal_id;
370};
371
372#define WLFW_INITIATE_CAL_DOWNLOAD_IND_MSG_V01_MAX_MSG_LEN 7
373extern struct qmi_elem_info wlfw_initiate_cal_download_ind_msg_v01_ei[];
374
375struct wlfw_cal_download_req_msg_v01 {
376 u8 valid;
377 u8 file_id_valid;
378 enum wlfw_cal_temp_id_enum_v01 file_id;
379 u8 total_size_valid;
380 u32 total_size;
381 u8 seg_id_valid;
382 u32 seg_id;
383 u8 data_valid;
384 u32 data_len;
385 u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
386 u8 end_valid;
387 u8 end;
388};
389
390#define WLFW_CAL_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6178
391extern struct qmi_elem_info wlfw_cal_download_req_msg_v01_ei[];
392
393struct wlfw_cal_download_resp_msg_v01 {
394 struct qmi_response_type_v01 resp;
395};
396
397#define WLFW_CAL_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7
398extern struct qmi_elem_info wlfw_cal_download_resp_msg_v01_ei[];
399
400struct wlfw_initiate_cal_update_ind_msg_v01 {
401 enum wlfw_cal_temp_id_enum_v01 cal_id;
402 u32 total_size;
403};
404
405#define WLFW_INITIATE_CAL_UPDATE_IND_MSG_V01_MAX_MSG_LEN 14
406extern struct qmi_elem_info wlfw_initiate_cal_update_ind_msg_v01_ei[];
407
408struct wlfw_cal_update_req_msg_v01 {
409 enum wlfw_cal_temp_id_enum_v01 cal_id;
410 u32 seg_id;
411};
412
413#define WLFW_CAL_UPDATE_REQ_MSG_V01_MAX_MSG_LEN 14
414extern struct qmi_elem_info wlfw_cal_update_req_msg_v01_ei[];
415
416struct wlfw_cal_update_resp_msg_v01 {
417 struct qmi_response_type_v01 resp;
418 u8 file_id_valid;
419 enum wlfw_cal_temp_id_enum_v01 file_id;
420 u8 total_size_valid;
421 u32 total_size;
422 u8 seg_id_valid;
423 u32 seg_id;
424 u8 data_valid;
425 u32 data_len;
426 u8 data[QMI_WLFW_MAX_DATA_SIZE_V01];
427 u8 end_valid;
428 u8 end;
429};
430
431#define WLFW_CAL_UPDATE_RESP_MSG_V01_MAX_MSG_LEN 6181
432extern struct qmi_elem_info wlfw_cal_update_resp_msg_v01_ei[];
433
434struct wlfw_msa_info_req_msg_v01 {
435 u64 msa_addr;
436 u32 size;
437};
438
439#define WLFW_MSA_INFO_REQ_MSG_V01_MAX_MSG_LEN 18
440extern struct qmi_elem_info wlfw_msa_info_req_msg_v01_ei[];
441
442struct wlfw_msa_info_resp_msg_v01 {
443 struct qmi_response_type_v01 resp;
444 u32 mem_region_info_len;
445 struct wlfw_memory_region_info_s_v01 mem_region_info[QMI_WLFW_MAX_MEM_REG_V01];
446};
447
448#define WLFW_MSA_INFO_RESP_MSG_V01_MAX_MSG_LEN 37
449extern struct qmi_elem_info wlfw_msa_info_resp_msg_v01_ei[];
450
451struct wlfw_msa_ready_req_msg_v01 {
452 char placeholder;
453};
454
455#define WLFW_MSA_READY_REQ_MSG_V01_MAX_MSG_LEN 0
456extern struct qmi_elem_info wlfw_msa_ready_req_msg_v01_ei[];
457
458struct wlfw_msa_ready_resp_msg_v01 {
459 struct qmi_response_type_v01 resp;
460};
461
462#define WLFW_MSA_READY_RESP_MSG_V01_MAX_MSG_LEN 7
463extern struct qmi_elem_info wlfw_msa_ready_resp_msg_v01_ei[];
464
465struct wlfw_ini_req_msg_v01 {
466 u8 enablefwlog_valid;
467 u8 enablefwlog;
468};
469
470#define WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN 4
471extern struct qmi_elem_info wlfw_ini_req_msg_v01_ei[];
472
473struct wlfw_ini_resp_msg_v01 {
474 struct qmi_response_type_v01 resp;
475};
476
477#define WLFW_INI_RESP_MSG_V01_MAX_MSG_LEN 7
478extern struct qmi_elem_info wlfw_ini_resp_msg_v01_ei[];
479
480struct wlfw_athdiag_read_req_msg_v01 {
481 u32 offset;
482 u32 mem_type;
483 u32 data_len;
484};
485
486#define WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN 21
487extern struct qmi_elem_info wlfw_athdiag_read_req_msg_v01_ei[];
488
489struct wlfw_athdiag_read_resp_msg_v01 {
490 struct qmi_response_type_v01 resp;
491 u8 data_valid;
492 u32 data_len;
493 u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01];
494};
495
496#define WLFW_ATHDIAG_READ_RESP_MSG_V01_MAX_MSG_LEN 6156
497extern struct qmi_elem_info wlfw_athdiag_read_resp_msg_v01_ei[];
498
499struct wlfw_athdiag_write_req_msg_v01 {
500 u32 offset;
501 u32 mem_type;
502 u32 data_len;
503 u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01];
504};
505
506#define WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN 6163
507extern struct qmi_elem_info wlfw_athdiag_write_req_msg_v01_ei[];
508
509struct wlfw_athdiag_write_resp_msg_v01 {
510 struct qmi_response_type_v01 resp;
511};
512
513#define WLFW_ATHDIAG_WRITE_RESP_MSG_V01_MAX_MSG_LEN 7
514extern struct qmi_elem_info wlfw_athdiag_write_resp_msg_v01_ei[];
515
516struct wlfw_vbatt_req_msg_v01 {
517 u64 voltage_uv;
518};
519
520#define WLFW_VBATT_REQ_MSG_V01_MAX_MSG_LEN 11
521extern struct qmi_elem_info wlfw_vbatt_req_msg_v01_ei[];
522
523struct wlfw_vbatt_resp_msg_v01 {
524 struct qmi_response_type_v01 resp;
525};
526
527#define WLFW_VBATT_RESP_MSG_V01_MAX_MSG_LEN 7
528extern struct qmi_elem_info wlfw_vbatt_resp_msg_v01_ei[];
529
530struct wlfw_mac_addr_req_msg_v01 {
531 u8 mac_addr_valid;
532 u8 mac_addr[QMI_WLFW_MAC_ADDR_SIZE_V01];
533};
534
535#define WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN 9
536extern struct qmi_elem_info wlfw_mac_addr_req_msg_v01_ei[];
537
538struct wlfw_mac_addr_resp_msg_v01 {
539 struct qmi_response_type_v01 resp;
540};
541
542#define WLFW_MAC_ADDR_RESP_MSG_V01_MAX_MSG_LEN 7
543extern struct qmi_elem_info wlfw_mac_addr_resp_msg_v01_ei[];
544
545#define QMI_WLFW_MAX_NUM_GPIO_V01 32
546struct wlfw_host_cap_req_msg_v01 {
547 u8 daemon_support_valid;
548 u32 daemon_support;
549 u8 wake_msi_valid;
550 u32 wake_msi;
551 u8 gpios_valid;
552 u32 gpios_len;
553 u32 gpios[QMI_WLFW_MAX_NUM_GPIO_V01];
554 u8 nm_modem_valid;
555 u8 nm_modem;
556 u8 bdf_support_valid;
557 u8 bdf_support;
558 u8 bdf_cache_support_valid;
559 u8 bdf_cache_support;
560 u8 m3_support_valid;
561 u8 m3_support;
562 u8 m3_cache_support_valid;
563 u8 m3_cache_support;
564 u8 cal_filesys_support_valid;
565 u8 cal_filesys_support;
566 u8 cal_cache_support_valid;
567 u8 cal_cache_support;
568 u8 cal_done_valid;
569 u8 cal_done;
570 u8 mem_bucket_valid;
571 u32 mem_bucket;
572 u8 mem_cfg_mode_valid;
573 u8 mem_cfg_mode;
574};
575
576#define WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN 189
577extern struct qmi_elem_info wlfw_host_cap_req_msg_v01_ei[];
578
579struct wlfw_host_cap_resp_msg_v01 {
580 struct qmi_response_type_v01 resp;
581};
582
583#define WLFW_HOST_CAP_RESP_MSG_V01_MAX_MSG_LEN 7
584extern struct qmi_elem_info wlfw_host_cap_resp_msg_v01_ei[];
585
586struct wlfw_request_mem_ind_msg_v01 {
587 u32 mem_seg_len;
588 struct wlfw_mem_seg_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01];
589};
590
591#define WLFW_REQUEST_MEM_IND_MSG_V01_MAX_MSG_LEN 564
592extern struct qmi_elem_info wlfw_request_mem_ind_msg_v01_ei[];
593
594struct wlfw_respond_mem_req_msg_v01 {
595 u32 mem_seg_len;
596 struct wlfw_mem_seg_resp_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01];
597};
598
599#define WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN 260
600extern struct qmi_elem_info wlfw_respond_mem_req_msg_v01_ei[];
601
602struct wlfw_respond_mem_resp_msg_v01 {
603 struct qmi_response_type_v01 resp;
604};
605
606#define WLFW_RESPOND_MEM_RESP_MSG_V01_MAX_MSG_LEN 7
607extern struct qmi_elem_info wlfw_respond_mem_resp_msg_v01_ei[];
608
609struct wlfw_mem_ready_ind_msg_v01 {
610 char placeholder;
611};
612
613#define WLFW_MEM_READY_IND_MSG_V01_MAX_MSG_LEN 0
614extern struct qmi_elem_info wlfw_mem_ready_ind_msg_v01_ei[];
615
616struct wlfw_fw_init_done_ind_msg_v01 {
617 char placeholder;
618};
619
620#define WLFW_FW_INIT_DONE_IND_MSG_V01_MAX_MSG_LEN 0
621extern struct qmi_elem_info wlfw_fw_init_done_ind_msg_v01_ei[];
622
623struct wlfw_rejuvenate_ind_msg_v01 {
624 u8 cause_for_rejuvenation_valid;
625 u8 cause_for_rejuvenation;
626 u8 requesting_sub_system_valid;
627 u8 requesting_sub_system;
628 u8 line_number_valid;
629 u16 line_number;
630 u8 function_name_valid;
631 char function_name[QMI_WLFW_FUNCTION_NAME_LEN_V01 + 1];
632};
633
634#define WLFW_REJUVENATE_IND_MSG_V01_MAX_MSG_LEN 144
635extern struct qmi_elem_info wlfw_rejuvenate_ind_msg_v01_ei[];
636
637struct wlfw_rejuvenate_ack_req_msg_v01 {
638 char placeholder;
639};
640
641#define WLFW_REJUVENATE_ACK_REQ_MSG_V01_MAX_MSG_LEN 0
642extern struct qmi_elem_info wlfw_rejuvenate_ack_req_msg_v01_ei[];
643
644struct wlfw_rejuvenate_ack_resp_msg_v01 {
645 struct qmi_response_type_v01 resp;
646};
647
648#define WLFW_REJUVENATE_ACK_RESP_MSG_V01_MAX_MSG_LEN 7
649extern struct qmi_elem_info wlfw_rejuvenate_ack_resp_msg_v01_ei[];
650
651struct wlfw_dynamic_feature_mask_req_msg_v01 {
652 u8 mask_valid;
653 u64 mask;
654};
655
656#define WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN 11
657extern struct qmi_elem_info wlfw_dynamic_feature_mask_req_msg_v01_ei[];
658
659struct wlfw_dynamic_feature_mask_resp_msg_v01 {
660 struct qmi_response_type_v01 resp;
661 u8 prev_mask_valid;
662 u64 prev_mask;
663 u8 curr_mask_valid;
664 u64 curr_mask;
665};
666
667#define WLFW_DYNAMIC_FEATURE_MASK_RESP_MSG_V01_MAX_MSG_LEN 29
668extern struct qmi_elem_info wlfw_dynamic_feature_mask_resp_msg_v01_ei[];
669
670struct wlfw_m3_info_req_msg_v01 {
671 u64 addr;
672 u32 size;
673};
674
675#define WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18
676extern struct qmi_elem_info wlfw_m3_info_req_msg_v01_ei[];
677
678struct wlfw_m3_info_resp_msg_v01 {
679 struct qmi_response_type_v01 resp;
680};
681
682#define WLFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7
683extern struct qmi_elem_info wlfw_m3_info_resp_msg_v01_ei[];
684
685struct wlfw_xo_cal_ind_msg_v01 {
686 u8 xo_cal_data;
687};
688
689#define WLFW_XO_CAL_IND_MSG_V01_MAX_MSG_LEN 4
690extern struct qmi_elem_info wlfw_xo_cal_ind_msg_v01_ei[];
691
692#endif
693
