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24#include <linux/dma-mapping.h>
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/slab.h>
28
29#include "rt2x00.h"
30#include "rt2x00mmio.h"
31
32
33
34
35int rt2x00mmio_regbusy_read(struct rt2x00_dev *rt2x00dev,
36 const unsigned int offset,
37 const struct rt2x00_field32 field,
38 u32 *reg)
39{
40 unsigned int i;
41
42 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
43 return 0;
44
45 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
46 *reg = rt2x00mmio_register_read(rt2x00dev, offset);
47 if (!rt2x00_get_field32(*reg, field))
48 return 1;
49 udelay(REGISTER_BUSY_DELAY);
50 }
51
52 printk_once(KERN_ERR "%s() Indirect register access failed: "
53 "offset=0x%.08x, value=0x%.08x\n", __func__, offset, *reg);
54 *reg = ~0;
55
56 return 0;
57}
58EXPORT_SYMBOL_GPL(rt2x00mmio_regbusy_read);
59
60bool rt2x00mmio_rxdone(struct rt2x00_dev *rt2x00dev)
61{
62 struct data_queue *queue = rt2x00dev->rx;
63 struct queue_entry *entry;
64 struct queue_entry_priv_mmio *entry_priv;
65 struct skb_frame_desc *skbdesc;
66 int max_rx = 16;
67
68 while (--max_rx) {
69 entry = rt2x00queue_get_entry(queue, Q_INDEX);
70 entry_priv = entry->priv_data;
71
72 if (rt2x00dev->ops->lib->get_entry_state(entry))
73 break;
74
75
76
77
78 skbdesc = get_skb_frame_desc(entry->skb);
79 skbdesc->desc = entry_priv->desc;
80 skbdesc->desc_len = entry->queue->desc_size;
81
82
83
84
85
86 rt2x00lib_dmastart(entry);
87 rt2x00lib_dmadone(entry);
88
89
90
91
92 rt2x00lib_rxdone(entry, GFP_ATOMIC);
93 }
94
95 return !max_rx;
96}
97EXPORT_SYMBOL_GPL(rt2x00mmio_rxdone);
98
99void rt2x00mmio_flush_queue(struct data_queue *queue, bool drop)
100{
101 unsigned int i;
102
103 for (i = 0; !rt2x00queue_empty(queue) && i < 10; i++)
104 msleep(50);
105}
106EXPORT_SYMBOL_GPL(rt2x00mmio_flush_queue);
107
108
109
110
111static int rt2x00mmio_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
112 struct data_queue *queue)
113{
114 struct queue_entry_priv_mmio *entry_priv;
115 void *addr;
116 dma_addr_t dma;
117 unsigned int i;
118
119
120
121
122 addr = dma_alloc_coherent(rt2x00dev->dev,
123 queue->limit * queue->desc_size, &dma,
124 GFP_KERNEL);
125 if (!addr)
126 return -ENOMEM;
127
128
129
130
131 for (i = 0; i < queue->limit; i++) {
132 entry_priv = queue->entries[i].priv_data;
133 entry_priv->desc = addr + i * queue->desc_size;
134 entry_priv->desc_dma = dma + i * queue->desc_size;
135 }
136
137 return 0;
138}
139
140static void rt2x00mmio_free_queue_dma(struct rt2x00_dev *rt2x00dev,
141 struct data_queue *queue)
142{
143 struct queue_entry_priv_mmio *entry_priv =
144 queue->entries[0].priv_data;
145
146 if (entry_priv->desc)
147 dma_free_coherent(rt2x00dev->dev,
148 queue->limit * queue->desc_size,
149 entry_priv->desc, entry_priv->desc_dma);
150 entry_priv->desc = NULL;
151}
152
153int rt2x00mmio_initialize(struct rt2x00_dev *rt2x00dev)
154{
155 struct data_queue *queue;
156 int status;
157
158
159
160
161 queue_for_each(rt2x00dev, queue) {
162 status = rt2x00mmio_alloc_queue_dma(rt2x00dev, queue);
163 if (status)
164 goto exit;
165 }
166
167
168
169
170 status = request_irq(rt2x00dev->irq,
171 rt2x00dev->ops->lib->irq_handler,
172 IRQF_SHARED, rt2x00dev->name, rt2x00dev);
173 if (status) {
174 rt2x00_err(rt2x00dev, "IRQ %d allocation failed (error %d)\n",
175 rt2x00dev->irq, status);
176 goto exit;
177 }
178
179 return 0;
180
181exit:
182 queue_for_each(rt2x00dev, queue)
183 rt2x00mmio_free_queue_dma(rt2x00dev, queue);
184
185 return status;
186}
187EXPORT_SYMBOL_GPL(rt2x00mmio_initialize);
188
189void rt2x00mmio_uninitialize(struct rt2x00_dev *rt2x00dev)
190{
191 struct data_queue *queue;
192
193
194
195
196 free_irq(rt2x00dev->irq, rt2x00dev);
197
198
199
200
201 queue_for_each(rt2x00dev, queue)
202 rt2x00mmio_free_queue_dma(rt2x00dev, queue);
203}
204EXPORT_SYMBOL_GPL(rt2x00mmio_uninitialize);
205
206
207
208
209MODULE_AUTHOR(DRV_PROJECT);
210MODULE_VERSION(DRV_VERSION);
211MODULE_DESCRIPTION("rt2x00 mmio library");
212MODULE_LICENSE("GPL");
213