1
2
3
4#include "../wifi.h"
5#include "../pci.h"
6#include "../base.h"
7#include "../stats.h"
8#include "reg.h"
9#include "def.h"
10#include "phy.h"
11#include "trx.h"
12#include "led.h"
13
14static u8 _rtl8723e_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
15{
16 __le16 fc = rtl_get_fc(skb);
17
18 if (unlikely(ieee80211_is_beacon(fc)))
19 return QSLT_BEACON;
20 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
21 return QSLT_MGNT;
22
23 return skb->priority;
24}
25
26static void _rtl8723e_query_rxphystatus(struct ieee80211_hw *hw,
27 struct rtl_stats *pstatus, u8 *pdesc,
28 struct rx_fwinfo_8723e *p_drvinfo,
29 bool bpacket_match_bssid,
30 bool bpacket_toself, bool packet_beacon)
31{
32 struct rtl_priv *rtlpriv = rtl_priv(hw);
33 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
34 struct phy_sts_cck_8723e_t *cck_buf;
35 s8 rx_pwr_all = 0, rx_pwr[4];
36 u8 rf_rx_num = 0, evm, pwdb_all;
37 u8 i, max_spatial_stream;
38 u32 rssi, total_rssi = 0;
39 bool is_cck = pstatus->is_cck;
40
41
42 pstatus->packet_matchbssid = bpacket_match_bssid;
43 pstatus->packet_toself = bpacket_toself;
44 pstatus->packet_beacon = packet_beacon;
45 pstatus->rx_mimo_signalquality[0] = -1;
46 pstatus->rx_mimo_signalquality[1] = -1;
47
48 if (is_cck) {
49 u8 report, cck_highpwr;
50
51
52 cck_buf = (struct phy_sts_cck_8723e_t *)p_drvinfo;
53
54
55
56
57
58 if (ppsc->rfpwr_state == ERFON)
59 cck_highpwr = (u8)rtl_get_bbreg(hw,
60 RFPGA0_XA_HSSIPARAMETER2,
61 BIT(9));
62 else
63 cck_highpwr = false;
64
65 if (!cck_highpwr) {
66 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
67 report = cck_buf->cck_agc_rpt & 0xc0;
68 report = report >> 6;
69 switch (report) {
70 case 0x3:
71 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
72 break;
73 case 0x2:
74 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
75 break;
76 case 0x1:
77 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
78 break;
79 case 0x0:
80 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
81 break;
82 }
83 } else {
84 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
85 report = p_drvinfo->cfosho[0] & 0x60;
86 report = report >> 5;
87 switch (report) {
88 case 0x3:
89 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
90 break;
91 case 0x2:
92 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
93 break;
94 case 0x1:
95 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
96 break;
97 case 0x0:
98 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
99 break;
100 }
101 }
102
103 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
104
105
106
107
108 pwdb_all += 6;
109 if (pwdb_all > 100)
110 pwdb_all = 100;
111
112
113
114 if (pwdb_all > 34 && pwdb_all <= 42)
115 pwdb_all -= 2;
116 else if (pwdb_all > 26 && pwdb_all <= 34)
117 pwdb_all -= 6;
118 else if (pwdb_all > 14 && pwdb_all <= 26)
119 pwdb_all -= 8;
120 else if (pwdb_all > 4 && pwdb_all <= 14)
121 pwdb_all -= 4;
122
123 pstatus->rx_pwdb_all = pwdb_all;
124 pstatus->recvsignalpower = rx_pwr_all;
125
126
127 if (bpacket_match_bssid) {
128 u8 sq;
129
130 if (pstatus->rx_pwdb_all > 40)
131 sq = 100;
132 else {
133 sq = cck_buf->sq_rpt;
134 if (sq > 64)
135 sq = 0;
136 else if (sq < 20)
137 sq = 100;
138 else
139 sq = ((64 - sq) * 100) / 44;
140 }
141
142 pstatus->signalquality = sq;
143 pstatus->rx_mimo_signalquality[0] = sq;
144 pstatus->rx_mimo_signalquality[1] = -1;
145 }
146 } else {
147 rtlpriv->dm.rfpath_rxenable[0] =
148 rtlpriv->dm.rfpath_rxenable[1] = true;
149
150
151 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
152
153
154 if (rtlpriv->dm.rfpath_rxenable[i])
155 rf_rx_num++;
156
157 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
158 0x3f) * 2) - 110;
159
160
161 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
162 total_rssi += rssi;
163
164
165 rtlpriv->stats.rx_snr_db[i] =
166 (long)(p_drvinfo->rxsnr[i] / 2);
167
168
169 if (bpacket_match_bssid)
170 pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
171 }
172
173
174
175
176 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
177
178 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
179 pstatus->rx_pwdb_all = pwdb_all;
180 pstatus->rxpower = rx_pwr_all;
181 pstatus->recvsignalpower = rx_pwr_all;
182
183
184 if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
185 pstatus->rate <= DESC92C_RATEMCS15)
186 max_spatial_stream = 2;
187 else
188 max_spatial_stream = 1;
189
190 for (i = 0; i < max_spatial_stream; i++) {
191 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
192
193 if (bpacket_match_bssid) {
194
195
196
197 if (i == 0)
198 pstatus->signalquality =
199 (u8)(evm & 0xff);
200 pstatus->rx_mimo_signalquality[i] =
201 (u8)(evm & 0xff);
202 }
203 }
204 }
205
206
207
208
209 if (is_cck)
210 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
211 pwdb_all));
212 else if (rf_rx_num != 0)
213 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
214 total_rssi /= rf_rx_num));
215}
216
217static void translate_rx_signal_stuff(struct ieee80211_hw *hw,
218 struct sk_buff *skb,
219 struct rtl_stats *pstatus, u8 *pdesc,
220 struct rx_fwinfo_8723e *p_drvinfo)
221{
222 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
223 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
224 struct ieee80211_hdr *hdr;
225 u8 *tmp_buf;
226 u8 *praddr;
227
228 u16 fc, type;
229 bool packet_matchbssid, packet_toself, packet_beacon;
230
231 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
232
233 hdr = (struct ieee80211_hdr *)tmp_buf;
234 fc = le16_to_cpu(hdr->frame_control);
235 type = WLAN_FC_GET_TYPE(hdr->frame_control);
236 praddr = hdr->addr1;
237
238 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
239 (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
240 hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
241 hdr->addr2 : hdr->addr3)) &&
242 (!pstatus->hwerror) &&
243 (!pstatus->crc) && (!pstatus->icv));
244
245 packet_toself = packet_matchbssid &&
246 (ether_addr_equal(praddr, rtlefuse->dev_addr));
247
248 if (ieee80211_is_beacon(hdr->frame_control))
249 packet_beacon = true;
250 else
251 packet_beacon = false;
252
253 _rtl8723e_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
254 packet_matchbssid, packet_toself,
255 packet_beacon);
256
257 rtl_process_phyinfo(hw, tmp_buf, pstatus);
258}
259
260bool rtl8723e_rx_query_desc(struct ieee80211_hw *hw,
261 struct rtl_stats *status,
262 struct ieee80211_rx_status *rx_status,
263 u8 *pdesc, struct sk_buff *skb)
264{
265 struct rx_fwinfo_8723e *p_drvinfo;
266 struct ieee80211_hdr *hdr;
267 u32 phystatus = GET_RX_DESC_PHYST(pdesc);
268
269 status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
270 status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
271 RX_DRV_INFO_SIZE_UNIT;
272 status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
273 status->icv = (u16)GET_RX_DESC_ICV(pdesc);
274 status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
275 status->hwerror = (status->crc | status->icv);
276 status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
277 status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
278 status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
279 status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
280 status->isfirst_ampdu = (bool)((GET_RX_DESC_PAGGR(pdesc) == 1) &&
281 (GET_RX_DESC_FAGGR(pdesc) == 1));
282 status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
283 status->rx_is40mhzpacket = (bool)GET_RX_DESC_BW(pdesc);
284 status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
285
286 status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
287
288 rx_status->freq = hw->conf.chandef.chan->center_freq;
289 rx_status->band = hw->conf.chandef.chan->band;
290
291 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size
292 + status->rx_bufshift);
293
294 if (status->crc)
295 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
296
297 if (status->rx_is40mhzpacket)
298 rx_status->bw = RATE_INFO_BW_40;
299
300 if (status->is_ht)
301 rx_status->encoding = RX_ENC_HT;
302
303 rx_status->flag |= RX_FLAG_MACTIME_START;
304
305
306
307
308
309
310
311
312
313 if (status->decrypted) {
314 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
315 (ieee80211_has_protected(hdr->frame_control)))
316 rx_status->flag |= RX_FLAG_DECRYPTED;
317 else
318 rx_status->flag &= ~RX_FLAG_DECRYPTED;
319 }
320
321
322
323
324
325
326 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
327 false, status->rate);
328
329 rx_status->mactime = status->timestamp_low;
330 if (phystatus == true) {
331 p_drvinfo = (struct rx_fwinfo_8723e *)(skb->data +
332 status->rx_bufshift);
333
334 translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo);
335 }
336 rx_status->signal = status->recvsignalpower + 10;
337 return true;
338}
339
340void rtl8723e_tx_fill_desc(struct ieee80211_hw *hw,
341 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
342 u8 *txbd, struct ieee80211_tx_info *info,
343 struct ieee80211_sta *sta,
344 struct sk_buff *skb,
345 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
346{
347 struct rtl_priv *rtlpriv = rtl_priv(hw);
348 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
349 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
350 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
351 bool b_defaultadapter = true;
352
353 u8 *pdesc = (u8 *)pdesc_tx;
354 u16 seq_number;
355 __le16 fc = hdr->frame_control;
356 u8 fw_qsel = _rtl8723e_map_hwqueue_to_fwqueue(skb, hw_queue);
357 bool firstseg = ((hdr->seq_ctrl &
358 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
359
360 bool lastseg = ((hdr->frame_control &
361 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
362
363 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
364 skb->data, skb->len,
365 PCI_DMA_TODEVICE);
366 u8 bw_40 = 0;
367
368 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
369 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
370 "DMA mapping error\n");
371 return;
372 }
373 if (mac->opmode == NL80211_IFTYPE_STATION) {
374 bw_40 = mac->bw_40;
375 } else if (mac->opmode == NL80211_IFTYPE_AP ||
376 mac->opmode == NL80211_IFTYPE_ADHOC) {
377 if (sta)
378 bw_40 = sta->ht_cap.cap &
379 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
380 }
381
382 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
383
384 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
385
386 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723e));
387
388 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
389 firstseg = true;
390 lastseg = true;
391 }
392
393 if (firstseg) {
394 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
395
396 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
397
398 if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
399 SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
400
401 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
402 SET_TX_DESC_AGG_BREAK(pdesc, 1);
403 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
404 }
405 SET_TX_DESC_SEQ(pdesc, seq_number);
406
407 SET_TX_DESC_RTS_ENABLE(pdesc,
408 ((ptcb_desc->rts_enable &&
409 !ptcb_desc->cts_enable) ? 1 : 0));
410 SET_TX_DESC_HW_RTS_ENABLE(pdesc,
411 ((ptcb_desc->rts_enable ||
412 ptcb_desc->cts_enable) ? 1 : 0));
413 SET_TX_DESC_CTS2SELF(pdesc,
414 ((ptcb_desc->cts_enable) ? 1 : 0));
415 SET_TX_DESC_RTS_STBC(pdesc,
416 ((ptcb_desc->rts_stbc) ? 1 : 0));
417
418 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
419 SET_TX_DESC_RTS_BW(pdesc, 0);
420 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
421 SET_TX_DESC_RTS_SHORT(pdesc,
422 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
423 (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
424 : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
425
426 if (bw_40) {
427 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
428 SET_TX_DESC_DATA_BW(pdesc, 1);
429 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
430 } else {
431 SET_TX_DESC_DATA_BW(pdesc, 0);
432 SET_TX_DESC_TX_SUB_CARRIER(pdesc,
433 mac->cur_40_prime_sc);
434 }
435 } else {
436 SET_TX_DESC_DATA_BW(pdesc, 0);
437 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
438 }
439
440 SET_TX_DESC_LINIP(pdesc, 0);
441 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
442
443 if (sta) {
444 u8 ampdu_density = sta->ht_cap.ampdu_density;
445 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
446 }
447
448 if (info->control.hw_key) {
449 struct ieee80211_key_conf *keyconf =
450 info->control.hw_key;
451
452 switch (keyconf->cipher) {
453 case WLAN_CIPHER_SUITE_WEP40:
454 case WLAN_CIPHER_SUITE_WEP104:
455 case WLAN_CIPHER_SUITE_TKIP:
456 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
457 break;
458 case WLAN_CIPHER_SUITE_CCMP:
459 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
460 break;
461 default:
462 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
463 break;
464
465 }
466 }
467
468 SET_TX_DESC_PKT_ID(pdesc, 0);
469 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
470
471 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
472 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
473 SET_TX_DESC_DISABLE_FB(pdesc, 0);
474 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
475
476 if (ieee80211_is_data_qos(fc)) {
477 if (mac->rdg_en) {
478 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
479 "Enable RDG function.\n");
480 SET_TX_DESC_RDG_ENABLE(pdesc, 1);
481 SET_TX_DESC_HTC(pdesc, 1);
482 }
483 }
484 }
485
486 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
487 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
488
489 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
490
491 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
492
493 if (rtlpriv->dm.useramask) {
494 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
495 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
496 } else {
497 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
498 SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
499 }
500
501 if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
502 SET_TX_DESC_HWSEQ_EN_8723(pdesc, 1);
503
504
505
506 if (!b_defaultadapter)
507 SET_TX_DESC_HWSEQ_SEL_8723(pdesc, 1);
508
509 }
510
511 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
512
513 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
514 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
515 SET_TX_DESC_BMC(pdesc, 1);
516 }
517
518 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
519}
520
521void rtl8723e_tx_fill_cmddesc(struct ieee80211_hw *hw,
522 u8 *pdesc, bool firstseg,
523 bool lastseg, struct sk_buff *skb)
524{
525 struct rtl_priv *rtlpriv = rtl_priv(hw);
526 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
527 u8 fw_queue = QSLT_BEACON;
528
529 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
530 skb->data, skb->len,
531 PCI_DMA_TODEVICE);
532
533 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
534 __le16 fc = hdr->frame_control;
535
536 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
537 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
538 "DMA mapping error\n");
539 return;
540 }
541 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
542
543 if (firstseg)
544 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
545
546 SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
547
548 SET_TX_DESC_SEQ(pdesc, 0);
549
550 SET_TX_DESC_LINIP(pdesc, 0);
551
552 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
553
554 SET_TX_DESC_FIRST_SEG(pdesc, 1);
555 SET_TX_DESC_LAST_SEG(pdesc, 1);
556
557 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
558
559 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
560
561 SET_TX_DESC_RATE_ID(pdesc, 7);
562 SET_TX_DESC_MACID(pdesc, 0);
563
564 SET_TX_DESC_OWN(pdesc, 1);
565
566 SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
567
568 SET_TX_DESC_FIRST_SEG(pdesc, 1);
569 SET_TX_DESC_LAST_SEG(pdesc, 1);
570
571 SET_TX_DESC_OFFSET(pdesc, 0x20);
572
573 SET_TX_DESC_USE_RATE(pdesc, 1);
574
575 if (!ieee80211_is_data_qos(fc)) {
576 SET_TX_DESC_HWSEQ_EN_8723(pdesc, 1);
577
578
579 }
580
581 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
582 "H2C Tx Cmd Content\n",
583 pdesc, TX_DESC_SIZE);
584}
585
586void rtl8723e_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
587 bool istx, u8 desc_name, u8 *val)
588{
589 if (istx == true) {
590 switch (desc_name) {
591 case HW_DESC_OWN:
592 SET_TX_DESC_OWN(pdesc, 1);
593 break;
594 case HW_DESC_TX_NEXTDESC_ADDR:
595 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
596 break;
597 default:
598 WARN_ONCE(true, "rtl8723ae: ERR txdesc :%d not processed\n",
599 desc_name);
600 break;
601 }
602 } else {
603 switch (desc_name) {
604 case HW_DESC_RXOWN:
605 SET_RX_DESC_OWN(pdesc, 1);
606 break;
607 case HW_DESC_RXBUFF_ADDR:
608 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
609 break;
610 case HW_DESC_RXPKT_LEN:
611 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
612 break;
613 case HW_DESC_RXERO:
614 SET_RX_DESC_EOR(pdesc, 1);
615 break;
616 default:
617 WARN_ONCE(true, "rtl8723ae: ERR rxdesc :%d not processed\n",
618 desc_name);
619 break;
620 }
621 }
622}
623
624u64 rtl8723e_get_desc(struct ieee80211_hw *hw,
625 u8 *pdesc, bool istx, u8 desc_name)
626{
627 u32 ret = 0;
628
629 if (istx == true) {
630 switch (desc_name) {
631 case HW_DESC_OWN:
632 ret = GET_TX_DESC_OWN(pdesc);
633 break;
634 case HW_DESC_TXBUFF_ADDR:
635 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
636 break;
637 default:
638 WARN_ONCE(true, "rtl8723ae: ERR txdesc :%d not processed\n",
639 desc_name);
640 break;
641 }
642 } else {
643 switch (desc_name) {
644 case HW_DESC_OWN:
645 ret = GET_RX_DESC_OWN(pdesc);
646 break;
647 case HW_DESC_RXPKT_LEN:
648 ret = GET_RX_DESC_PKT_LEN(pdesc);
649 break;
650 case HW_DESC_RXBUFF_ADDR:
651 ret = GET_RX_DESC_BUFF_ADDR(pdesc);
652 break;
653 default:
654 WARN_ONCE(true, "rtl8723ae: ERR rxdesc :%d not processed\n",
655 desc_name);
656 break;
657 }
658 }
659 return ret;
660}
661
662bool rtl8723e_is_tx_desc_closed(struct ieee80211_hw *hw,
663 u8 hw_queue, u16 index)
664{
665 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
666 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
667 u8 *entry = (u8 *)(&ring->desc[ring->idx]);
668 u8 own = (u8)rtl8723e_get_desc(hw, entry, true, HW_DESC_OWN);
669
670
671
672
673
674
675 if (own)
676 return false;
677 return true;
678}
679
680void rtl8723e_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
681{
682 struct rtl_priv *rtlpriv = rtl_priv(hw);
683 if (hw_queue == BEACON_QUEUE) {
684 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
685 } else {
686 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
687 BIT(0) << (hw_queue));
688 }
689}
690
