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26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/kernel.h>
29#include <linux/string.h>
30#include <linux/timer.h>
31#include <linux/ioport.h>
32#include <linux/major.h>
33#include <linux/blkdev.h>
34#include <linux/interrupt.h>
35#include <linux/pci.h>
36#include <linux/delay.h>
37#include <linux/ctype.h>
38#include <linux/dma-mapping.h>
39
40#include <asm/dma.h>
41#include <asm/io.h>
42
43#include <scsi/scsi.h>
44#include <scsi/scsi_cmnd.h>
45#include <scsi/scsi_device.h>
46#include <scsi/scsi_host.h>
47#include <scsi/scsi_ioctl.h>
48
49#include "nsp32.h"
50
51
52
53
54
55static int trans_mode = 0;
56module_param (trans_mode, int, 0);
57MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
58#define ASYNC_MODE 1
59#define ULTRA20M_MODE 2
60
61static bool auto_param = 0;
62module_param (auto_param, bool, 0);
63MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
64
65static bool disc_priv = 1;
66module_param (disc_priv, bool, 0);
67MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
68
69MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
70MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
71MODULE_LICENSE("GPL");
72
73static const char *nsp32_release_version = "1.2";
74
75
76
77
78
79static struct pci_device_id nsp32_pci_table[] = {
80 {
81 .vendor = PCI_VENDOR_ID_IODATA,
82 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
83 .subvendor = PCI_ANY_ID,
84 .subdevice = PCI_ANY_ID,
85 .driver_data = MODEL_IODATA,
86 },
87 {
88 .vendor = PCI_VENDOR_ID_WORKBIT,
89 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
90 .subvendor = PCI_ANY_ID,
91 .subdevice = PCI_ANY_ID,
92 .driver_data = MODEL_KME,
93 },
94 {
95 .vendor = PCI_VENDOR_ID_WORKBIT,
96 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
97 .subvendor = PCI_ANY_ID,
98 .subdevice = PCI_ANY_ID,
99 .driver_data = MODEL_WORKBIT,
100 },
101 {
102 .vendor = PCI_VENDOR_ID_WORKBIT,
103 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
104 .subvendor = PCI_ANY_ID,
105 .subdevice = PCI_ANY_ID,
106 .driver_data = MODEL_PCI_WORKBIT,
107 },
108 {
109 .vendor = PCI_VENDOR_ID_WORKBIT,
110 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
111 .subvendor = PCI_ANY_ID,
112 .subdevice = PCI_ANY_ID,
113 .driver_data = MODEL_LOGITEC,
114 },
115 {
116 .vendor = PCI_VENDOR_ID_WORKBIT,
117 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
118 .subvendor = PCI_ANY_ID,
119 .subdevice = PCI_ANY_ID,
120 .driver_data = MODEL_PCI_LOGITEC,
121 },
122 {
123 .vendor = PCI_VENDOR_ID_WORKBIT,
124 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
125 .subvendor = PCI_ANY_ID,
126 .subdevice = PCI_ANY_ID,
127 .driver_data = MODEL_PCI_MELCO,
128 },
129 {
130 .vendor = PCI_VENDOR_ID_WORKBIT,
131 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
132 .subvendor = PCI_ANY_ID,
133 .subdevice = PCI_ANY_ID,
134 .driver_data = MODEL_PCI_MELCO,
135 },
136 {0,0,},
137};
138MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
139
140static nsp32_hw_data nsp32_data_base;
141
142
143
144
145
146
147
148static nsp32_sync_table nsp32_sync_table_40M[] = {
149
150 {0x1, 0, 0x0c, 0x0c, SMPL_40M},
151 {0x2, 0, 0x0d, 0x18, SMPL_40M},
152 {0x3, 1, 0x19, 0x19, SMPL_40M},
153 {0x4, 1, 0x1a, 0x1f, SMPL_20M},
154 {0x5, 2, 0x20, 0x25, SMPL_20M},
155 {0x6, 2, 0x26, 0x31, SMPL_20M},
156 {0x7, 3, 0x32, 0x32, SMPL_20M},
157 {0x8, 3, 0x33, 0x38, SMPL_10M},
158 {0x9, 3, 0x39, 0x3e, SMPL_10M},
159};
160
161static nsp32_sync_table nsp32_sync_table_20M[] = {
162 {0x1, 0, 0x19, 0x19, SMPL_40M},
163 {0x2, 0, 0x1a, 0x25, SMPL_20M},
164 {0x3, 1, 0x26, 0x32, SMPL_20M},
165 {0x4, 1, 0x33, 0x3e, SMPL_10M},
166 {0x5, 2, 0x3f, 0x4b, SMPL_10M},
167 {0x6, 2, 0x4c, 0x57, SMPL_10M},
168 {0x7, 3, 0x58, 0x64, SMPL_10M},
169 {0x8, 3, 0x65, 0x70, SMPL_10M},
170 {0x9, 3, 0x71, 0x7d, SMPL_10M},
171};
172
173static nsp32_sync_table nsp32_sync_table_pci[] = {
174 {0x1, 0, 0x0c, 0x0f, SMPL_40M},
175 {0x2, 0, 0x10, 0x16, SMPL_40M},
176 {0x3, 1, 0x17, 0x1e, SMPL_20M},
177 {0x4, 1, 0x1f, 0x25, SMPL_20M},
178 {0x5, 2, 0x26, 0x2d, SMPL_20M},
179 {0x6, 2, 0x2e, 0x34, SMPL_10M},
180 {0x7, 3, 0x35, 0x3c, SMPL_10M},
181 {0x8, 3, 0x3d, 0x43, SMPL_10M},
182 {0x9, 3, 0x44, 0x4b, SMPL_10M},
183};
184
185
186
187
188
189static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
190static void nsp32_remove(struct pci_dev *);
191static int __init init_nsp32 (void);
192static void __exit exit_nsp32 (void);
193
194
195static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
196
197static int nsp32_detect (struct pci_dev *pdev);
198static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
199static const char *nsp32_info (struct Scsi_Host *);
200static int nsp32_release (struct Scsi_Host *);
201
202
203static int nsp32_eh_abort (struct scsi_cmnd *);
204static int nsp32_eh_host_reset(struct scsi_cmnd *);
205
206
207static void nsp32_build_identify(struct scsi_cmnd *);
208static void nsp32_build_nop (struct scsi_cmnd *);
209static void nsp32_build_reject (struct scsi_cmnd *);
210static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
211
212
213static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
214static void nsp32_msgout_occur (struct scsi_cmnd *);
215static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
216
217static int nsp32_setup_sg_table (struct scsi_cmnd *);
218static int nsp32_selection_autopara(struct scsi_cmnd *);
219static int nsp32_selection_autoscsi(struct scsi_cmnd *);
220static void nsp32_scsi_done (struct scsi_cmnd *);
221static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
222static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
223static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
224static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
225
226
227static void nsp32_analyze_sdtr (struct scsi_cmnd *);
228static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
229static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
230static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
231static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
232
233
234static void nsp32_wait_req (nsp32_hw_data *, int);
235static void nsp32_wait_sack (nsp32_hw_data *, int);
236static void nsp32_sack_assert (nsp32_hw_data *);
237static void nsp32_sack_negate (nsp32_hw_data *);
238static void nsp32_do_bus_reset(nsp32_hw_data *);
239
240
241static irqreturn_t do_nsp32_isr(int, void *);
242
243
244static int nsp32hw_init(nsp32_hw_data *);
245
246
247static int nsp32_getprom_param (nsp32_hw_data *);
248static int nsp32_getprom_at24 (nsp32_hw_data *);
249static int nsp32_getprom_c16 (nsp32_hw_data *);
250static void nsp32_prom_start (nsp32_hw_data *);
251static void nsp32_prom_stop (nsp32_hw_data *);
252static int nsp32_prom_read (nsp32_hw_data *, int);
253static int nsp32_prom_read_bit (nsp32_hw_data *);
254static void nsp32_prom_write_bit(nsp32_hw_data *, int);
255static void nsp32_prom_set (nsp32_hw_data *, int, int);
256static int nsp32_prom_get (nsp32_hw_data *, int);
257
258
259static void nsp32_message (const char *, int, char *, char *, ...);
260#ifdef NSP32_DEBUG
261static void nsp32_dmessage(const char *, int, int, char *, ...);
262#endif
263
264
265
266
267static struct scsi_host_template nsp32_template = {
268 .proc_name = "nsp32",
269 .name = "Workbit NinjaSCSI-32Bi/UDE",
270 .show_info = nsp32_show_info,
271 .info = nsp32_info,
272 .queuecommand = nsp32_queuecommand,
273 .can_queue = 1,
274 .sg_tablesize = NSP32_SG_SIZE,
275 .max_sectors = 128,
276 .this_id = NSP32_HOST_SCSIID,
277 .dma_boundary = PAGE_SIZE - 1,
278 .eh_abort_handler = nsp32_eh_abort,
279 .eh_host_reset_handler = nsp32_eh_host_reset,
280
281};
282
283#include "nsp32_io.h"
284
285
286
287
288#ifndef NSP32_DEBUG
289# define NSP32_DEBUG_MASK 0x000000
290# define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
291# define nsp32_dbg(mask, args...)
292#else
293# define NSP32_DEBUG_MASK 0xffffff
294# define nsp32_msg(type, args...) \
295 nsp32_message (__func__, __LINE__, (type), args)
296# define nsp32_dbg(mask, args...) \
297 nsp32_dmessage(__func__, __LINE__, (mask), args)
298#endif
299
300#define NSP32_DEBUG_QUEUECOMMAND BIT(0)
301#define NSP32_DEBUG_REGISTER BIT(1)
302#define NSP32_DEBUG_AUTOSCSI BIT(2)
303#define NSP32_DEBUG_INTR BIT(3)
304#define NSP32_DEBUG_SGLIST BIT(4)
305#define NSP32_DEBUG_BUSFREE BIT(5)
306#define NSP32_DEBUG_CDB_CONTENTS BIT(6)
307#define NSP32_DEBUG_RESELECTION BIT(7)
308#define NSP32_DEBUG_MSGINOCCUR BIT(8)
309#define NSP32_DEBUG_EEPROM BIT(9)
310#define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
311#define NSP32_DEBUG_BUSRESET BIT(11)
312#define NSP32_DEBUG_RESTART BIT(12)
313#define NSP32_DEBUG_SYNC BIT(13)
314#define NSP32_DEBUG_WAIT BIT(14)
315#define NSP32_DEBUG_TARGETFLAG BIT(15)
316#define NSP32_DEBUG_PROC BIT(16)
317#define NSP32_DEBUG_INIT BIT(17)
318#define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
319
320#define NSP32_DEBUG_BUF_LEN 100
321
322static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
323{
324 va_list args;
325 char buf[NSP32_DEBUG_BUF_LEN];
326
327 va_start(args, fmt);
328 vsnprintf(buf, sizeof(buf), fmt, args);
329 va_end(args);
330
331#ifndef NSP32_DEBUG
332 printk("%snsp32: %s\n", type, buf);
333#else
334 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
335#endif
336}
337
338#ifdef NSP32_DEBUG
339static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
340{
341 va_list args;
342 char buf[NSP32_DEBUG_BUF_LEN];
343
344 va_start(args, fmt);
345 vsnprintf(buf, sizeof(buf), fmt, args);
346 va_end(args);
347
348 if (mask & NSP32_DEBUG_MASK) {
349 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
350 }
351}
352#endif
353
354#ifdef NSP32_DEBUG
355# include "nsp32_debug.c"
356#else
357# define show_command(arg)
358# define show_busphase(arg)
359# define show_autophase(arg)
360#endif
361
362
363
364
365static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
366{
367 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
368 int pos = data->msgout_len;
369 int mode = FALSE;
370
371
372 if (disc_priv == 0) {
373
374 }
375
376 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
377
378 data->msgout_len = pos;
379}
380
381
382
383
384static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
385 unsigned char period,
386 unsigned char offset)
387{
388 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
389 int pos = data->msgout_len;
390
391 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
392 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
393 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
394 data->msgoutbuf[pos] = period; pos++;
395 data->msgoutbuf[pos] = offset; pos++;
396
397 data->msgout_len = pos;
398}
399
400
401
402
403static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
404{
405 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
406 int pos = data->msgout_len;
407
408 if (pos != 0) {
409 nsp32_msg(KERN_WARNING,
410 "Some messages are already contained!");
411 return;
412 }
413
414 data->msgoutbuf[pos] = NOP; pos++;
415 data->msgout_len = pos;
416}
417
418
419
420
421static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
422{
423 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
424 int pos = data->msgout_len;
425
426 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
427 data->msgout_len = pos;
428}
429
430
431
432
433#if 0
434static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
435{
436 unsigned int base = SCpnt->host->io_port;
437
438 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
439
440 if (time & (~TIMER_CNT_MASK)) {
441 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
442 }
443
444 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
445}
446#endif
447
448
449
450
451
452static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
453{
454 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
455 unsigned int base = SCpnt->device->host->io_port;
456 unsigned int host_id = SCpnt->device->host->this_id;
457 unsigned char target = scmd_id(SCpnt);
458 nsp32_autoparam *param = data->autoparam;
459 unsigned char phase;
460 int i, ret;
461 unsigned int msgout;
462 u16_le s;
463
464 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
465
466
467
468
469 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
470 if (phase != BUSMON_BUS_FREE) {
471 nsp32_msg(KERN_WARNING, "bus busy");
472 show_busphase(phase & BUSMON_PHASE_MASK);
473 SCpnt->result = DID_BUS_BUSY << 16;
474 return FALSE;
475 }
476
477
478
479
480
481
482
483 if (data->msgout_len == 0) {
484 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
485 SCpnt->result = DID_ERROR << 16;
486 return FALSE;
487 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
488 msgout = 0;
489 for (i = 0; i < data->msgout_len; i++) {
490
491
492
493
494
495
496 msgout >>= 8;
497 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
498 }
499 msgout |= MV_VALID;
500 msgout |= (unsigned int)data->msgout_len;
501 } else {
502
503 msgout = 0;
504 }
505
506
507
508
509
510
511
512 memset(param, 0, sizeof(nsp32_autoparam));
513
514
515 for (i = 0; i < SCpnt->cmd_len; i++) {
516 param->cdb[4 * i] = SCpnt->cmnd[i];
517 }
518
519
520 param->msgout = cpu_to_le32(msgout);
521
522
523 param->syncreg = data->cur_target->syncreg;
524 param->ackwidth = data->cur_target->ackwidth;
525 param->target_id = BIT(host_id) | BIT(target);
526 param->sample_reg = data->cur_target->sample_reg;
527
528
529
530
531 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
532 AUTOSCSI_START |
533 AUTO_MSGIN_00_OR_04 |
534 AUTO_MSGIN_02 |
535 AUTO_ATN );
536
537
538
539 s = 0;
540 switch (data->trans_method) {
541 case NSP32_TRANSFER_BUSMASTER:
542 s |= BM_START;
543 break;
544 case NSP32_TRANSFER_MMIO:
545 s |= CB_MMIO_MODE;
546 break;
547 case NSP32_TRANSFER_PIO:
548 s |= CB_IO_MODE;
549 break;
550 default:
551 nsp32_msg(KERN_ERR, "unknown trans_method");
552 break;
553 }
554
555
556
557
558 s |= (TRANSFER_GO | ALL_COUNTER_CLR);
559 param->transfer_control = cpu_to_le16(s);
560
561
562 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
563
564
565
566
567 nsp32_write4(base, SGT_ADR, data->auto_paddr);
568 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
569 AUTO_PARAMETER );
570
571
572
573
574 ret = nsp32_arbitration(SCpnt, base);
575
576 return ret;
577}
578
579
580
581
582
583static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
584{
585 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
586 unsigned int base = SCpnt->device->host->io_port;
587 unsigned int host_id = SCpnt->device->host->this_id;
588 unsigned char target = scmd_id(SCpnt);
589 unsigned char phase;
590 int status;
591 unsigned short command = 0;
592 unsigned int msgout = 0;
593 unsigned short execph;
594 int i;
595
596 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
597
598
599
600
601 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
602
603
604
605
606 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
607 if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
608 nsp32_msg(KERN_WARNING, "bus busy");
609 SCpnt->result = DID_BUS_BUSY << 16;
610 status = 1;
611 goto out;
612 }
613
614
615
616
617 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
618
619
620
621
622 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
623
624
625
626
627 for (i = 0; i < SCpnt->cmd_len; i++) {
628 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
629 }
630 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
631
632
633
634
635 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
636
637
638
639
640
641
642
643 if (data->msgout_len == 0) {
644 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
645 SCpnt->result = DID_ERROR << 16;
646 status = 1;
647 goto out;
648 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
649 msgout = 0;
650 for (i = 0; i < data->msgout_len; i++) {
651
652
653
654
655
656
657 msgout >>= 8;
658 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
659 }
660 msgout |= MV_VALID;
661 msgout |= (unsigned int)data->msgout_len;
662 nsp32_write4(base, SCSI_MSG_OUT, msgout);
663 } else {
664
665 nsp32_write4(base, SCSI_MSG_OUT, 0);
666 }
667
668
669
670
671 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
672
673
674
675
676
677
678
679 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
680
681
682
683
684 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
685
686
687
688
689
690 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
691
692
693
694
695 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
696
697 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
698 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
699 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
700 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
701 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
702 data->msgout_len, msgout);
703
704
705
706
707 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
708
709
710
711
712 command = 0;
713 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
714 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
715 if (scsi_bufflen(SCpnt) > 0) {
716 command |= BM_START;
717 }
718 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
719 command |= CB_MMIO_MODE;
720 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
721 command |= CB_IO_MODE;
722 }
723 nsp32_write2(base, TRANSFER_CONTROL, command);
724
725
726
727
728 command = (CLEAR_CDB_FIFO_POINTER |
729 AUTOSCSI_START |
730 AUTO_MSGIN_00_OR_04 |
731 AUTO_MSGIN_02 |
732 AUTO_ATN );
733 nsp32_write2(base, COMMAND_CONTROL, command);
734
735
736
737
738 status = nsp32_arbitration(SCpnt, base);
739
740 out:
741
742
743
744 nsp32_write2(base, IRQ_CONTROL, 0);
745
746 return status;
747}
748
749
750
751
752
753
754
755
756
757
758static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
759{
760 unsigned char arbit;
761 int status = TRUE;
762 int time = 0;
763
764 do {
765 arbit = nsp32_read1(base, ARBIT_STATUS);
766 time++;
767 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
768 (time <= ARBIT_TIMEOUT_TIME));
769
770 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
771 "arbit: 0x%x, delay time: %d", arbit, time);
772
773 if (arbit & ARBIT_WIN) {
774
775 SCpnt->result = DID_OK << 16;
776 nsp32_index_write1(base, EXT_PORT, LED_ON);
777 } else if (arbit & ARBIT_FAIL) {
778
779 SCpnt->result = DID_BUS_BUSY << 16;
780 status = FALSE;
781 } else {
782
783
784
785
786 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
787 SCpnt->result = DID_NO_CONNECT << 16;
788 status = FALSE;
789 }
790
791
792
793
794 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
795
796 return status;
797}
798
799
800
801
802
803
804
805
806
807static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
808{
809 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
810 unsigned int host_id = SCpnt->device->host->this_id;
811 unsigned int base = SCpnt->device->host->io_port;
812 unsigned char tmpid, newid;
813
814 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
815
816
817
818
819 tmpid = nsp32_read1(base, RESELECT_ID);
820 tmpid &= (~BIT(host_id));
821 newid = 0;
822 while (tmpid) {
823 if (tmpid & 1) {
824 break;
825 }
826 tmpid >>= 1;
827 newid++;
828 }
829
830
831
832
833
834
835 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
836 nsp32_msg(KERN_WARNING, "unknown id/lun");
837 return FALSE;
838 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
839 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
840 return FALSE;
841 }
842
843 data->cur_id = newid;
844 data->cur_lun = newlun;
845 data->cur_target = &(data->target[newid]);
846 data->cur_lunt = &(data->lunt[newid][newlun]);
847
848
849 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
850
851 return TRUE;
852}
853
854
855
856
857
858
859
860
861static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
862{
863 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
864 struct scatterlist *sg;
865 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
866 int num, i;
867 u32_le l;
868
869 if (sgt == NULL) {
870 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
871 return FALSE;
872 }
873
874 num = scsi_dma_map(SCpnt);
875 if (!num)
876 return TRUE;
877 else if (num < 0)
878 return FALSE;
879 else {
880 scsi_for_each_sg(SCpnt, sg, num, i) {
881
882
883
884 sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
885 sgt[i].len = cpu_to_le32(sg_dma_len(sg));
886
887 if (le32_to_cpu(sgt[i].len) > 0x10000) {
888 nsp32_msg(KERN_ERR,
889 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
890 return FALSE;
891 }
892 nsp32_dbg(NSP32_DEBUG_SGLIST,
893 "num 0x%x : addr 0x%lx len 0x%lx",
894 i,
895 le32_to_cpu(sgt[i].addr),
896 le32_to_cpu(sgt[i].len ));
897 }
898
899
900 l = le32_to_cpu(sgt[num-1].len);
901 sgt[num-1].len = cpu_to_le32(l | SGTEND);
902 }
903
904 return TRUE;
905}
906
907static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
908{
909 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
910 nsp32_target *target;
911 nsp32_lunt *cur_lunt;
912 int ret;
913
914 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
915 "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
916 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
917 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
918 scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
919
920 if (data->CurrentSC != NULL) {
921 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
922 data->CurrentSC = NULL;
923 SCpnt->result = DID_NO_CONNECT << 16;
924 done(SCpnt);
925 return 0;
926 }
927
928
929 if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
930 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
931 SCpnt->result = DID_BAD_TARGET << 16;
932 done(SCpnt);
933 return 0;
934 }
935
936
937 if (SCpnt->device->lun >= MAX_LUN) {
938 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
939 SCpnt->result = DID_BAD_TARGET << 16;
940 done(SCpnt);
941 return 0;
942 }
943
944 show_command(SCpnt);
945
946 SCpnt->scsi_done = done;
947 data->CurrentSC = SCpnt;
948 SCpnt->SCp.Status = CHECK_CONDITION;
949 SCpnt->SCp.Message = 0;
950 scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
951
952 SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
953 SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
954 SCpnt->SCp.buffer = NULL;
955 SCpnt->SCp.buffers_residual = 0;
956
957
958 data->msgout_len = 0;
959 data->msgin_len = 0;
960 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
961 cur_lunt->SCpnt = SCpnt;
962 cur_lunt->save_datp = 0;
963 cur_lunt->msgin03 = FALSE;
964 data->cur_lunt = cur_lunt;
965 data->cur_id = SCpnt->device->id;
966 data->cur_lun = SCpnt->device->lun;
967
968 ret = nsp32_setup_sg_table(SCpnt);
969 if (ret == FALSE) {
970 nsp32_msg(KERN_ERR, "SGT fail");
971 SCpnt->result = DID_ERROR << 16;
972 nsp32_scsi_done(SCpnt);
973 return 0;
974 }
975
976
977 nsp32_build_identify(SCpnt);
978
979
980
981
982
983
984 target = &data->target[scmd_id(SCpnt)];
985 data->cur_target = target;
986
987 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
988 unsigned char period, offset;
989
990 if (trans_mode != ASYNC_MODE) {
991 nsp32_set_max_sync(data, target, &period, &offset);
992 nsp32_build_sdtr(SCpnt, period, offset);
993 target->sync_flag |= SDTR_INITIATOR;
994 } else {
995 nsp32_set_async(data, target);
996 target->sync_flag |= SDTR_DONE;
997 }
998
999 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1000 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1001 target->limit_entry, period, offset);
1002 } else if (target->sync_flag & SDTR_INITIATOR) {
1003
1004
1005
1006
1007
1008 nsp32_set_async(data, target);
1009 target->sync_flag &= ~SDTR_INITIATOR;
1010 target->sync_flag |= SDTR_DONE;
1011
1012 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1013 "SDTR_INITIATOR: fall back to async");
1014 } else if (target->sync_flag & SDTR_TARGET) {
1015
1016
1017
1018
1019
1020 nsp32_set_async(data, target);
1021 target->sync_flag &= ~SDTR_TARGET;
1022 target->sync_flag |= SDTR_DONE;
1023
1024 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1025 "Unknown SDTR from target is reached, fall back to async.");
1026 }
1027
1028 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1029 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1030 SCpnt->device->id, target->sync_flag, target->syncreg,
1031 target->ackwidth);
1032
1033
1034 if (auto_param == 0) {
1035 ret = nsp32_selection_autopara(SCpnt);
1036 } else {
1037 ret = nsp32_selection_autoscsi(SCpnt);
1038 }
1039
1040 if (ret != TRUE) {
1041 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1042 nsp32_scsi_done(SCpnt);
1043 }
1044
1045 return 0;
1046}
1047
1048static DEF_SCSI_QCMD(nsp32_queuecommand)
1049
1050
1051static int nsp32hw_init(nsp32_hw_data *data)
1052{
1053 unsigned int base = data->BaseAddress;
1054 unsigned short irq_stat;
1055 unsigned long lc_reg;
1056 unsigned char power;
1057
1058 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1059 if ((lc_reg & 0xff00) == 0) {
1060 lc_reg |= (0x20 << 8);
1061 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1062 }
1063
1064 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1065 nsp32_write2(base, TRANSFER_CONTROL, 0);
1066 nsp32_write4(base, BM_CNT, 0);
1067 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1068
1069 do {
1070 irq_stat = nsp32_read2(base, IRQ_STATUS);
1071 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1072 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1073
1074
1075
1076
1077
1078 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1079 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1080 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1081 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1082 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1083 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1084 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1085 } else {
1086 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1087 }
1088
1089 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1090 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1091 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1092
1093 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1094 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1095 nsp32_write1(base, PARITY_CONTROL, 0);
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112 nsp32_index_write2(base, MISC_WR,
1113 (SCSI_DIRECTION_DETECTOR_SELECT |
1114 DELAYED_BMSTART |
1115 MASTER_TERMINATION_SELECT |
1116 BMREQ_NEGATE_TIMING_SEL |
1117 AUTOSEL_TIMING_SEL |
1118 BMSTOP_CHANGE2_NONDATA_PHASE));
1119
1120 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1121 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1122 if (!(power & SENSE)) {
1123 nsp32_msg(KERN_INFO, "term power on");
1124 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1125 }
1126
1127 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1128 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1129
1130 nsp32_write1(base, SYNC_REG, 0);
1131 nsp32_write1(base, ACK_WIDTH, 0);
1132 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1133
1134
1135
1136
1137
1138 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1139 IRQSELECT_SCSIRESET_IRQ |
1140 IRQSELECT_FIFO_SHLD_IRQ |
1141 IRQSELECT_RESELECT_IRQ |
1142 IRQSELECT_PHASE_CHANGE_IRQ |
1143 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1144
1145 IRQSELECT_TARGET_ABORT_IRQ |
1146 IRQSELECT_MASTER_ABORT_IRQ );
1147 nsp32_write2(base, IRQ_CONTROL, 0);
1148
1149
1150 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1151 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1152
1153 return TRUE;
1154}
1155
1156
1157
1158static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
1159{
1160 nsp32_hw_data *data = dev_id;
1161 unsigned int base = data->BaseAddress;
1162 struct scsi_cmnd *SCpnt = data->CurrentSC;
1163 unsigned short auto_stat, irq_stat, trans_stat;
1164 unsigned char busmon, busphase;
1165 unsigned long flags;
1166 int ret;
1167 int handled = 0;
1168 struct Scsi_Host *host = data->Host;
1169
1170 spin_lock_irqsave(host->host_lock, flags);
1171
1172
1173
1174
1175 irq_stat = nsp32_read2(base, IRQ_STATUS);
1176 nsp32_dbg(NSP32_DEBUG_INTR,
1177 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1178
1179 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1180 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1181 goto out2;
1182 }
1183 handled = 1;
1184 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1185
1186 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1187 busphase = busmon & BUSMON_PHASE_MASK;
1188
1189 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1190 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1191 nsp32_msg(KERN_INFO, "card disconnect");
1192 if (data->CurrentSC != NULL) {
1193 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1194 SCpnt->result = DID_BAD_TARGET << 16;
1195 nsp32_scsi_done(SCpnt);
1196 }
1197 goto out;
1198 }
1199
1200
1201 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1202 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1203 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1204 goto out;
1205 }
1206
1207
1208 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1209 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1210 nsp32_do_bus_reset(data);
1211 if (SCpnt != NULL) {
1212 SCpnt->result = DID_RESET << 16;
1213 nsp32_scsi_done(SCpnt);
1214 }
1215 goto out;
1216 }
1217
1218 if (SCpnt == NULL) {
1219 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1220 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1221 goto out;
1222 }
1223
1224
1225
1226
1227
1228
1229
1230 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1231
1232 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1233 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1234
1235
1236 if (auto_stat & SELECTION_TIMEOUT) {
1237 nsp32_dbg(NSP32_DEBUG_INTR,
1238 "selection timeout occurred");
1239
1240 SCpnt->result = DID_TIME_OUT << 16;
1241 nsp32_scsi_done(SCpnt);
1242 goto out;
1243 }
1244
1245 if (auto_stat & MSGOUT_PHASE) {
1246
1247
1248
1249
1250
1251
1252
1253 if (!(auto_stat & MSG_IN_OCCUER) &&
1254 (data->msgout_len <= 3)) {
1255
1256
1257
1258
1259 data->msgout_len = 0;
1260 };
1261
1262 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1263 }
1264
1265 if ((auto_stat & DATA_IN_PHASE) &&
1266 (scsi_get_resid(SCpnt) > 0) &&
1267 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1268 printk( "auto+fifo\n");
1269
1270 }
1271
1272 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1273
1274 nsp32_dbg(NSP32_DEBUG_INTR,
1275 "Data in/out phase processed");
1276
1277
1278 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1279 nsp32_read4(base, BM_CNT));
1280 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1281 nsp32_read4(base, SGT_ADR));
1282 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1283 nsp32_read4(base, SACK_CNT));
1284 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1285 nsp32_read4(base, SAVED_SACK_CNT));
1286
1287 scsi_set_resid(SCpnt, 0);
1288 }
1289
1290
1291
1292
1293 if (auto_stat & MSG_IN_OCCUER) {
1294 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1295 }
1296
1297
1298
1299
1300 if (auto_stat & MSG_OUT_OCCUER) {
1301 nsp32_msgout_occur(SCpnt);
1302 }
1303
1304
1305
1306
1307 if (auto_stat & BUS_FREE_OCCUER) {
1308 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1309 if (ret == TRUE) {
1310 goto out;
1311 }
1312 }
1313
1314 if (auto_stat & STATUS_PHASE) {
1315
1316
1317
1318
1319
1320
1321
1322 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1323 }
1324
1325 if (auto_stat & ILLEGAL_PHASE) {
1326
1327 nsp32_msg(KERN_WARNING,
1328 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1329
1330
1331
1332
1333
1334
1335 nsp32_sack_assert(data);
1336 nsp32_wait_req(data, NEGATE);
1337 nsp32_sack_negate(data);
1338
1339 }
1340
1341 if (auto_stat & COMMAND_PHASE) {
1342
1343 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1344 }
1345
1346 if (auto_stat & AUTOSCSI_BUSY) {
1347
1348 }
1349
1350 show_autophase(auto_stat);
1351 }
1352
1353
1354 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1355 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1356
1357 switch(busphase) {
1358 case BUSPHASE_DATA_OUT:
1359 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1360
1361
1362
1363 break;
1364
1365 case BUSPHASE_DATA_IN:
1366 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1367
1368
1369
1370 break;
1371
1372 case BUSPHASE_STATUS:
1373 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1374
1375 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1376
1377 break;
1378 default:
1379 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1380 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1381 show_busphase(busphase);
1382 break;
1383 }
1384
1385 goto out;
1386 }
1387
1388
1389 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1390 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1391
1392 switch(busphase) {
1393 case BUSPHASE_MESSAGE_IN:
1394 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1395 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1396 break;
1397 default:
1398 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1399 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1400 irq_stat, trans_stat);
1401 show_busphase(busphase);
1402 break;
1403 }
1404 goto out;
1405 }
1406
1407
1408 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1409 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1410
1411 }
1412
1413
1414 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1415 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1416
1417
1418
1419
1420
1421 }
1422
1423#if 0
1424 nsp32_dbg(NSP32_DEBUG_INTR,
1425 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1426 show_busphase(busphase);
1427#endif
1428
1429 out:
1430
1431 nsp32_write2(base, IRQ_CONTROL, 0);
1432
1433 out2:
1434 spin_unlock_irqrestore(host->host_lock, flags);
1435
1436 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1437
1438 return IRQ_RETVAL(handled);
1439}
1440
1441
1442static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
1443{
1444 unsigned long flags;
1445 nsp32_hw_data *data;
1446 int hostno;
1447 unsigned int base;
1448 unsigned char mode_reg;
1449 int id, speed;
1450 long model;
1451
1452 hostno = host->host_no;
1453 data = (nsp32_hw_data *)host->hostdata;
1454 base = host->io_port;
1455
1456 seq_puts(m, "NinjaSCSI-32 status\n\n");
1457 seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
1458 seq_printf(m, "SCSI host No.: %d\n", hostno);
1459 seq_printf(m, "IRQ: %d\n", host->irq);
1460 seq_printf(m, "IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1461 seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1462 seq_printf(m, "sg_tablesize: %d\n", host->sg_tablesize);
1463 seq_printf(m, "Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1464
1465 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1466 model = data->pci_devid->driver_data;
1467
1468#ifdef CONFIG_PM
1469 seq_printf(m, "Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1470#endif
1471 seq_printf(m, "OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1472
1473 spin_lock_irqsave(&(data->Lock), flags);
1474 seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
1475 spin_unlock_irqrestore(&(data->Lock), flags);
1476
1477
1478 seq_puts(m, "SDTR status\n");
1479 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1480
1481 seq_printf(m, "id %d: ", id);
1482
1483 if (id == host->this_id) {
1484 seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
1485 continue;
1486 }
1487
1488 if (data->target[id].sync_flag == SDTR_DONE) {
1489 if (data->target[id].period == 0 &&
1490 data->target[id].offset == ASYNC_OFFSET ) {
1491 seq_puts(m, "async");
1492 } else {
1493 seq_puts(m, " sync");
1494 }
1495 } else {
1496 seq_puts(m, " none");
1497 }
1498
1499 if (data->target[id].period != 0) {
1500
1501 speed = 1000000 / (data->target[id].period * 4);
1502
1503 seq_printf(m, " transfer %d.%dMB/s, offset %d",
1504 speed / 1000,
1505 speed % 1000,
1506 data->target[id].offset
1507 );
1508 }
1509 seq_putc(m, '\n');
1510 }
1511 return 0;
1512}
1513
1514
1515
1516
1517
1518
1519
1520static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1521{
1522 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1523 unsigned int base = SCpnt->device->host->io_port;
1524
1525 scsi_dma_unmap(SCpnt);
1526
1527
1528
1529
1530 nsp32_write2(base, TRANSFER_CONTROL, 0);
1531 nsp32_write4(base, BM_CNT, 0);
1532
1533
1534
1535
1536 (*SCpnt->scsi_done)(SCpnt);
1537
1538
1539
1540
1541 data->cur_lunt->SCpnt = NULL;
1542 data->cur_lunt = NULL;
1543 data->cur_target = NULL;
1544 data->CurrentSC = NULL;
1545}
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1559{
1560 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1561 unsigned int base = SCpnt->device->host->io_port;
1562
1563 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1564 show_autophase(execph);
1565
1566 nsp32_write4(base, BM_CNT, 0);
1567 nsp32_write2(base, TRANSFER_CONTROL, 0);
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580 if (execph & MSGIN_02_VALID) {
1581 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1582
1583
1584
1585
1586
1587 if (!(execph & MSGIN_00_VALID) &&
1588 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1589 unsigned int sacklen, s_sacklen;
1590
1591
1592
1593
1594 sacklen = nsp32_read4(base, SACK_CNT );
1595 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1596
1597
1598
1599
1600
1601 if (s_sacklen > 0) {
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613 if (sacklen != s_sacklen) {
1614 data->cur_lunt->msgin03 = FALSE;
1615 } else {
1616 data->cur_lunt->msgin03 = TRUE;
1617 }
1618
1619 nsp32_adjust_busfree(SCpnt, s_sacklen);
1620 }
1621 }
1622
1623
1624
1625 } else {
1626
1627
1628
1629 }
1630
1631 if (execph & MSGIN_03_VALID) {
1632
1633 }
1634
1635
1636
1637
1638 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1639
1640
1641
1642
1643 nsp32_set_async(data, data->cur_target);
1644 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1645 data->cur_target->sync_flag |= SDTR_DONE;
1646 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1647
1648
1649
1650
1651 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1652
1653
1654
1655
1656 } else {
1657
1658
1659
1660
1661
1662 nsp32_set_async(data, data->cur_target);
1663 }
1664 data->cur_target->sync_flag &= ~SDTR_TARGET;
1665 data->cur_target->sync_flag |= SDTR_DONE;
1666 }
1667
1668
1669
1670
1671
1672
1673
1674 if (execph & MSGIN_00_VALID) {
1675
1676 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1677
1678 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1679 SCpnt->SCp.Message = 0;
1680 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1681 "normal end stat=0x%x resid=0x%x\n",
1682 SCpnt->SCp.Status, scsi_get_resid(SCpnt));
1683 SCpnt->result = (DID_OK << 16) |
1684 (SCpnt->SCp.Message << 8) |
1685 (SCpnt->SCp.Status << 0);
1686 nsp32_scsi_done(SCpnt);
1687
1688 return TRUE;
1689 } else if (execph & MSGIN_04_VALID) {
1690
1691 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1692 SCpnt->SCp.Message = 4;
1693
1694 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1695 return TRUE;
1696 } else {
1697
1698 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1699
1700
1701
1702 SCpnt->result = DID_ERROR << 16;
1703 nsp32_scsi_done(SCpnt);
1704 return TRUE;
1705 }
1706 return FALSE;
1707}
1708
1709
1710
1711
1712
1713
1714
1715
1716static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1717{
1718 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1719 int old_entry = data->cur_entry;
1720 int new_entry;
1721 int sg_num = data->cur_lunt->sg_num;
1722 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1723 unsigned int restlen, sentlen;
1724 u32_le len, addr;
1725
1726 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
1727
1728
1729 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1730
1731
1732
1733
1734
1735 sentlen = 0;
1736 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1737 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1738 if (sentlen > s_sacklen) {
1739 break;
1740 }
1741 }
1742
1743
1744 if (new_entry == sg_num) {
1745 goto last;
1746 }
1747
1748 if (sentlen == s_sacklen) {
1749
1750
1751
1752 }
1753
1754
1755 restlen = sentlen - s_sacklen;
1756
1757
1758 len = le32_to_cpu(sgt[new_entry].len);
1759 addr = le32_to_cpu(sgt[new_entry].addr);
1760 addr += (len - restlen);
1761 sgt[new_entry].addr = cpu_to_le32(addr);
1762 sgt[new_entry].len = cpu_to_le32(restlen);
1763
1764
1765 data->cur_entry = new_entry;
1766
1767 return;
1768
1769 last:
1770 if (scsi_get_resid(SCpnt) < sentlen) {
1771 nsp32_msg(KERN_ERR, "resid underflow");
1772 }
1773
1774 scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
1775 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
1776
1777
1778
1779 return;
1780}
1781
1782
1783
1784
1785
1786
1787
1788
1789static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1790{
1791 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1792 unsigned int base = SCpnt->device->host->io_port;
1793
1794 long new_sgtp;
1795 int i;
1796
1797 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1798 "enter: msgout_len: 0x%x", data->msgout_len);
1799
1800
1801
1802
1803
1804 if (data->msgout_len == 0) {
1805 nsp32_build_nop(SCpnt);
1806 }
1807
1808
1809
1810
1811
1812
1813 new_sgtp = data->cur_lunt->sglun_paddr +
1814 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1815
1816
1817
1818
1819 for (i = 0; i < data->msgout_len; i++) {
1820 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1821 "%d : 0x%x", i, data->msgoutbuf[i]);
1822
1823
1824
1825
1826 nsp32_wait_req(data, ASSERT);
1827
1828 if (i == (data->msgout_len - 1)) {
1829
1830
1831
1832
1833
1834
1835
1836 nsp32_write2(base, COMMAND_CONTROL,
1837 (CLEAR_CDB_FIFO_POINTER |
1838 AUTO_COMMAND_PHASE |
1839 AUTOSCSI_RESTART |
1840 AUTO_MSGIN_00_OR_04 |
1841 AUTO_MSGIN_02 ));
1842 }
1843
1844
1845
1846
1847 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1848 nsp32_wait_sack(data, NEGATE);
1849
1850 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1851 nsp32_read1(base, SCSI_BUS_MONITOR));
1852 };
1853
1854 data->msgout_len = 0;
1855
1856 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1857}
1858
1859
1860
1861
1862
1863
1864
1865static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1866{
1867 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1868 unsigned int base = data->BaseAddress;
1869 unsigned short transfer = 0;
1870
1871 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1872
1873 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1874 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1875 }
1876
1877
1878
1879
1880
1881 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1882
1883
1884
1885
1886 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1887
1888
1889
1890
1891 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1892
1893
1894
1895
1896 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
1897
1898
1899
1900
1901 transfer = 0;
1902 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
1903 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1904 if (scsi_bufflen(SCpnt) > 0) {
1905 transfer |= BM_START;
1906 }
1907 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
1908 transfer |= CB_MMIO_MODE;
1909 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
1910 transfer |= CB_IO_MODE;
1911 }
1912 nsp32_write2(base, TRANSFER_CONTROL, transfer);
1913
1914
1915
1916
1917
1918
1919 command |= (CLEAR_CDB_FIFO_POINTER |
1920 AUTO_COMMAND_PHASE |
1921 AUTOSCSI_RESTART );
1922 nsp32_write2(base, COMMAND_CONTROL, command);
1923
1924 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
1925}
1926
1927
1928
1929
1930
1931static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
1932 unsigned long irq_status,
1933 unsigned short execph)
1934{
1935 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1936 unsigned int base = SCpnt->device->host->io_port;
1937 unsigned char msg;
1938 unsigned char msgtype;
1939 unsigned char newlun;
1940 unsigned short command = 0;
1941 int msgclear = TRUE;
1942 long new_sgtp;
1943 int ret;
1944
1945
1946
1947
1948
1949
1950 msg = nsp32_read1(base, SCSI_DATA_IN);
1951 data->msginbuf[(unsigned char)data->msgin_len] = msg;
1952 msgtype = data->msginbuf[0];
1953 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
1954 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
1955 data->msgin_len, msg, msgtype);
1956
1957
1958
1959
1960
1961
1962
1963
1964 nsp32_sack_assert(data);
1965
1966
1967
1968
1969 if (msgtype & 0x80) {
1970 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
1971
1972 goto reject;
1973 }
1974
1975 newlun = msgtype & 0x1f;
1976 ret = nsp32_reselection(SCpnt, newlun);
1977 if (ret == TRUE) {
1978 goto restart;
1979 } else {
1980 goto reject;
1981 }
1982 }
1983
1984
1985
1986
1987
1988
1989 switch (msgtype) {
1990
1991
1992
1993 case COMMAND_COMPLETE:
1994 case DISCONNECT:
1995
1996
1997
1998
1999 nsp32_msg(KERN_WARNING,
2000 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
2001 break;
2002
2003 case RESTORE_POINTERS:
2004
2005
2006
2007
2008 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2009 unsigned int s_sacklen;
2010
2011 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2012 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2013 nsp32_adjust_busfree(SCpnt, s_sacklen);
2014 } else {
2015
2016 }
2017 }
2018 data->cur_lunt->msgin03 = FALSE;
2019
2020
2021
2022
2023 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2024
2025
2026
2027
2028 new_sgtp = data->cur_lunt->sglun_paddr +
2029 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2030 nsp32_write4(base, SGT_ADR, new_sgtp);
2031
2032 break;
2033
2034 case SAVE_POINTERS:
2035
2036
2037
2038
2039 nsp32_msg (KERN_WARNING,
2040 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2041
2042 break;
2043
2044 case MESSAGE_REJECT:
2045
2046
2047 if (data->cur_target->sync_flag &
2048 (SDTR_INITIATOR | SDTR_TARGET)) {
2049
2050
2051
2052
2053
2054 nsp32_set_async(data, data->cur_target);
2055 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2056 data->cur_target->sync_flag |= SDTR_DONE;
2057
2058 }
2059 break;
2060
2061 case LINKED_CMD_COMPLETE:
2062 case LINKED_FLG_CMD_COMPLETE:
2063
2064 nsp32_msg (KERN_WARNING,
2065 "unsupported message: 0x%x", msgtype);
2066 break;
2067
2068 case INITIATE_RECOVERY:
2069
2070
2071
2072 goto reject;
2073
2074
2075
2076
2077 case SIMPLE_QUEUE_TAG:
2078 case 0x23:
2079
2080
2081
2082
2083 if (data->msgin_len >= 1) {
2084 goto reject;
2085 }
2086
2087
2088 msgclear = FALSE;
2089
2090 break;
2091
2092
2093
2094
2095 case EXTENDED_MESSAGE:
2096 if (data->msgin_len < 1) {
2097
2098
2099
2100
2101 msgclear = FALSE;
2102 break;
2103 }
2104
2105 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2106
2107
2108
2109
2110
2111
2112 msgclear = FALSE;
2113 break;
2114 }
2115
2116
2117
2118
2119
2120 switch (data->msginbuf[2]) {
2121 case EXTENDED_MODIFY_DATA_POINTER:
2122
2123 goto reject;
2124 break;
2125
2126 case EXTENDED_SDTR:
2127
2128
2129
2130 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2131
2132
2133
2134 goto reject;
2135 break;
2136 }
2137
2138 nsp32_analyze_sdtr(SCpnt);
2139
2140 break;
2141
2142 case EXTENDED_EXTENDED_IDENTIFY:
2143
2144 goto reject;
2145
2146 break;
2147
2148 case EXTENDED_WDTR:
2149 goto reject;
2150
2151 break;
2152
2153 default:
2154 goto reject;
2155 }
2156 break;
2157
2158 default:
2159 goto reject;
2160 }
2161
2162 restart:
2163 if (msgclear == TRUE) {
2164 data->msgin_len = 0;
2165
2166
2167
2168
2169
2170
2171
2172
2173 if (data->msgout_len > 0) {
2174 nsp32_write4(base, SCSI_MSG_OUT, 0);
2175 command |= AUTO_ATN;
2176 }
2177
2178
2179
2180
2181
2182 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2183
2184
2185
2186
2187 if (data->cur_lunt->msgin03 == TRUE) {
2188 command |= AUTO_MSGIN_03;
2189 }
2190 data->cur_lunt->msgin03 = FALSE;
2191 } else {
2192 data->msgin_len++;
2193 }
2194
2195
2196
2197
2198 nsp32_restart_autoscsi(SCpnt, command);
2199
2200
2201
2202
2203 nsp32_wait_req(data, NEGATE);
2204
2205
2206
2207
2208 nsp32_sack_negate(data);
2209
2210 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2211
2212 return;
2213
2214 reject:
2215 nsp32_msg(KERN_WARNING,
2216 "invalid or unsupported MessageIn, rejected. "
2217 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2218 msg, data->msgin_len, msgtype);
2219 nsp32_build_reject(SCpnt);
2220 data->msgin_len = 0;
2221
2222 goto restart;
2223}
2224
2225
2226
2227
2228static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2229{
2230 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2231 nsp32_target *target = data->cur_target;
2232 nsp32_sync_table *synct;
2233 unsigned char get_period = data->msginbuf[3];
2234 unsigned char get_offset = data->msginbuf[4];
2235 int entry;
2236 int syncnum;
2237
2238 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2239
2240 synct = data->synct;
2241 syncnum = data->syncnum;
2242
2243
2244
2245
2246
2247
2248
2249
2250 if (target->sync_flag & SDTR_INITIATOR) {
2251
2252
2253
2254
2255 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2256
2257 target->sync_flag &= ~SDTR_INITIATOR;
2258 target->sync_flag |= SDTR_DONE;
2259
2260
2261
2262
2263 if (get_offset > SYNC_OFFSET) {
2264
2265
2266
2267
2268 goto reject;
2269 }
2270
2271 if (get_offset == ASYNC_OFFSET) {
2272
2273
2274
2275
2276 goto async;
2277 }
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289 if (get_period < data->synct[0].period_num) {
2290
2291
2292
2293
2294 goto reject;
2295 }
2296
2297 entry = nsp32_search_period_entry(data, target, get_period);
2298
2299 if (entry < 0) {
2300
2301
2302
2303
2304 goto reject;
2305 }
2306
2307
2308
2309
2310 nsp32_set_sync_entry(data, target, entry, get_offset);
2311 } else {
2312
2313 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2314
2315 target->sync_flag |= SDTR_INITIATOR;
2316
2317
2318 if (get_offset > SYNC_OFFSET) {
2319
2320 get_offset = SYNC_OFFSET;
2321 }
2322
2323
2324 if (get_period < data->synct[0].period_num) {
2325 get_period = data->synct[0].period_num;
2326 }
2327
2328 entry = nsp32_search_period_entry(data, target, get_period);
2329
2330 if (get_offset == ASYNC_OFFSET || entry < 0) {
2331 nsp32_set_async(data, target);
2332 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2333 } else {
2334 nsp32_set_sync_entry(data, target, entry, get_offset);
2335 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2336 }
2337 }
2338
2339 target->period = get_period;
2340 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2341 return;
2342
2343 reject:
2344
2345
2346
2347
2348 nsp32_build_reject(SCpnt);
2349
2350 async:
2351 nsp32_set_async(data, target);
2352
2353 target->period = 0;
2354 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2355 return;
2356}
2357
2358
2359
2360
2361
2362
2363static int nsp32_search_period_entry(nsp32_hw_data *data,
2364 nsp32_target *target,
2365 unsigned char period)
2366{
2367 int i;
2368
2369 if (target->limit_entry >= data->syncnum) {
2370 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2371 target->limit_entry = 0;
2372 }
2373
2374 for (i = target->limit_entry; i < data->syncnum; i++) {
2375 if (period >= data->synct[i].start_period &&
2376 period <= data->synct[i].end_period) {
2377 break;
2378 }
2379 }
2380
2381
2382
2383
2384
2385 if (i == data->syncnum) {
2386 i = -1;
2387 }
2388
2389 return i;
2390}
2391
2392
2393
2394
2395
2396static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2397{
2398 unsigned char period = data->synct[target->limit_entry].period_num;
2399
2400 target->offset = ASYNC_OFFSET;
2401 target->period = 0;
2402 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2403 target->ackwidth = 0;
2404 target->sample_reg = 0;
2405
2406 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2407}
2408
2409
2410
2411
2412
2413static void nsp32_set_max_sync(nsp32_hw_data *data,
2414 nsp32_target *target,
2415 unsigned char *period,
2416 unsigned char *offset)
2417{
2418 unsigned char period_num, ackwidth;
2419
2420 period_num = data->synct[target->limit_entry].period_num;
2421 *period = data->synct[target->limit_entry].start_period;
2422 ackwidth = data->synct[target->limit_entry].ackwidth;
2423 *offset = SYNC_OFFSET;
2424
2425 target->syncreg = TO_SYNCREG(period_num, *offset);
2426 target->ackwidth = ackwidth;
2427 target->offset = *offset;
2428 target->sample_reg = 0;
2429}
2430
2431
2432
2433
2434
2435static void nsp32_set_sync_entry(nsp32_hw_data *data,
2436 nsp32_target *target,
2437 int entry,
2438 unsigned char offset)
2439{
2440 unsigned char period, ackwidth, sample_rate;
2441
2442 period = data->synct[entry].period_num;
2443 ackwidth = data->synct[entry].ackwidth;
2444 sample_rate = data->synct[entry].sample_rate;
2445
2446 target->syncreg = TO_SYNCREG(period, offset);
2447 target->ackwidth = ackwidth;
2448 target->offset = offset;
2449 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2450
2451 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2452}
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463static void nsp32_wait_req(nsp32_hw_data *data, int state)
2464{
2465 unsigned int base = data->BaseAddress;
2466 int wait_time = 0;
2467 unsigned char bus, req_bit;
2468
2469 if (!((state == ASSERT) || (state == NEGATE))) {
2470 nsp32_msg(KERN_ERR, "unknown state designation");
2471 }
2472
2473 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2474
2475 do {
2476 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2477 if ((bus & BUSMON_REQ) == req_bit) {
2478 nsp32_dbg(NSP32_DEBUG_WAIT,
2479 "wait_time: %d", wait_time);
2480 return;
2481 }
2482 udelay(1);
2483 wait_time++;
2484 } while (wait_time < REQSACK_TIMEOUT_TIME);
2485
2486 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2487}
2488
2489
2490
2491
2492static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2493{
2494 unsigned int base = data->BaseAddress;
2495 int wait_time = 0;
2496 unsigned char bus, ack_bit;
2497
2498 if (!((state == ASSERT) || (state == NEGATE))) {
2499 nsp32_msg(KERN_ERR, "unknown state designation");
2500 }
2501
2502 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2503
2504 do {
2505 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2506 if ((bus & BUSMON_ACK) == ack_bit) {
2507 nsp32_dbg(NSP32_DEBUG_WAIT,
2508 "wait_time: %d", wait_time);
2509 return;
2510 }
2511 udelay(1);
2512 wait_time++;
2513 } while (wait_time < REQSACK_TIMEOUT_TIME);
2514
2515 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2516}
2517
2518
2519
2520
2521
2522
2523static void nsp32_sack_assert(nsp32_hw_data *data)
2524{
2525 unsigned int base = data->BaseAddress;
2526 unsigned char busctrl;
2527
2528 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2529 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2530 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2531}
2532
2533
2534
2535
2536static void nsp32_sack_negate(nsp32_hw_data *data)
2537{
2538 unsigned int base = data->BaseAddress;
2539 unsigned char busctrl;
2540
2541 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2542 busctrl &= ~BUSCTL_ACK;
2543 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2544}
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555static int nsp32_detect(struct pci_dev *pdev)
2556{
2557 struct Scsi_Host *host;
2558 struct resource *res;
2559 nsp32_hw_data *data;
2560 int ret;
2561 int i, j;
2562
2563 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2564
2565
2566
2567
2568 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2569 if (host == NULL) {
2570 nsp32_msg (KERN_ERR, "failed to scsi register");
2571 goto err;
2572 }
2573
2574
2575
2576
2577 data = (nsp32_hw_data *)host->hostdata;
2578
2579 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2580
2581 host->irq = data->IrqNumber;
2582 host->io_port = data->BaseAddress;
2583 host->unique_id = data->BaseAddress;
2584 host->n_io_port = data->NumAddress;
2585 host->base = (unsigned long)data->MmioAddress;
2586
2587 data->Host = host;
2588 spin_lock_init(&(data->Lock));
2589
2590 data->cur_lunt = NULL;
2591 data->cur_target = NULL;
2592
2593
2594
2595
2596 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2597
2598
2599
2600
2601
2602
2603 data->clock = CLOCK_4;
2604
2605
2606
2607
2608 switch (data->clock) {
2609 case CLOCK_4:
2610
2611 data->synct = nsp32_sync_table_40M;
2612 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2613 break;
2614 case CLOCK_2:
2615
2616 data->synct = nsp32_sync_table_20M;
2617 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2618 break;
2619 case PCICLK:
2620
2621 data->synct = nsp32_sync_table_pci;
2622 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2623 break;
2624 default:
2625 nsp32_msg(KERN_WARNING,
2626 "Invalid clock div is selected, set CLOCK_4.");
2627
2628 data->clock = CLOCK_4;
2629 data->synct = nsp32_sync_table_40M;
2630 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2631 }
2632
2633
2634
2635
2636
2637
2638
2639
2640 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
2641 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2642 goto scsi_unregister;
2643 }
2644
2645
2646
2647
2648 data->autoparam = dma_alloc_coherent(&pdev->dev,
2649 sizeof(nsp32_autoparam), &(data->auto_paddr),
2650 GFP_KERNEL);
2651 if (data->autoparam == NULL) {
2652 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2653 goto scsi_unregister;
2654 }
2655
2656
2657
2658
2659 data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2660 &data->sg_paddr, GFP_KERNEL);
2661 if (data->sg_list == NULL) {
2662 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2663 goto free_autoparam;
2664 }
2665
2666 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2667 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2668 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2669 nsp32_lunt tmp = {
2670 .SCpnt = NULL,
2671 .save_datp = 0,
2672 .msgin03 = FALSE,
2673 .sg_num = 0,
2674 .cur_entry = 0,
2675 .sglun = &(data->sg_list[offset]),
2676 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2677 };
2678
2679 data->lunt[i][j] = tmp;
2680 }
2681 }
2682
2683
2684
2685
2686 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2687 nsp32_target *target = &(data->target[i]);
2688
2689 target->limit_entry = 0;
2690 target->sync_flag = 0;
2691 nsp32_set_async(data, target);
2692 }
2693
2694
2695
2696
2697 ret = nsp32_getprom_param(data);
2698 if (ret == FALSE) {
2699 data->resettime = 3;
2700 }
2701
2702
2703
2704
2705 nsp32hw_init(data);
2706
2707 snprintf(data->info_str, sizeof(data->info_str),
2708 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2709 host->irq, host->io_port, host->n_io_port);
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729 nsp32_do_bus_reset(data);
2730
2731 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2732 if (ret < 0) {
2733 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2734 "SCSI PCI controller. Interrupt: %d", host->irq);
2735 goto free_sg_list;
2736 }
2737
2738
2739
2740
2741 res = request_region(host->io_port, host->n_io_port, "nsp32");
2742 if (res == NULL) {
2743 nsp32_msg(KERN_ERR,
2744 "I/O region 0x%lx+0x%lx is already used",
2745 data->BaseAddress, data->NumAddress);
2746 goto free_irq;
2747 }
2748
2749 ret = scsi_add_host(host, &pdev->dev);
2750 if (ret) {
2751 nsp32_msg(KERN_ERR, "failed to add scsi host");
2752 goto free_region;
2753 }
2754 scsi_scan_host(host);
2755 pci_set_drvdata(pdev, host);
2756 return 0;
2757
2758 free_region:
2759 release_region(host->io_port, host->n_io_port);
2760
2761 free_irq:
2762 free_irq(host->irq, data);
2763
2764 free_sg_list:
2765 dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2766 data->sg_list, data->sg_paddr);
2767
2768 free_autoparam:
2769 dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
2770 data->autoparam, data->auto_paddr);
2771
2772 scsi_unregister:
2773 scsi_host_put(host);
2774
2775 err:
2776 return 1;
2777}
2778
2779static int nsp32_release(struct Scsi_Host *host)
2780{
2781 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2782
2783 if (data->autoparam) {
2784 dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
2785 data->autoparam, data->auto_paddr);
2786 }
2787
2788 if (data->sg_list) {
2789 dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
2790 data->sg_list, data->sg_paddr);
2791 }
2792
2793 if (host->irq) {
2794 free_irq(host->irq, data);
2795 }
2796
2797 if (host->io_port && host->n_io_port) {
2798 release_region(host->io_port, host->n_io_port);
2799 }
2800
2801 if (data->MmioAddress) {
2802 iounmap(data->MmioAddress);
2803 }
2804
2805 return 0;
2806}
2807
2808static const char *nsp32_info(struct Scsi_Host *shpnt)
2809{
2810 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2811
2812 return data->info_str;
2813}
2814
2815
2816
2817
2818
2819static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2820{
2821 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2822 unsigned int base = SCpnt->device->host->io_port;
2823
2824 nsp32_msg(KERN_WARNING, "abort");
2825
2826 if (data->cur_lunt->SCpnt == NULL) {
2827 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2828 return FAILED;
2829 }
2830
2831 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2832
2833 data->cur_target->sync_flag = 0;
2834 nsp32_set_async(data, data->cur_target);
2835 }
2836
2837 nsp32_write2(base, TRANSFER_CONTROL, 0);
2838 nsp32_write2(base, BM_CNT, 0);
2839
2840 SCpnt->result = DID_ABORT << 16;
2841 nsp32_scsi_done(SCpnt);
2842
2843 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2844 return SUCCESS;
2845}
2846
2847static void nsp32_do_bus_reset(nsp32_hw_data *data)
2848{
2849 unsigned int base = data->BaseAddress;
2850 unsigned short intrdat;
2851 int i;
2852
2853 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
2854
2855
2856
2857
2858
2859
2860 nsp32_write2(base, TRANSFER_CONTROL, 0);
2861 nsp32_write4(base, BM_CNT, 0);
2862 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2863
2864
2865
2866
2867
2868 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2869 nsp32_target *target = &data->target[i];
2870
2871 target->sync_flag = 0;
2872 nsp32_set_async(data, target);
2873 }
2874
2875
2876
2877
2878 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
2879 mdelay(RESET_HOLD_TIME / 1000);
2880 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
2881 for(i = 0; i < 5; i++) {
2882 intrdat = nsp32_read2(base, IRQ_STATUS);
2883 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
2884 }
2885
2886 data->CurrentSC = NULL;
2887}
2888
2889static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
2890{
2891 struct Scsi_Host *host = SCpnt->device->host;
2892 unsigned int base = SCpnt->device->host->io_port;
2893 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2894
2895 nsp32_msg(KERN_INFO, "Host Reset");
2896 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2897
2898 spin_lock_irq(SCpnt->device->host->host_lock);
2899
2900 nsp32hw_init(data);
2901 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2902 nsp32_do_bus_reset(data);
2903 nsp32_write2(base, IRQ_CONTROL, 0);
2904
2905 spin_unlock_irq(SCpnt->device->host->host_lock);
2906 return SUCCESS;
2907}
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917static int nsp32_getprom_param(nsp32_hw_data *data)
2918{
2919 int vendor = data->pci_devid->vendor;
2920 int device = data->pci_devid->device;
2921 int ret, val, i;
2922
2923
2924
2925
2926 ret = nsp32_prom_read(data, 0x7e);
2927 if (ret != 0x55) {
2928 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
2929 return FALSE;
2930 }
2931 ret = nsp32_prom_read(data, 0x7f);
2932 if (ret != 0xaa) {
2933 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
2934 return FALSE;
2935 }
2936
2937
2938
2939
2940 if (vendor == PCI_VENDOR_ID_WORKBIT &&
2941 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
2942 ret = nsp32_getprom_c16(data);
2943 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2944 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
2945 ret = nsp32_getprom_at24(data);
2946 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2947 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
2948 ret = nsp32_getprom_at24(data);
2949 } else {
2950 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
2951 ret = FALSE;
2952 }
2953
2954
2955 for (i = 0; i <= 0x1f; i++) {
2956 val = nsp32_prom_read(data, i);
2957 nsp32_dbg(NSP32_DEBUG_EEPROM,
2958 "rom address 0x%x : 0x%x", i, val);
2959 }
2960
2961 return ret;
2962}
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992static int nsp32_getprom_at24(nsp32_hw_data *data)
2993{
2994 int ret, i;
2995 int auto_sync;
2996 nsp32_target *target;
2997 int entry;
2998
2999
3000
3001
3002
3003
3004 data->resettime = nsp32_prom_read(data, 0x12);
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019 ret = nsp32_prom_read(data, 0x07);
3020 switch (ret) {
3021 case 0:
3022 auto_sync = TRUE;
3023 break;
3024 case 1:
3025 auto_sync = FALSE;
3026 break;
3027 default:
3028 nsp32_msg(KERN_WARNING,
3029 "Unsupported Auto Sync mode. Fall back to manual mode.");
3030 auto_sync = TRUE;
3031 }
3032
3033 if (trans_mode == ULTRA20M_MODE) {
3034 auto_sync = TRUE;
3035 }
3036
3037
3038
3039
3040 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3041 target = &data->target[i];
3042 if (auto_sync == TRUE) {
3043 target->limit_entry = 0;
3044 } else {
3045 ret = nsp32_prom_read(data, i);
3046 entry = nsp32_search_period_entry(data, target, ret);
3047 if (entry < 0) {
3048
3049 entry = 0;
3050 }
3051 target->limit_entry = entry;
3052 }
3053 }
3054
3055 return TRUE;
3056}
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079static int nsp32_getprom_c16(nsp32_hw_data *data)
3080{
3081 int ret, i;
3082 nsp32_target *target;
3083 int entry, val;
3084
3085
3086
3087
3088
3089
3090 data->resettime = nsp32_prom_read(data, 0x11);
3091
3092
3093
3094
3095 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3096 target = &data->target[i];
3097 ret = nsp32_prom_read(data, i);
3098 switch (ret) {
3099 case 0:
3100 val = 0x0c;
3101 break;
3102 case 1:
3103 val = 0x19;
3104 break;
3105 case 2:
3106 val = 0x32;
3107 break;
3108 case 3:
3109 val = 0x00;
3110 break;
3111 default:
3112 val = 0x0c;
3113 break;
3114 }
3115 entry = nsp32_search_period_entry(data, target, val);
3116 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3117
3118 entry = 0;
3119 }
3120 target->limit_entry = entry;
3121 }
3122
3123 return TRUE;
3124}
3125
3126
3127
3128
3129
3130static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3131{
3132 int i, val;
3133
3134
3135 nsp32_prom_start(data);
3136
3137
3138 nsp32_prom_write_bit(data, 1);
3139 nsp32_prom_write_bit(data, 0);
3140 nsp32_prom_write_bit(data, 1);
3141 nsp32_prom_write_bit(data, 0);
3142 nsp32_prom_write_bit(data, 0);
3143 nsp32_prom_write_bit(data, 0);
3144 nsp32_prom_write_bit(data, 0);
3145
3146
3147 nsp32_prom_write_bit(data, 0);
3148
3149
3150 nsp32_prom_write_bit(data, 0);
3151
3152
3153 for (i = 7; i >= 0; i--) {
3154 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3155 }
3156
3157
3158 nsp32_prom_write_bit(data, 0);
3159
3160
3161 nsp32_prom_start(data);
3162
3163
3164 nsp32_prom_write_bit(data, 1);
3165 nsp32_prom_write_bit(data, 0);
3166 nsp32_prom_write_bit(data, 1);
3167 nsp32_prom_write_bit(data, 0);
3168 nsp32_prom_write_bit(data, 0);
3169 nsp32_prom_write_bit(data, 0);
3170 nsp32_prom_write_bit(data, 0);
3171
3172
3173 nsp32_prom_write_bit(data, 1);
3174
3175
3176 nsp32_prom_write_bit(data, 0);
3177
3178
3179 val = 0;
3180 for (i = 7; i >= 0; i--) {
3181 val += (nsp32_prom_read_bit(data) << i);
3182 }
3183
3184
3185 nsp32_prom_write_bit(data, 1);
3186
3187
3188 nsp32_prom_stop(data);
3189
3190 return val;
3191}
3192
3193static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3194{
3195 int base = data->BaseAddress;
3196 int tmp;
3197
3198 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3199
3200 if (val == 0) {
3201 tmp &= ~bit;
3202 } else {
3203 tmp |= bit;
3204 }
3205
3206 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3207
3208 udelay(10);
3209}
3210
3211static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3212{
3213 int base = data->BaseAddress;
3214 int tmp, ret;
3215
3216 if (bit != SDA) {
3217 nsp32_msg(KERN_ERR, "return value is not appropriate");
3218 return 0;
3219 }
3220
3221
3222 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3223
3224 if (tmp == 0) {
3225 ret = 0;
3226 } else {
3227 ret = 1;
3228 }
3229
3230 udelay(10);
3231
3232 return ret;
3233}
3234
3235static void nsp32_prom_start (nsp32_hw_data *data)
3236{
3237
3238 nsp32_prom_set(data, SCL, 1);
3239 nsp32_prom_set(data, SDA, 1);
3240 nsp32_prom_set(data, ENA, 1);
3241 nsp32_prom_set(data, SDA, 0);
3242
3243 nsp32_prom_set(data, SCL, 0);
3244}
3245
3246static void nsp32_prom_stop (nsp32_hw_data *data)
3247{
3248
3249 nsp32_prom_set(data, SCL, 1);
3250 nsp32_prom_set(data, SDA, 0);
3251 nsp32_prom_set(data, ENA, 1);
3252 nsp32_prom_set(data, SDA, 1);
3253 nsp32_prom_set(data, SCL, 0);
3254}
3255
3256static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3257{
3258
3259 nsp32_prom_set(data, SDA, val);
3260 nsp32_prom_set(data, SCL, 1 );
3261 nsp32_prom_set(data, SCL, 0 );
3262}
3263
3264static int nsp32_prom_read_bit(nsp32_hw_data *data)
3265{
3266 int val;
3267
3268
3269 nsp32_prom_set(data, ENA, 0);
3270 nsp32_prom_set(data, SCL, 1);
3271
3272 val = nsp32_prom_get(data, SDA);
3273
3274 nsp32_prom_set(data, SCL, 0);
3275 nsp32_prom_set(data, ENA, 1);
3276
3277 return val;
3278}
3279
3280
3281
3282
3283
3284#ifdef CONFIG_PM
3285
3286
3287static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
3288{
3289 struct Scsi_Host *host = pci_get_drvdata(pdev);
3290
3291 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3292
3293 pci_save_state (pdev);
3294 pci_disable_device (pdev);
3295 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3296
3297 return 0;
3298}
3299
3300
3301static int nsp32_resume(struct pci_dev *pdev)
3302{
3303 struct Scsi_Host *host = pci_get_drvdata(pdev);
3304 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3305 unsigned short reg;
3306
3307 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3308
3309 pci_set_power_state(pdev, PCI_D0);
3310 pci_enable_wake (pdev, PCI_D0, 0);
3311 pci_restore_state (pdev);
3312
3313 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3314
3315 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3316
3317 if (reg == 0xffff) {
3318 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3319 return 0;
3320 }
3321
3322 nsp32hw_init (data);
3323 nsp32_do_bus_reset(data);
3324
3325 nsp32_msg(KERN_INFO, "resume success");
3326
3327 return 0;
3328}
3329
3330#endif
3331
3332
3333
3334
3335static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3336{
3337 int ret;
3338 nsp32_hw_data *data = &nsp32_data_base;
3339
3340 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3341
3342 ret = pci_enable_device(pdev);
3343 if (ret) {
3344 nsp32_msg(KERN_ERR, "failed to enable pci device");
3345 return ret;
3346 }
3347
3348 data->Pci = pdev;
3349 data->pci_devid = id;
3350 data->IrqNumber = pdev->irq;
3351 data->BaseAddress = pci_resource_start(pdev, 0);
3352 data->NumAddress = pci_resource_len (pdev, 0);
3353 data->MmioAddress = pci_ioremap_bar(pdev, 1);
3354 data->MmioLength = pci_resource_len (pdev, 1);
3355
3356 pci_set_master(pdev);
3357
3358 ret = nsp32_detect(pdev);
3359
3360 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3361 pdev->irq,
3362 data->MmioAddress, data->MmioLength,
3363 pci_name(pdev),
3364 nsp32_model[id->driver_data]);
3365
3366 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3367
3368 return ret;
3369}
3370
3371static void nsp32_remove(struct pci_dev *pdev)
3372{
3373 struct Scsi_Host *host = pci_get_drvdata(pdev);
3374
3375 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3376
3377 scsi_remove_host(host);
3378
3379 nsp32_release(host);
3380
3381 scsi_host_put(host);
3382}
3383
3384static struct pci_driver nsp32_driver = {
3385 .name = "nsp32",
3386 .id_table = nsp32_pci_table,
3387 .probe = nsp32_probe,
3388 .remove = nsp32_remove,
3389#ifdef CONFIG_PM
3390 .suspend = nsp32_suspend,
3391 .resume = nsp32_resume,
3392#endif
3393};
3394
3395
3396
3397
3398static int __init init_nsp32(void) {
3399 nsp32_msg(KERN_INFO, "loading...");
3400 return pci_register_driver(&nsp32_driver);
3401}
3402
3403static void __exit exit_nsp32(void) {
3404 nsp32_msg(KERN_INFO, "unloading...");
3405 pci_unregister_driver(&nsp32_driver);
3406}
3407
3408module_init(init_nsp32);
3409module_exit(exit_nsp32);
3410
3411
3412