LXR linux/drivers/staging/rtl8188eu/hal/odm

   1// SPDX-License-Identifier: GPL-2.0
   2/******************************************************************************
   3 *
   4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5 *
   6 ******************************************************************************/
   7
   8/*  include files */
   9
  10#include "odm_precomp.h"
  11
  12#define READ_AND_CONFIG     READ_AND_CONFIG_MP
  13
  14#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
  15#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
  16
  17static u8 odm_query_rxpwrpercentage(s8 antpower)
  18{
  19        if ((antpower <= -100) || (antpower >= 20))
  20                return 0;
  21        else if (antpower >= 0)
  22                return 100;
  23        else
  24                return 100 + antpower;
  25}
  26
  27/*  2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
  28/*  IF other SW team do not support the feature, remove this section.?? */
  29static s32 odm_signal_scale_mapping(struct odm_dm_struct *dm_odm, s32 currsig)
  30{
  31        s32 retsig = 0;
  32
  33        if (currsig >= 51 && currsig <= 100)
  34                retsig = 100;
  35        else if (currsig >= 41 && currsig <= 50)
  36                retsig = 80 + ((currsig - 40) * 2);
  37        else if (currsig >= 31 && currsig <= 40)
  38                retsig = 66 + (currsig - 30);
  39        else if (currsig >= 21 && currsig <= 30)
  40                retsig = 54 + (currsig - 20);
  41        else if (currsig >= 10 && currsig <= 20)
  42                retsig = 42 + (((currsig - 10) * 2) / 3);
  43        else if (currsig >= 5 && currsig <= 9)
  44                retsig = 22 + (((currsig - 5) * 3) / 2);
  45        else if (currsig >= 1 && currsig <= 4)
  46                retsig = 6 + (((currsig - 1) * 3) / 2);
  47        else
  48                retsig = currsig;
  49
  50        return retsig;
  51}
  52
  53static u8 odm_evm_db_to_percentage(s8 value)
  54{
  55        /*  -33dB~0dB to 0%~99% */
  56        s8 ret_val = clamp(-value, 0, 33) * 3;
  57
  58        if (ret_val == 99)
  59                ret_val = 100;
  60
  61        return ret_val;
  62}
  63
  64static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
  65                        struct odm_phy_status_info *pPhyInfo,
  66                        u8 *pPhyStatus,
  67                        struct odm_per_pkt_info *pPktinfo)
  68{
  69        struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
  70        u8 i, max_spatial_stream;
  71        s8 rx_pwr[4], rx_pwr_all = 0;
  72        u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
  73        u8 RSSI, total_rssi = 0;
  74        bool is_cck_rate;
  75        u8 rf_rx_num = 0;
  76        u8 cck_highpwr = 0;
  77        u8 LNA_idx, VGA_idx;
  78
  79        struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
  80
  81        is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M &&
  82                      pPktinfo->Rate <= DESC92C_RATE11M;
  83
  84        pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
  85        pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
  86
  87        if (is_cck_rate) {
  88                u8 cck_agc_rpt;
  89
  90                dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
  91                /*  (1)Hardware does not provide RSSI for CCK */
  92                /*  (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
  93
  94                cck_highpwr = dm_odm->bCckHighPower;
  95
  96                cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
  97
  98                /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
  99                /* The RSSI formula should be modified according to the gain table */
 100                /* In 88E, cck_highpwr is always set to 1 */
 101                LNA_idx = (cck_agc_rpt & 0xE0) >> 5;
 102                VGA_idx = cck_agc_rpt & 0x1F;
 103                switch (LNA_idx) {
 104                case 7:
 105                        if (VGA_idx <= 27)
 106                                rx_pwr_all = -100 + 2 * (27-VGA_idx); /* VGA_idx = 27~2 */
 107                        else
 108                                rx_pwr_all = -100;
 109                        break;
 110                case 6:
 111                        rx_pwr_all = -48 + 2 * (2-VGA_idx); /* VGA_idx = 2~0 */
 112                        break;
 113                case 5:
 114                        rx_pwr_all = -42 + 2 * (7-VGA_idx); /* VGA_idx = 7~5 */
 115                        break;
 116                case 4:
 117                        rx_pwr_all = -36 + 2 * (7-VGA_idx); /* VGA_idx = 7~4 */
 118                        break;
 119                case 3:
 120                        rx_pwr_all = -24 + 2 * (7-VGA_idx); /* VGA_idx = 7~0 */
 121                        break;
 122                case 2:
 123                        if (cck_highpwr)
 124                                rx_pwr_all = -12 + 2 * (5-VGA_idx); /* VGA_idx = 5~0 */
 125                        else
 126                                rx_pwr_all = -6 + 2 * (5-VGA_idx);
 127                        break;
 128                case 1:
 129                        rx_pwr_all = 8-2 * VGA_idx;
 130                        break;
 131                case 0:
 132                        rx_pwr_all = 14-2 * VGA_idx;
 133                        break;
 134                default:
 135                        break;
 136                }
 137                rx_pwr_all += 6;
 138                PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all);
 139                if (!cck_highpwr) {
 140                        if (PWDB_ALL >= 80)
 141                                PWDB_ALL = ((PWDB_ALL-80)<<1) + ((PWDB_ALL-80)>>1) + 80;
 142                        else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
 143                                PWDB_ALL += 3;
 144                        if (PWDB_ALL > 100)
 145                                PWDB_ALL = 100;
 146                }
 147
 148                pPhyInfo->RxPWDBAll = PWDB_ALL;
 149                pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
 150                pPhyInfo->RecvSignalPower = rx_pwr_all;
 151                /*  (3) Get Signal Quality (EVM) */
 152                if (pPktinfo->bPacketMatchBSSID) {
 153                        u8 SQ, SQ_rpt;
 154
 155                        if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
 156                                SQ = 100;
 157                        } else {
 158                                SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
 159
 160                                if (SQ_rpt > 64)
 161                                        SQ = 0;
 162                                else if (SQ_rpt < 20)
 163                                        SQ = 100;
 164                                else
 165                                        SQ = ((64-SQ_rpt) * 100) / 44;
 166                        }
 167                        pPhyInfo->SignalQuality = SQ;
 168                        pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
 169                        pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
 170                }
 171        } else { /* is OFDM rate */
 172                dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
 173
 174                /*  (1)Get RSSI for HT rate */
 175
 176                for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
 177                        /*  2008/01/30 MH we will judge RF RX path now. */
 178                        if (dm_odm->RFPathRxEnable & BIT(i))
 179                                rf_rx_num++;
 180
 181                        rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F) * 2) - 110;
 182
 183                        pPhyInfo->RxPwr[i] = rx_pwr[i];
 184
 185                        /* Translate DBM to percentage. */
 186                        RSSI = odm_query_rxpwrpercentage(rx_pwr[i]);
 187                        total_rssi += RSSI;
 188
 189                        /* Modification for ext-LNA board */
 190                        if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
 191                                if ((pPhyStaRpt->path_agc[i].trsw) == 1)
 192                                        RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
 193                                else
 194                                        RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
 195
 196                                if ((RSSI <= 34) && (RSSI >= 4))
 197                                        RSSI -= 4;
 198                        }
 199
 200                        pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
 201
 202                        /* Get Rx snr value in DB */
 203                        pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 204                        dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 205                }
 206                /*  (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
 207                rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
 208
 209                PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all);
 210                PWDB_ALL_BT = PWDB_ALL;
 211
 212                pPhyInfo->RxPWDBAll = PWDB_ALL;
 213                pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
 214                pPhyInfo->RxPower = rx_pwr_all;
 215                pPhyInfo->RecvSignalPower = rx_pwr_all;
 216
 217                /*  (3)EVM of HT rate */
 218                if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
 219                        max_spatial_stream = 2; /* both spatial stream make sense */
 220                else
 221                        max_spatial_stream = 1; /* only spatial stream 1 makes sense */
 222
 223                for (i = 0; i < max_spatial_stream; i++) {
 224                        /*  Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
 225                        /*  fill most significant bit to "zero" when doing shifting operation which may change a negative */
 226                        /*  value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
 227                        EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i]));  /* dbm */
 228
 229                        if (pPktinfo->bPacketMatchBSSID) {
 230                                if (i == RF_PATH_A) /*  Fill value in RFD, Get the first spatial stream only */
 231                                        pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
 232                                pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
 233                        }
 234                }
 235        }
 236        /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
 237        /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
 238        if (is_cck_rate) {
 239                pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
 240        } else {
 241                if (rf_rx_num != 0)
 242                        pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, total_rssi /= rf_rx_num));
 243        }
 244
 245        /* For 92C/92D HW (Hybrid) Antenna Diversity */
 246        pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
 247        /* For 88E HW Antenna Diversity */
 248        dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
 249        dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
 250        dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
 251}
 252
 253static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
 254                                  struct odm_phy_status_info *pPhyInfo,
 255                                  struct odm_per_pkt_info *pPktinfo)
 256{
 257        s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
 258        s32 UndecoratedSmoothedOFDM, RSSI_Ave;
 259        bool is_cck_rate;
 260        u8 RSSI_max, RSSI_min, i;
 261        u32 OFDM_pkt = 0;
 262        u32 Weighting = 0;
 263        struct sta_info *pEntry;
 264        u8 antsel_tr_mux;
 265        struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
 266
 267        if (pPktinfo->StationID == 0xFF)
 268                return;
 269        pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
 270        if (!IS_STA_VALID(pEntry))
 271                return;
 272        if ((!pPktinfo->bPacketMatchBSSID))
 273                return;
 274
 275        is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M &&
 276                      pPktinfo->Rate <= DESC92C_RATE11M;
 277
 278        /* Smart Antenna Debug Message------------------  */
 279
 280        if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
 281                if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
 282                        if (pPktinfo->bPacketToSelf) {
 283                                antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 284                                                (pDM_FatTable->antsel_rx_keep_1<<1) |
 285                                                pDM_FatTable->antsel_rx_keep_0;
 286                                pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
 287                                pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
 288                        }
 289                }
 290        } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
 291                if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 292                        antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 293                                        (pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
 294                        rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
 295                }
 296        }
 297        /* Smart Antenna Debug Message------------------ */
 298
 299        UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;
 300        UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
 301        UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
 302
 303        if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 304                if (!is_cck_rate) { /* ofdm rate */
 305                        if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) {
 306                                RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
 307                        } else {
 308                                if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) {
 309                                        RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
 310                                        RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
 311                                } else {
 312                                        RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
 313                                        RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
 314                                }
 315                                if ((RSSI_max - RSSI_min) < 3)
 316                                        RSSI_Ave = RSSI_max;
 317                                else if ((RSSI_max - RSSI_min) < 6)
 318                                        RSSI_Ave = RSSI_max - 1;
 319                                else if ((RSSI_max - RSSI_min) < 10)
 320                                        RSSI_Ave = RSSI_max - 2;
 321                                else
 322                                        RSSI_Ave = RSSI_max - 3;
 323                        }
 324
 325                        /* 1 Process OFDM RSSI */
 326                        if (UndecoratedSmoothedOFDM <= 0) {     /*  initialize */
 327                                UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
 328                        } else {
 329                                if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
 330                                        UndecoratedSmoothedOFDM =
 331                                                        (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor-1)) +
 332                                                        (RSSI_Ave)) / (Rx_Smooth_Factor);
 333                                        UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
 334                                } else {
 335                                        UndecoratedSmoothedOFDM =
 336                                                        (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor-1)) +
 337                                                        (RSSI_Ave)) / (Rx_Smooth_Factor);
 338                                }
 339                        }
 340
 341                        pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT(0);
 342
 343                } else {
 344                        RSSI_Ave = pPhyInfo->RxPWDBAll;
 345
 346                        /* 1 Process CCK RSSI */
 347                        if (UndecoratedSmoothedCCK <= 0) {      /*  initialize */
 348                                UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
 349                        } else {
 350                                if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
 351                                        UndecoratedSmoothedCCK =
 352                                                        ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 353                                                        pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 354                                        UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
 355                                } else {
 356                                        UndecoratedSmoothedCCK =
 357                                                        ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 358                                                        pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 359                                }
 360                        }
 361                        pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
 362                }
 363                /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
 364                if (pEntry->rssi_stat.ValidBit >= 64)
 365                        pEntry->rssi_stat.ValidBit = 64;
 366                else
 367                        pEntry->rssi_stat.ValidBit++;
 368
 369                for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
 370                        OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i) & BIT(0);
 371
 372                if (pEntry->rssi_stat.ValidBit == 64) {
 373                        Weighting = min_t(u32, OFDM_pkt << 4, 64);
 374                        UndecoratedSmoothedPWDB = (Weighting * UndecoratedSmoothedOFDM + (64-Weighting) * UndecoratedSmoothedCCK)>>6;
 375                } else {
 376                        if (pEntry->rssi_stat.ValidBit != 0)
 377                                UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
 378                                                          (pEntry->rssi_stat.ValidBit-OFDM_pkt) *
 379                                                          UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
 380                        else
 381                                UndecoratedSmoothedPWDB = 0;
 382                }
 383                pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
 384                pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
 385                pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
 386        }
 387}
 388
 389/*  Endianness before calling this API */
 390static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
 391                                         struct odm_phy_status_info *pPhyInfo,
 392                                         u8 *pPhyStatus,
 393                                         struct odm_per_pkt_info *pPktinfo)
 394{
 395        odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
 396                                         pPktinfo);
 397        if (dm_odm->RSSI_test) {
 398                ;/*  Select the packets to do RSSI checking for antenna switching. */
 399        } else {
 400                odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
 401        }
 402}
 403
 404void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
 405                        struct odm_phy_status_info *pPhyInfo,
 406                        u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
 407{
 408        ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
 409}
 410