1
2#ifndef LINUX_BCMA_DRIVER_PCI_H_
3#define LINUX_BCMA_DRIVER_PCI_H_
4
5#include <linux/types.h>
6
7struct pci_dev;
8
9
10#define BCMA_CORE_PCI_CTL 0x0000
11#define BCMA_CORE_PCI_CTL_RST_OE 0x00000001
12#define BCMA_CORE_PCI_CTL_RST 0x00000002
13#define BCMA_CORE_PCI_CTL_CLK_OE 0x00000004
14#define BCMA_CORE_PCI_CTL_CLK 0x00000008
15#define BCMA_CORE_PCI_ARBCTL 0x0010
16#define BCMA_CORE_PCI_ARBCTL_INTERN 0x00000001
17#define BCMA_CORE_PCI_ARBCTL_EXTERN 0x00000002
18#define BCMA_CORE_PCI_ARBCTL_PARKID 0x00000006
19#define BCMA_CORE_PCI_ARBCTL_PARKID_LAST 0x00000000
20#define BCMA_CORE_PCI_ARBCTL_PARKID_4710 0x00000002
21#define BCMA_CORE_PCI_ARBCTL_PARKID_EXT0 0x00000004
22#define BCMA_CORE_PCI_ARBCTL_PARKID_EXT1 0x00000006
23#define BCMA_CORE_PCI_ISTAT 0x0020
24#define BCMA_CORE_PCI_ISTAT_INTA 0x00000001
25#define BCMA_CORE_PCI_ISTAT_INTB 0x00000002
26#define BCMA_CORE_PCI_ISTAT_SERR 0x00000004
27#define BCMA_CORE_PCI_ISTAT_PERR 0x00000008
28#define BCMA_CORE_PCI_ISTAT_PME 0x00000010
29#define BCMA_CORE_PCI_IMASK 0x0024
30#define BCMA_CORE_PCI_IMASK_INTA 0x00000001
31#define BCMA_CORE_PCI_IMASK_INTB 0x00000002
32#define BCMA_CORE_PCI_IMASK_SERR 0x00000004
33#define BCMA_CORE_PCI_IMASK_PERR 0x00000008
34#define BCMA_CORE_PCI_IMASK_PME 0x00000010
35#define BCMA_CORE_PCI_MBOX 0x0028
36#define BCMA_CORE_PCI_MBOX_F0_0 0x00000100
37#define BCMA_CORE_PCI_MBOX_F0_1 0x00000200
38#define BCMA_CORE_PCI_MBOX_F1_0 0x00000400
39#define BCMA_CORE_PCI_MBOX_F1_1 0x00000800
40#define BCMA_CORE_PCI_MBOX_F2_0 0x00001000
41#define BCMA_CORE_PCI_MBOX_F2_1 0x00002000
42#define BCMA_CORE_PCI_MBOX_F3_0 0x00004000
43#define BCMA_CORE_PCI_MBOX_F3_1 0x00008000
44#define BCMA_CORE_PCI_BCAST_ADDR 0x0050
45#define BCMA_CORE_PCI_BCAST_ADDR_MASK 0x000000FF
46#define BCMA_CORE_PCI_BCAST_DATA 0x0054
47#define BCMA_CORE_PCI_GPIO_IN 0x0060
48#define BCMA_CORE_PCI_GPIO_OUT 0x0064
49#define BCMA_CORE_PCI_GPIO_ENABLE 0x0068
50#define BCMA_CORE_PCI_GPIO_CTL 0x006C
51#define BCMA_CORE_PCI_SBTOPCI0 0x0100
52#define BCMA_CORE_PCI_SBTOPCI0_MASK 0xFC000000
53#define BCMA_CORE_PCI_SBTOPCI1 0x0104
54#define BCMA_CORE_PCI_SBTOPCI1_MASK 0xFC000000
55#define BCMA_CORE_PCI_SBTOPCI2 0x0108
56#define BCMA_CORE_PCI_SBTOPCI2_MASK 0xC0000000
57#define BCMA_CORE_PCI_CONFIG_ADDR 0x0120
58#define BCMA_CORE_PCI_CONFIG_DATA 0x0124
59#define BCMA_CORE_PCI_MDIO_CONTROL 0x0128
60#define BCMA_CORE_PCI_MDIOCTL_DIVISOR_MASK 0x7f
61#define BCMA_CORE_PCI_MDIOCTL_DIVISOR_VAL 0x2
62#define BCMA_CORE_PCI_MDIOCTL_PREAM_EN 0x80
63#define BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE 0x100
64#define BCMA_CORE_PCI_MDIO_DATA 0x012c
65#define BCMA_CORE_PCI_MDIODATA_MASK 0x0000ffff
66#define BCMA_CORE_PCI_MDIODATA_TA 0x00020000
67#define BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD 18
68#define BCMA_CORE_PCI_MDIODATA_REGADDR_MASK_OLD 0x003c0000
69#define BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF_OLD 22
70#define BCMA_CORE_PCI_MDIODATA_DEVADDR_MASK_OLD 0x0fc00000
71#define BCMA_CORE_PCI_MDIODATA_REGADDR_SHF 18
72#define BCMA_CORE_PCI_MDIODATA_REGADDR_MASK 0x007c0000
73#define BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF 23
74#define BCMA_CORE_PCI_MDIODATA_DEVADDR_MASK 0x0f800000
75#define BCMA_CORE_PCI_MDIODATA_WRITE 0x10000000
76#define BCMA_CORE_PCI_MDIODATA_READ 0x20000000
77#define BCMA_CORE_PCI_MDIODATA_START 0x40000000
78#define BCMA_CORE_PCI_MDIODATA_DEV_ADDR 0x0
79#define BCMA_CORE_PCI_MDIODATA_BLK_ADDR 0x1F
80#define BCMA_CORE_PCI_MDIODATA_DEV_PLL 0x1d
81#define BCMA_CORE_PCI_MDIODATA_DEV_TX 0x1e
82#define BCMA_CORE_PCI_MDIODATA_DEV_RX 0x1f
83#define BCMA_CORE_PCI_PCIEIND_ADDR 0x0130
84#define BCMA_CORE_PCI_PCIEIND_DATA 0x0134
85#define BCMA_CORE_PCI_CLKREQENCTRL 0x0138
86#define BCMA_CORE_PCI_PCICFG0 0x0400
87#define BCMA_CORE_PCI_PCICFG1 0x0500
88#define BCMA_CORE_PCI_PCICFG2 0x0600
89#define BCMA_CORE_PCI_PCICFG3 0x0700
90#define BCMA_CORE_PCI_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2))
91#define BCMA_CORE_PCI_SPROM_PI_OFFSET 0
92#define BCMA_CORE_PCI_SPROM_PI_MASK 0xf000
93#define BCMA_CORE_PCI_SPROM_PI_SHIFT 12
94#define BCMA_CORE_PCI_SPROM_MISC_CONFIG 5
95#define BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST 0x8000
96#define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20
97#define BCMA_CORE_PCI_SPROM_CLKREQ_ENB 0x0800
98
99
100#define BCMA_CORE_PCI_SBTOPCI_MEM 0x00000000
101#define BCMA_CORE_PCI_SBTOPCI_IO 0x00000001
102#define BCMA_CORE_PCI_SBTOPCI_CFG0 0x00000002
103#define BCMA_CORE_PCI_SBTOPCI_CFG1 0x00000003
104#define BCMA_CORE_PCI_SBTOPCI_PREF 0x00000004
105#define BCMA_CORE_PCI_SBTOPCI_BURST 0x00000008
106#define BCMA_CORE_PCI_SBTOPCI_MRM 0x00000020
107#define BCMA_CORE_PCI_SBTOPCI_RC 0x00000030
108#define BCMA_CORE_PCI_SBTOPCI_RC_READ 0x00000000
109#define BCMA_CORE_PCI_SBTOPCI_RC_READL 0x00000010
110#define BCMA_CORE_PCI_SBTOPCI_RC_READM 0x00000020
111
112
113#define BCMA_CORE_PCI_PLP_MODEREG 0x200
114#define BCMA_CORE_PCI_PLP_STATUSREG 0x204
115#define BCMA_CORE_PCI_PLP_POLARITYINV_STAT 0x10
116#define BCMA_CORE_PCI_PLP_LTSSMCTRLREG 0x208
117#define BCMA_CORE_PCI_PLP_LTLINKNUMREG 0x20c
118#define BCMA_CORE_PCI_PLP_LTLANENUMREG 0x210
119#define BCMA_CORE_PCI_PLP_LTNFTSREG 0x214
120#define BCMA_CORE_PCI_PLP_ATTNREG 0x218
121#define BCMA_CORE_PCI_PLP_ATTNMASKREG 0x21C
122#define BCMA_CORE_PCI_PLP_RXERRCTR 0x220
123#define BCMA_CORE_PCI_PLP_RXFRMERRCTR 0x224
124#define BCMA_CORE_PCI_PLP_RXERRTHRESHREG 0x228
125#define BCMA_CORE_PCI_PLP_TESTCTRLREG 0x22C
126#define BCMA_CORE_PCI_PLP_SERDESCTRLOVRDREG 0x230
127#define BCMA_CORE_PCI_PLP_TIMINGOVRDREG 0x234
128#define BCMA_CORE_PCI_PLP_RXTXSMDIAGREG 0x238
129#define BCMA_CORE_PCI_PLP_LTSSMDIAGREG 0x23C
130
131
132#define BCMA_CORE_PCI_DLLP_LCREG 0x100
133#define BCMA_CORE_PCI_DLLP_LSREG 0x104
134#define BCMA_CORE_PCI_DLLP_LAREG 0x108
135#define BCMA_CORE_PCI_DLLP_LSREG_LINKUP (1 << 16)
136#define BCMA_CORE_PCI_DLLP_LAMASKREG 0x10C
137#define BCMA_CORE_PCI_DLLP_NEXTTXSEQNUMREG 0x110
138#define BCMA_CORE_PCI_DLLP_ACKEDTXSEQNUMREG 0x114
139#define BCMA_CORE_PCI_DLLP_PURGEDTXSEQNUMREG 0x118
140#define BCMA_CORE_PCI_DLLP_RXSEQNUMREG 0x11C
141#define BCMA_CORE_PCI_DLLP_LRREG 0x120
142#define BCMA_CORE_PCI_DLLP_LACKTOREG 0x124
143#define BCMA_CORE_PCI_DLLP_PMTHRESHREG 0x128
144#define BCMA_CORE_PCI_ASPMTIMER_EXTEND 0x01000000
145#define BCMA_CORE_PCI_DLLP_RTRYWPREG 0x12C
146#define BCMA_CORE_PCI_DLLP_RTRYRPREG 0x130
147#define BCMA_CORE_PCI_DLLP_RTRYPPREG 0x134
148#define BCMA_CORE_PCI_DLLP_RTRRWREG 0x138
149#define BCMA_CORE_PCI_DLLP_ECTHRESHREG 0x13C
150#define BCMA_CORE_PCI_DLLP_TLPERRCTRREG 0x140
151#define BCMA_CORE_PCI_DLLP_ERRCTRREG 0x144
152#define BCMA_CORE_PCI_DLLP_NAKRXCTRREG 0x148
153#define BCMA_CORE_PCI_DLLP_TESTREG 0x14C
154#define BCMA_CORE_PCI_DLLP_PKTBIST 0x150
155#define BCMA_CORE_PCI_DLLP_PCIE11 0x154
156
157
158#define BCMA_CORE_PCI_SERDES_RX_CTRL 1
159#define BCMA_CORE_PCI_SERDES_RX_CTRL_FORCE 0x80
160#define BCMA_CORE_PCI_SERDES_RX_CTRL_POLARITY 0x40
161#define BCMA_CORE_PCI_SERDES_RX_TIMER1 2
162#define BCMA_CORE_PCI_SERDES_RX_CDR 6
163#define BCMA_CORE_PCI_SERDES_RX_CDRBW 7
164
165
166#define BCMA_CORE_PCI_SERDES_PLL_CTRL 1
167#define BCMA_CORE_PCI_PLL_CTRL_FREQDET_EN 0x4000
168
169
170#define BCMA_CORE_PCI_BFL_NOPCI 0x00000400
171
172
173#define BCMA_CORE_PCI_CFG_BUS_SHIFT 24
174#define BCMA_CORE_PCI_CFG_SLOT_SHIFT 19
175#define BCMA_CORE_PCI_CFG_FUN_SHIFT 16
176#define BCMA_CORE_PCI_CFG_OFF_SHIFT 0
177
178#define BCMA_CORE_PCI_CFG_BUS_MASK 0xff
179#define BCMA_CORE_PCI_CFG_SLOT_MASK 0x1f
180#define BCMA_CORE_PCI_CFG_FUN_MASK 7
181#define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff
182
183#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
184
185#define BCMA_CORE_PCI_
186
187
188#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
189#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
190#define BCMA_CORE_PCI_MDIO_BLK0 0x800
191#define BCMA_CORE_PCI_MDIO_BLK1 0x801
192#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
193#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
194#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
195#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
196#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
197#define BCMA_CORE_PCI_MDIO_BLK2 0x802
198#define BCMA_CORE_PCI_MDIO_BLK3 0x803
199#define BCMA_CORE_PCI_MDIO_BLK4 0x804
200#define BCMA_CORE_PCI_MDIO_TXPLL 0x808
201#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
202#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
203#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
204
205
206#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
207
208struct bcma_drv_pci;
209struct bcma_bus;
210
211#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
212struct bcma_drv_pci_host {
213 struct bcma_drv_pci *pdev;
214
215 u32 host_cfg_addr;
216 spinlock_t cfgspace_lock;
217
218 struct pci_controller pci_controller;
219 struct pci_ops pci_ops;
220 struct resource mem_resource;
221 struct resource io_resource;
222};
223#endif
224
225struct bcma_drv_pci {
226 struct bcma_device *core;
227 u8 early_setup_done:1;
228 u8 setup_done:1;
229 u8 hostmode:1;
230
231#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
232 struct bcma_drv_pci_host *host_controller;
233#endif
234};
235
236
237#define pcicore_read16(pc, offset) bcma_read16((pc)->core, offset)
238#define pcicore_read32(pc, offset) bcma_read32((pc)->core, offset)
239#define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val)
240#define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
241
242#ifdef CONFIG_BCMA_DRIVER_PCI
243extern void bcma_core_pci_power_save(struct bcma_bus *bus, bool up);
244#else
245static inline void bcma_core_pci_power_save(struct bcma_bus *bus, bool up)
246{
247}
248#endif
249
250#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
251extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
252extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
253#else
254static inline int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev)
255{
256 return -ENOTSUPP;
257}
258static inline int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
259{
260 return -ENOTSUPP;
261}
262#endif
263
264#endif
265