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7#ifndef __LINUX_MFD_TC3589x_H
8#define __LINUX_MFD_TC3589x_H
9
10struct device;
11
12enum tx3589x_block {
13 TC3589x_BLOCK_GPIO = 1 << 0,
14 TC3589x_BLOCK_KEYPAD = 1 << 1,
15};
16
17#define TC3589x_RSTCTRL_IRQRST (1 << 4)
18#define TC3589x_RSTCTRL_TIMRST (1 << 3)
19#define TC3589x_RSTCTRL_ROTRST (1 << 2)
20#define TC3589x_RSTCTRL_KBDRST (1 << 1)
21#define TC3589x_RSTCTRL_GPIRST (1 << 0)
22
23
24#define TC3589x_KBDSETTLE_REG 0x01
25#define TC3589x_KBDBOUNCE 0x02
26#define TC3589x_KBDSIZE 0x03
27#define TC3589x_KBCFG_LSB 0x04
28#define TC3589x_KBCFG_MSB 0x05
29#define TC3589x_KBDIC 0x08
30#define TC3589x_KBDMSK 0x09
31#define TC3589x_EVTCODE_FIFO 0x10
32#define TC3589x_KBDMFS 0x8F
33
34#define TC3589x_IRQST 0x91
35
36#define TC3589x_MANFCODE_MAGIC 0x03
37#define TC3589x_MANFCODE 0x80
38#define TC3589x_VERSION 0x81
39#define TC3589x_IOCFG 0xA7
40
41#define TC3589x_CLKMODE 0x88
42#define TC3589x_CLKCFG 0x89
43#define TC3589x_CLKEN 0x8A
44
45#define TC3589x_RSTCTRL 0x82
46#define TC3589x_EXTRSTN 0x83
47#define TC3589x_RSTINTCLR 0x84
48
49
50#define TC3589x_IOCFG 0xA7
51#define TC3589x_IOPULLCFG0_LSB 0xAA
52#define TC3589x_IOPULLCFG0_MSB 0xAB
53#define TC3589x_IOPULLCFG1_LSB 0xAC
54#define TC3589x_IOPULLCFG1_MSB 0xAD
55#define TC3589x_IOPULLCFG2_LSB 0xAE
56
57#define TC3589x_GPIOIS0 0xC9
58#define TC3589x_GPIOIS1 0xCA
59#define TC3589x_GPIOIS2 0xCB
60#define TC3589x_GPIOIBE0 0xCC
61#define TC3589x_GPIOIBE1 0xCD
62#define TC3589x_GPIOIBE2 0xCE
63#define TC3589x_GPIOIEV0 0xCF
64#define TC3589x_GPIOIEV1 0xD0
65#define TC3589x_GPIOIEV2 0xD1
66#define TC3589x_GPIOIE0 0xD2
67#define TC3589x_GPIOIE1 0xD3
68#define TC3589x_GPIOIE2 0xD4
69#define TC3589x_GPIORIS0 0xD6
70#define TC3589x_GPIORIS1 0xD7
71#define TC3589x_GPIORIS2 0xD8
72#define TC3589x_GPIOMIS0 0xD9
73#define TC3589x_GPIOMIS1 0xDA
74#define TC3589x_GPIOMIS2 0xDB
75#define TC3589x_GPIOIC0 0xDC
76#define TC3589x_GPIOIC1 0xDD
77#define TC3589x_GPIOIC2 0xDE
78
79#define TC3589x_GPIODATA0 0xC0
80#define TC3589x_GPIOMASK0 0xc1
81#define TC3589x_GPIODATA1 0xC2
82#define TC3589x_GPIOMASK1 0xc3
83#define TC3589x_GPIODATA2 0xC4
84#define TC3589x_GPIOMASK2 0xC5
85
86#define TC3589x_GPIODIR0 0xC6
87#define TC3589x_GPIODIR1 0xC7
88#define TC3589x_GPIODIR2 0xC8
89
90#define TC3589x_GPIOSYNC0 0xE6
91#define TC3589x_GPIOSYNC1 0xE7
92#define TC3589x_GPIOSYNC2 0xE8
93
94#define TC3589x_GPIOWAKE0 0xE9
95#define TC3589x_GPIOWAKE1 0xEA
96#define TC3589x_GPIOWAKE2 0xEB
97
98#define TC3589x_GPIOODM0 0xE0
99#define TC3589x_GPIOODE0 0xE1
100#define TC3589x_GPIOODM1 0xE2
101#define TC3589x_GPIOODE1 0xE3
102#define TC3589x_GPIOODM2 0xE4
103#define TC3589x_GPIOODE2 0xE5
104
105#define TC3589x_INT_GPIIRQ 0
106#define TC3589x_INT_TI0IRQ 1
107#define TC3589x_INT_TI1IRQ 2
108#define TC3589x_INT_TI2IRQ 3
109#define TC3589x_INT_ROTIRQ 5
110#define TC3589x_INT_KBDIRQ 6
111#define TC3589x_INT_PORIRQ 7
112
113#define TC3589x_NR_INTERNAL_IRQS 8
114
115struct tc3589x {
116 struct mutex lock;
117 struct device *dev;
118 struct i2c_client *i2c;
119 struct irq_domain *domain;
120
121 int irq_base;
122 int num_gpio;
123 struct tc3589x_platform_data *pdata;
124};
125
126extern int tc3589x_reg_write(struct tc3589x *tc3589x, u8 reg, u8 data);
127extern int tc3589x_reg_read(struct tc3589x *tc3589x, u8 reg);
128extern int tc3589x_block_read(struct tc3589x *tc3589x, u8 reg, u8 length,
129 u8 *values);
130extern int tc3589x_block_write(struct tc3589x *tc3589x, u8 reg, u8 length,
131 const u8 *values);
132extern int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val);
133
134
135
136
137
138#define TC_KPD_ROWS 0x8
139#define TC_KPD_COLUMNS 0x8
140#define TC_KPD_DEBOUNCE_PERIOD 0xA3
141#define TC_KPD_SETTLE_TIME 0xA3
142
143
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146
147
148struct tc3589x_platform_data {
149 unsigned int block;
150};
151
152#endif
153