LXR linux/include/linux/mtd/spinand.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Copyright (c) 2016-2017 Micron Technology, Inc.
   4 *
   5 *  Authors:
   6 *      Peter Pan <peterpandong@micron.com>
   7 */
   8#ifndef __LINUX_MTD_SPINAND_H
   9#define __LINUX_MTD_SPINAND_H
  10
  11#include <linux/mutex.h>
  12#include <linux/bitops.h>
  13#include <linux/device.h>
  14#include <linux/mtd/mtd.h>
  15#include <linux/mtd/nand.h>
  16#include <linux/spi/spi.h>
  17#include <linux/spi/spi-mem.h>
  18
  19/**
  20 * Standard SPI NAND flash operations
  21 */
  22
  23#define SPINAND_RESET_OP                                                \
  24        SPI_MEM_OP(SPI_MEM_OP_CMD(0xff, 1),                             \
  25                   SPI_MEM_OP_NO_ADDR,                                  \
  26                   SPI_MEM_OP_NO_DUMMY,                                 \
  27                   SPI_MEM_OP_NO_DATA)
  28
  29#define SPINAND_WR_EN_DIS_OP(enable)                                    \
  30        SPI_MEM_OP(SPI_MEM_OP_CMD((enable) ? 0x06 : 0x04, 1),           \
  31                   SPI_MEM_OP_NO_ADDR,                                  \
  32                   SPI_MEM_OP_NO_DUMMY,                                 \
  33                   SPI_MEM_OP_NO_DATA)
  34
  35#define SPINAND_READID_OP(ndummy, buf, len)                             \
  36        SPI_MEM_OP(SPI_MEM_OP_CMD(0x9f, 1),                             \
  37                   SPI_MEM_OP_NO_ADDR,                                  \
  38                   SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  39                   SPI_MEM_OP_DATA_IN(len, buf, 1))
  40
  41#define SPINAND_SET_FEATURE_OP(reg, valptr)                             \
  42        SPI_MEM_OP(SPI_MEM_OP_CMD(0x1f, 1),                             \
  43                   SPI_MEM_OP_ADDR(1, reg, 1),                          \
  44                   SPI_MEM_OP_NO_DUMMY,                                 \
  45                   SPI_MEM_OP_DATA_OUT(1, valptr, 1))
  46
  47#define SPINAND_GET_FEATURE_OP(reg, valptr)                             \
  48        SPI_MEM_OP(SPI_MEM_OP_CMD(0x0f, 1),                             \
  49                   SPI_MEM_OP_ADDR(1, reg, 1),                          \
  50                   SPI_MEM_OP_NO_DUMMY,                                 \
  51                   SPI_MEM_OP_DATA_IN(1, valptr, 1))
  52
  53#define SPINAND_BLK_ERASE_OP(addr)                                      \
  54        SPI_MEM_OP(SPI_MEM_OP_CMD(0xd8, 1),                             \
  55                   SPI_MEM_OP_ADDR(3, addr, 1),                         \
  56                   SPI_MEM_OP_NO_DUMMY,                                 \
  57                   SPI_MEM_OP_NO_DATA)
  58
  59#define SPINAND_PAGE_READ_OP(addr)                                      \
  60        SPI_MEM_OP(SPI_MEM_OP_CMD(0x13, 1),                             \
  61                   SPI_MEM_OP_ADDR(3, addr, 1),                         \
  62                   SPI_MEM_OP_NO_DUMMY,                                 \
  63                   SPI_MEM_OP_NO_DATA)
  64
  65#define SPINAND_PAGE_READ_FROM_CACHE_OP(fast, addr, ndummy, buf, len)   \
  66        SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1),               \
  67                   SPI_MEM_OP_ADDR(2, addr, 1),                         \
  68                   SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  69                   SPI_MEM_OP_DATA_IN(len, buf, 1))
  70
  71#define SPINAND_PAGE_READ_FROM_CACHE_X2_OP(addr, ndummy, buf, len)      \
  72        SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1),                             \
  73                   SPI_MEM_OP_ADDR(2, addr, 1),                         \
  74                   SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  75                   SPI_MEM_OP_DATA_IN(len, buf, 2))
  76
  77#define SPINAND_PAGE_READ_FROM_CACHE_X4_OP(addr, ndummy, buf, len)      \
  78        SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1),                             \
  79                   SPI_MEM_OP_ADDR(2, addr, 1),                         \
  80                   SPI_MEM_OP_DUMMY(ndummy, 1),                         \
  81                   SPI_MEM_OP_DATA_IN(len, buf, 4))
  82
  83#define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(addr, ndummy, buf, len)  \
  84        SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1),                             \
  85                   SPI_MEM_OP_ADDR(2, addr, 2),                         \
  86                   SPI_MEM_OP_DUMMY(ndummy, 2),                         \
  87                   SPI_MEM_OP_DATA_IN(len, buf, 2))
  88
  89#define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(addr, ndummy, buf, len)  \
  90        SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1),                             \
  91                   SPI_MEM_OP_ADDR(2, addr, 4),                         \
  92                   SPI_MEM_OP_DUMMY(ndummy, 4),                         \
  93                   SPI_MEM_OP_DATA_IN(len, buf, 4))
  94
  95#define SPINAND_PROG_EXEC_OP(addr)                                      \
  96        SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1),                             \
  97                   SPI_MEM_OP_ADDR(3, addr, 1),                         \
  98                   SPI_MEM_OP_NO_DUMMY,                                 \
  99                   SPI_MEM_OP_NO_DATA)
 100
 101#define SPINAND_PROG_LOAD(reset, addr, buf, len)                        \
 102        SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x02 : 0x84, 1),              \
 103                   SPI_MEM_OP_ADDR(2, addr, 1),                         \
 104                   SPI_MEM_OP_NO_DUMMY,                                 \
 105                   SPI_MEM_OP_DATA_OUT(len, buf, 1))
 106
 107#define SPINAND_PROG_LOAD_X4(reset, addr, buf, len)                     \
 108        SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x32 : 0x34, 1),              \
 109                   SPI_MEM_OP_ADDR(2, addr, 1),                         \
 110                   SPI_MEM_OP_NO_DUMMY,                                 \
 111                   SPI_MEM_OP_DATA_OUT(len, buf, 4))
 112
 113/**
 114 * Standard SPI NAND flash commands
 115 */
 116#define SPINAND_CMD_PROG_LOAD_X4                0x32
 117#define SPINAND_CMD_PROG_LOAD_RDM_DATA_X4       0x34
 118
 119/* feature register */
 120#define REG_BLOCK_LOCK          0xa0
 121#define BL_ALL_UNLOCKED         0x00
 122
 123/* configuration register */
 124#define REG_CFG                 0xb0
 125#define CFG_OTP_ENABLE          BIT(6)
 126#define CFG_ECC_ENABLE          BIT(4)
 127#define CFG_QUAD_ENABLE         BIT(0)
 128
 129/* status register */
 130#define REG_STATUS              0xc0
 131#define STATUS_BUSY             BIT(0)
 132#define STATUS_ERASE_FAILED     BIT(2)
 133#define STATUS_PROG_FAILED      BIT(3)
 134#define STATUS_ECC_MASK         GENMASK(5, 4)
 135#define STATUS_ECC_NO_BITFLIPS  (0 << 4)
 136#define STATUS_ECC_HAS_BITFLIPS (1 << 4)
 137#define STATUS_ECC_UNCOR_ERROR  (2 << 4)
 138
 139struct spinand_op;
 140struct spinand_device;
 141
 142#define SPINAND_MAX_ID_LEN      4
 143
 144/**
 145 * struct spinand_id - SPI NAND id structure
 146 * @data: buffer containing the id bytes. Currently 4 bytes large, but can
 147 *        be extended if required
 148 * @len: ID length
 149 *
 150 * struct_spinand_id->data contains all bytes returned after a READ_ID command,
 151 * including dummy bytes if the chip does not emit ID bytes right after the
 152 * READ_ID command. The responsibility to extract real ID bytes is left to
 153 * struct_manufacurer_ops->detect().
 154 */
 155struct spinand_id {
 156        u8 data[SPINAND_MAX_ID_LEN];
 157        int len;
 158};
 159
 160/**
 161 * struct manufacurer_ops - SPI NAND manufacturer specific operations
 162 * @detect: detect a SPI NAND device. Every time a SPI NAND device is probed
 163 *          the core calls the struct_manufacurer_ops->detect() hook of each
 164 *          registered manufacturer until one of them return 1. Note that
 165 *          the first thing to check in this hook is that the manufacturer ID
 166 *          in struct_spinand_device->id matches the manufacturer whose
 167 *          ->detect() hook has been called. Should return 1 if there's a
 168 *          match, 0 if the manufacturer ID does not match and a negative
 169 *          error code otherwise. When true is returned, the core assumes
 170 *          that properties of the NAND chip (spinand->base.memorg and
 171 *          spinand->base.eccreq) have been filled
 172 * @init: initialize a SPI NAND device
 173 * @cleanup: cleanup a SPI NAND device
 174 *
 175 * Each SPI NAND manufacturer driver should implement this interface so that
 176 * NAND chips coming from this vendor can be detected and initialized properly.
 177 */
 178struct spinand_manufacturer_ops {
 179        int (*detect)(struct spinand_device *spinand);
 180        int (*init)(struct spinand_device *spinand);
 181        void (*cleanup)(struct spinand_device *spinand);
 182};
 183
 184/**
 185 * struct spinand_manufacturer - SPI NAND manufacturer instance
 186 * @id: manufacturer ID
 187 * @name: manufacturer name
 188 * @ops: manufacturer operations
 189 */
 190struct spinand_manufacturer {
 191        u8 id;
 192        char *name;
 193        const struct spinand_manufacturer_ops *ops;
 194};
 195
 196/* SPI NAND manufacturers */
 197extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
 198extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 199extern const struct spinand_manufacturer micron_spinand_manufacturer;
 200extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
 201extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 202
 203/**
 204 * struct spinand_op_variants - SPI NAND operation variants
 205 * @ops: the list of variants for a given operation
 206 * @nops: the number of variants
 207 *
 208 * Some operations like read-from-cache/write-to-cache have several variants
 209 * depending on the number of IO lines you use to transfer data or address
 210 * cycles. This structure is a way to describe the different variants supported
 211 * by a chip and let the core pick the best one based on the SPI mem controller
 212 * capabilities.
 213 */
 214struct spinand_op_variants {
 215        const struct spi_mem_op *ops;
 216        unsigned int nops;
 217};
 218
 219#define SPINAND_OP_VARIANTS(name, ...)                                  \
 220        const struct spinand_op_variants name = {                       \
 221                .ops = (struct spi_mem_op[]) { __VA_ARGS__ },           \
 222                .nops = sizeof((struct spi_mem_op[]){ __VA_ARGS__ }) /  \
 223                        sizeof(struct spi_mem_op),                      \
 224        }
 225
 226/**
 227 * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND
 228 *                    chip
 229 * @get_status: get the ECC status. Should return a positive number encoding
 230 *              the number of corrected bitflips if correction was possible or
 231 *              -EBADMSG if there are uncorrectable errors. I can also return
 232 *              other negative error codes if the error is not caused by
 233 *              uncorrectable bitflips
 234 * @ooblayout: the OOB layout used by the on-die ECC implementation
 235 */
 236struct spinand_ecc_info {
 237        int (*get_status)(struct spinand_device *spinand, u8 status);
 238        const struct mtd_ooblayout_ops *ooblayout;
 239};
 240
 241#define SPINAND_HAS_QE_BIT              BIT(0)
 242
 243/**
 244 * struct spinand_info - Structure used to describe SPI NAND chips
 245 * @model: model name
 246 * @devid: device ID
 247 * @flags: OR-ing of the SPINAND_XXX flags
 248 * @memorg: memory organization
 249 * @eccreq: ECC requirements
 250 * @eccinfo: on-die ECC info
 251 * @op_variants: operations variants
 252 * @op_variants.read_cache: variants of the read-cache operation
 253 * @op_variants.write_cache: variants of the write-cache operation
 254 * @op_variants.update_cache: variants of the update-cache operation
 255 * @select_target: function used to select a target/die. Required only for
 256 *                 multi-die chips
 257 *
 258 * Each SPI NAND manufacturer driver should have a spinand_info table
 259 * describing all the chips supported by the driver.
 260 */
 261struct spinand_info {
 262        const char *model;
 263        u8 devid;
 264        u32 flags;
 265        struct nand_memory_organization memorg;
 266        struct nand_ecc_req eccreq;
 267        struct spinand_ecc_info eccinfo;
 268        struct {
 269                const struct spinand_op_variants *read_cache;
 270                const struct spinand_op_variants *write_cache;
 271                const struct spinand_op_variants *update_cache;
 272        } op_variants;
 273        int (*select_target)(struct spinand_device *spinand,
 274                             unsigned int target);
 275};
 276
 277#define SPINAND_INFO_OP_VARIANTS(__read, __write, __update)             \
 278        {                                                               \
 279                .read_cache = __read,                                   \
 280                .write_cache = __write,                                 \
 281                .update_cache = __update,                               \
 282        }
 283
 284#define SPINAND_ECCINFO(__ooblayout, __get_status)                      \
 285        .eccinfo = {                                                    \
 286                .ooblayout = __ooblayout,                               \
 287                .get_status = __get_status,                             \
 288        }
 289
 290#define SPINAND_SELECT_TARGET(__func)                                   \
 291        .select_target = __func,
 292
 293#define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants,  \
 294                     __flags, ...)                                      \
 295        {                                                               \
 296                .model = __model,                                       \
 297                .devid = __id,                                          \
 298                .memorg = __memorg,                                     \
 299                .eccreq = __eccreq,                                     \
 300                .op_variants = __op_variants,                           \
 301                .flags = __flags,                                       \
 302                __VA_ARGS__                                             \
 303        }
 304
 305/**
 306 * struct spinand_device - SPI NAND device instance
 307 * @base: NAND device instance
 308 * @spimem: pointer to the SPI mem object
 309 * @lock: lock used to serialize accesses to the NAND
 310 * @id: NAND ID as returned by READ_ID
 311 * @flags: NAND flags
 312 * @op_templates: various SPI mem op templates
 313 * @op_templates.read_cache: read cache op template
 314 * @op_templates.write_cache: write cache op template
 315 * @op_templates.update_cache: update cache op template
 316 * @select_target: select a specific target/die. Usually called before sending
 317 *                 a command addressing a page or an eraseblock embedded in
 318 *                 this die. Only required if your chip exposes several dies
 319 * @cur_target: currently selected target/die
 320 * @eccinfo: on-die ECC information
 321 * @cfg_cache: config register cache. One entry per die
 322 * @databuf: bounce buffer for data
 323 * @oobbuf: bounce buffer for OOB data
 324 * @scratchbuf: buffer used for everything but page accesses. This is needed
 325 *              because the spi-mem interface explicitly requests that buffers
 326 *              passed in spi_mem_op be DMA-able, so we can't based the bufs on
 327 *              the stack
 328 * @manufacturer: SPI NAND manufacturer information
 329 * @priv: manufacturer private data
 330 */
 331struct spinand_device {
 332        struct nand_device base;
 333        struct spi_mem *spimem;
 334        struct mutex lock;
 335        struct spinand_id id;
 336        u32 flags;
 337
 338        struct {
 339                const struct spi_mem_op *read_cache;
 340                const struct spi_mem_op *write_cache;
 341                const struct spi_mem_op *update_cache;
 342        } op_templates;
 343
 344        int (*select_target)(struct spinand_device *spinand,
 345                             unsigned int target);
 346        unsigned int cur_target;
 347
 348        struct spinand_ecc_info eccinfo;
 349
 350        u8 *cfg_cache;
 351        u8 *databuf;
 352        u8 *oobbuf;
 353        u8 *scratchbuf;
 354        const struct spinand_manufacturer *manufacturer;
 355        void *priv;
 356};
 357
 358/**
 359 * mtd_to_spinand() - Get the SPI NAND device attached to an MTD instance
 360 * @mtd: MTD instance
 361 *
 362 * Return: the SPI NAND device attached to @mtd.
 363 */
 364static inline struct spinand_device *mtd_to_spinand(struct mtd_info *mtd)
 365{
 366        return container_of(mtd_to_nanddev(mtd), struct spinand_device, base);
 367}
 368
 369/**
 370 * spinand_to_mtd() - Get the MTD device embedded in a SPI NAND device
 371 * @spinand: SPI NAND device
 372 *
 373 * Return: the MTD device embedded in @spinand.
 374 */
 375static inline struct mtd_info *spinand_to_mtd(struct spinand_device *spinand)
 376{
 377        return nanddev_to_mtd(&spinand->base);
 378}
 379
 380/**
 381 * nand_to_spinand() - Get the SPI NAND device embedding an NAND object
 382 * @nand: NAND object
 383 *
 384 * Return: the SPI NAND device embedding @nand.
 385 */
 386static inline struct spinand_device *nand_to_spinand(struct nand_device *nand)
 387{
 388        return container_of(nand, struct spinand_device, base);
 389}
 390
 391/**
 392 * spinand_to_nand() - Get the NAND device embedded in a SPI NAND object
 393 * @spinand: SPI NAND device
 394 *
 395 * Return: the NAND device embedded in @spinand.
 396 */
 397static inline struct nand_device *
 398spinand_to_nand(struct spinand_device *spinand)
 399{
 400        return &spinand->base;
 401}
 402
 403/**
 404 * spinand_set_of_node - Attach a DT node to a SPI NAND device
 405 * @spinand: SPI NAND device
 406 * @np: DT node
 407 *
 408 * Attach a DT node to a SPI NAND device.
 409 */
 410static inline void spinand_set_of_node(struct spinand_device *spinand,
 411                                       struct device_node *np)
 412{
 413        nanddev_set_of_node(&spinand->base, np);
 414}
 415
 416int spinand_match_and_init(struct spinand_device *dev,
 417                           const struct spinand_info *table,
 418                           unsigned int table_size, u8 devid);
 419
 420int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);
 421int spinand_select_target(struct spinand_device *spinand, unsigned int target);
 422
 423#endif /* __LINUX_MTD_SPINAND_H */
 424