linux/sound/soc/codecs/adau1701.c
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   1/*
   2 * Driver for ADAU1701 SigmaDSP processor
   3 *
   4 * Copyright 2011 Analog Devices Inc.
   5 * Author: Lars-Peter Clausen <lars@metafoo.de>
   6 *      based on an inital version by Cliff Cai <cliff.cai@analog.com>
   7 *
   8 * Licensed under the GPL-2 or later.
   9 */
  10
  11#include <linux/module.h>
  12#include <linux/init.h>
  13#include <linux/i2c.h>
  14#include <linux/delay.h>
  15#include <linux/slab.h>
  16#include <linux/of.h>
  17#include <linux/of_gpio.h>
  18#include <linux/of_device.h>
  19#include <linux/regulator/consumer.h>
  20#include <linux/regmap.h>
  21#include <sound/core.h>
  22#include <sound/pcm.h>
  23#include <sound/pcm_params.h>
  24#include <sound/soc.h>
  25
  26#include <asm/unaligned.h>
  27
  28#include "sigmadsp.h"
  29#include "adau1701.h"
  30
  31#define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
  32#define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
  33
  34#define ADAU1701_DSPCTRL        0x081c
  35#define ADAU1701_SEROCTL        0x081e
  36#define ADAU1701_SERICTL        0x081f
  37
  38#define ADAU1701_AUXNPOW        0x0822
  39#define ADAU1701_PINCONF_0      0x0820
  40#define ADAU1701_PINCONF_1      0x0821
  41#define ADAU1701_AUXNPOW        0x0822
  42
  43#define ADAU1701_OSCIPOW        0x0826
  44#define ADAU1701_DACSET         0x0827
  45
  46#define ADAU1701_MAX_REGISTER   0x0828
  47
  48#define ADAU1701_DSPCTRL_CR             (1 << 2)
  49#define ADAU1701_DSPCTRL_DAM            (1 << 3)
  50#define ADAU1701_DSPCTRL_ADM            (1 << 4)
  51#define ADAU1701_DSPCTRL_IST            (1 << 5)
  52#define ADAU1701_DSPCTRL_SR_48          0x00
  53#define ADAU1701_DSPCTRL_SR_96          0x01
  54#define ADAU1701_DSPCTRL_SR_192         0x02
  55#define ADAU1701_DSPCTRL_SR_MASK        0x03
  56
  57#define ADAU1701_SEROCTL_INV_LRCLK      0x2000
  58#define ADAU1701_SEROCTL_INV_BCLK       0x1000
  59#define ADAU1701_SEROCTL_MASTER         0x0800
  60
  61#define ADAU1701_SEROCTL_OBF16          0x0000
  62#define ADAU1701_SEROCTL_OBF8           0x0200
  63#define ADAU1701_SEROCTL_OBF4           0x0400
  64#define ADAU1701_SEROCTL_OBF2           0x0600
  65#define ADAU1701_SEROCTL_OBF_MASK       0x0600
  66
  67#define ADAU1701_SEROCTL_OLF1024        0x0000
  68#define ADAU1701_SEROCTL_OLF512         0x0080
  69#define ADAU1701_SEROCTL_OLF256         0x0100
  70#define ADAU1701_SEROCTL_OLF_MASK       0x0180
  71
  72#define ADAU1701_SEROCTL_MSB_DEALY1     0x0000
  73#define ADAU1701_SEROCTL_MSB_DEALY0     0x0004
  74#define ADAU1701_SEROCTL_MSB_DEALY8     0x0008
  75#define ADAU1701_SEROCTL_MSB_DEALY12    0x000c
  76#define ADAU1701_SEROCTL_MSB_DEALY16    0x0010
  77#define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
  78
  79#define ADAU1701_SEROCTL_WORD_LEN_24    0x0000
  80#define ADAU1701_SEROCTL_WORD_LEN_20    0x0001
  81#define ADAU1701_SEROCTL_WORD_LEN_16    0x0002
  82#define ADAU1701_SEROCTL_WORD_LEN_MASK  0x0003
  83
  84#define ADAU1701_AUXNPOW_VBPD           0x40
  85#define ADAU1701_AUXNPOW_VRPD           0x20
  86
  87#define ADAU1701_SERICTL_I2S            0
  88#define ADAU1701_SERICTL_LEFTJ          1
  89#define ADAU1701_SERICTL_TDM            2
  90#define ADAU1701_SERICTL_RIGHTJ_24      3
  91#define ADAU1701_SERICTL_RIGHTJ_20      4
  92#define ADAU1701_SERICTL_RIGHTJ_18      5
  93#define ADAU1701_SERICTL_RIGHTJ_16      6
  94#define ADAU1701_SERICTL_MODE_MASK      7
  95#define ADAU1701_SERICTL_INV_BCLK       BIT(3)
  96#define ADAU1701_SERICTL_INV_LRCLK      BIT(4)
  97
  98#define ADAU1701_OSCIPOW_OPD            0x04
  99#define ADAU1701_DACSET_DACINIT         1
 100
 101#define ADAU1707_CLKDIV_UNSET           (-1U)
 102
 103#define ADAU1701_FIRMWARE "adau1701.bin"
 104
 105static const char * const supply_names[] = {
 106        "dvdd", "avdd"
 107};
 108
 109struct adau1701 {
 110        int gpio_nreset;
 111        int gpio_pll_mode[2];
 112        unsigned int dai_fmt;
 113        unsigned int pll_clkdiv;
 114        unsigned int sysclk;
 115        struct regmap *regmap;
 116        struct i2c_client *client;
 117        u8 pin_config[12];
 118
 119        struct sigmadsp *sigmadsp;
 120        struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
 121};
 122
 123static const struct snd_kcontrol_new adau1701_controls[] = {
 124        SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
 125};
 126
 127static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
 128        SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
 129        SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
 130        SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
 131        SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
 132        SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
 133
 134        SND_SOC_DAPM_OUTPUT("OUT0"),
 135        SND_SOC_DAPM_OUTPUT("OUT1"),
 136        SND_SOC_DAPM_OUTPUT("OUT2"),
 137        SND_SOC_DAPM_OUTPUT("OUT3"),
 138        SND_SOC_DAPM_INPUT("IN0"),
 139        SND_SOC_DAPM_INPUT("IN1"),
 140};
 141
 142static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
 143        { "OUT0", NULL, "DAC0" },
 144        { "OUT1", NULL, "DAC1" },
 145        { "OUT2", NULL, "DAC2" },
 146        { "OUT3", NULL, "DAC3" },
 147
 148        { "ADC", NULL, "IN0" },
 149        { "ADC", NULL, "IN1" },
 150};
 151
 152static unsigned int adau1701_register_size(struct device *dev,
 153                unsigned int reg)
 154{
 155        switch (reg) {
 156        case ADAU1701_PINCONF_0:
 157        case ADAU1701_PINCONF_1:
 158                return 3;
 159        case ADAU1701_DSPCTRL:
 160        case ADAU1701_SEROCTL:
 161        case ADAU1701_AUXNPOW:
 162        case ADAU1701_OSCIPOW:
 163        case ADAU1701_DACSET:
 164                return 2;
 165        case ADAU1701_SERICTL:
 166                return 1;
 167        }
 168
 169        dev_err(dev, "Unsupported register address: %d\n", reg);
 170        return 0;
 171}
 172
 173static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
 174{
 175        switch (reg) {
 176        case ADAU1701_DACSET:
 177        case ADAU1701_DSPCTRL:
 178                return true;
 179        default:
 180                return false;
 181        }
 182}
 183
 184static int adau1701_reg_write(void *context, unsigned int reg,
 185                              unsigned int value)
 186{
 187        struct i2c_client *client = context;
 188        unsigned int i;
 189        unsigned int size;
 190        uint8_t buf[5];
 191        int ret;
 192
 193        size = adau1701_register_size(&client->dev, reg);
 194        if (size == 0)
 195                return -EINVAL;
 196
 197        buf[0] = reg >> 8;
 198        buf[1] = reg & 0xff;
 199
 200        for (i = size + 1; i >= 2; --i) {
 201                buf[i] = value;
 202                value >>= 8;
 203        }
 204
 205        ret = i2c_master_send(client, buf, size + 2);
 206        if (ret == size + 2)
 207                return 0;
 208        else if (ret < 0)
 209                return ret;
 210        else
 211                return -EIO;
 212}
 213
 214static int adau1701_reg_read(void *context, unsigned int reg,
 215                             unsigned int *value)
 216{
 217        int ret;
 218        unsigned int i;
 219        unsigned int size;
 220        uint8_t send_buf[2], recv_buf[3];
 221        struct i2c_client *client = context;
 222        struct i2c_msg msgs[2];
 223
 224        size = adau1701_register_size(&client->dev, reg);
 225        if (size == 0)
 226                return -EINVAL;
 227
 228        send_buf[0] = reg >> 8;
 229        send_buf[1] = reg & 0xff;
 230
 231        msgs[0].addr = client->addr;
 232        msgs[0].len = sizeof(send_buf);
 233        msgs[0].buf = send_buf;
 234        msgs[0].flags = 0;
 235
 236        msgs[1].addr = client->addr;
 237        msgs[1].len = size;
 238        msgs[1].buf = recv_buf;
 239        msgs[1].flags = I2C_M_RD;
 240
 241        ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 242        if (ret < 0)
 243                return ret;
 244        else if (ret != ARRAY_SIZE(msgs))
 245                return -EIO;
 246
 247        *value = 0;
 248
 249        for (i = 0; i < size; i++) {
 250                *value <<= 8;
 251                *value |= recv_buf[i];
 252        }
 253
 254        return 0;
 255}
 256
 257static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
 258        const uint8_t bytes[], size_t len)
 259{
 260        struct i2c_client *client = to_i2c_client(sigmadsp->dev);
 261        struct adau1701 *adau1701 = i2c_get_clientdata(client);
 262        unsigned int val;
 263        unsigned int i;
 264        uint8_t buf[10];
 265        int ret;
 266
 267        ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
 268        if (ret)
 269                return ret;
 270
 271        if (val & ADAU1701_DSPCTRL_IST)
 272                msleep(50);
 273
 274        for (i = 0; i < len / 4; i++) {
 275                put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
 276                buf[2] = 0x00;
 277                memcpy(buf + 3, bytes + i * 4, 4);
 278                ret = i2c_master_send(client, buf, 7);
 279                if (ret < 0)
 280                        return ret;
 281                else if (ret != 7)
 282                        return -EIO;
 283
 284                put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
 285                put_unaligned_le16(addr + i, buf + 2);
 286                ret = i2c_master_send(client, buf, 4);
 287                if (ret < 0)
 288                        return ret;
 289                else if (ret != 4)
 290                        return -EIO;
 291        }
 292
 293        return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
 294                ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
 295}
 296
 297static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
 298        .safeload = adau1701_safeload,
 299};
 300
 301static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
 302        unsigned int rate)
 303{
 304        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 305        int ret;
 306
 307        sigmadsp_reset(adau1701->sigmadsp);
 308
 309        if (clkdiv != ADAU1707_CLKDIV_UNSET &&
 310            gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
 311            gpio_is_valid(adau1701->gpio_pll_mode[1])) {
 312                switch (clkdiv) {
 313                case 64:
 314                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
 315                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
 316                        break;
 317                case 256:
 318                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
 319                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
 320                        break;
 321                case 384:
 322                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
 323                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
 324                        break;
 325                case 0: /* fallback */
 326                case 512:
 327                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
 328                        gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
 329                        break;
 330                }
 331        }
 332
 333        adau1701->pll_clkdiv = clkdiv;
 334
 335        if (gpio_is_valid(adau1701->gpio_nreset)) {
 336                gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
 337                /* minimum reset time is 20ns */
 338                udelay(1);
 339                gpio_set_value_cansleep(adau1701->gpio_nreset, 1);
 340                /* power-up time may be as long as 85ms */
 341                mdelay(85);
 342        }
 343
 344        /*
 345         * Postpone the firmware download to a point in time when we
 346         * know the correct PLL setup
 347         */
 348        if (clkdiv != ADAU1707_CLKDIV_UNSET) {
 349                ret = sigmadsp_setup(adau1701->sigmadsp, rate);
 350                if (ret) {
 351                        dev_warn(component->dev, "Failed to load firmware\n");
 352                        return ret;
 353                }
 354        }
 355
 356        regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
 357        regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
 358
 359        regcache_mark_dirty(adau1701->regmap);
 360        regcache_sync(adau1701->regmap);
 361
 362        return 0;
 363}
 364
 365static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,
 366                                           struct snd_pcm_hw_params *params)
 367{
 368        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 369        unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
 370        unsigned int val;
 371
 372        switch (params_width(params)) {
 373        case 16:
 374                val = ADAU1701_SEROCTL_WORD_LEN_16;
 375                break;
 376        case 20:
 377                val = ADAU1701_SEROCTL_WORD_LEN_20;
 378                break;
 379        case 24:
 380                val = ADAU1701_SEROCTL_WORD_LEN_24;
 381                break;
 382        default:
 383                return -EINVAL;
 384        }
 385
 386        if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
 387                switch (params_width(params)) {
 388                case 16:
 389                        val |= ADAU1701_SEROCTL_MSB_DEALY16;
 390                        break;
 391                case 20:
 392                        val |= ADAU1701_SEROCTL_MSB_DEALY12;
 393                        break;
 394                case 24:
 395                        val |= ADAU1701_SEROCTL_MSB_DEALY8;
 396                        break;
 397                }
 398                mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
 399        }
 400
 401        regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
 402
 403        return 0;
 404}
 405
 406static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,
 407                                            struct snd_pcm_hw_params *params)
 408{
 409        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 410        unsigned int val;
 411
 412        if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
 413                return 0;
 414
 415        switch (params_width(params)) {
 416        case 16:
 417                val = ADAU1701_SERICTL_RIGHTJ_16;
 418                break;
 419        case 20:
 420                val = ADAU1701_SERICTL_RIGHTJ_20;
 421                break;
 422        case 24:
 423                val = ADAU1701_SERICTL_RIGHTJ_24;
 424                break;
 425        default:
 426                return -EINVAL;
 427        }
 428
 429        regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
 430                ADAU1701_SERICTL_MODE_MASK, val);
 431
 432        return 0;
 433}
 434
 435static int adau1701_hw_params(struct snd_pcm_substream *substream,
 436                struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 437{
 438        struct snd_soc_component *component = dai->component;
 439        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 440        unsigned int clkdiv = adau1701->sysclk / params_rate(params);
 441        unsigned int val;
 442        int ret;
 443
 444        /*
 445         * If the mclk/lrclk ratio changes, the chip needs updated PLL
 446         * mode GPIO settings, and a full reset cycle, including a new
 447         * firmware upload.
 448         */
 449        if (clkdiv != adau1701->pll_clkdiv) {
 450                ret = adau1701_reset(component, clkdiv, params_rate(params));
 451                if (ret < 0)
 452                        return ret;
 453        }
 454
 455        switch (params_rate(params)) {
 456        case 192000:
 457                val = ADAU1701_DSPCTRL_SR_192;
 458                break;
 459        case 96000:
 460                val = ADAU1701_DSPCTRL_SR_96;
 461                break;
 462        case 48000:
 463                val = ADAU1701_DSPCTRL_SR_48;
 464                break;
 465        default:
 466                return -EINVAL;
 467        }
 468
 469        regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
 470                ADAU1701_DSPCTRL_SR_MASK, val);
 471
 472        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 473                return adau1701_set_playback_pcm_format(component, params);
 474        else
 475                return adau1701_set_capture_pcm_format(component, params);
 476}
 477
 478static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
 479                unsigned int fmt)
 480{
 481        struct snd_soc_component *component = codec_dai->component;
 482        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 483        unsigned int serictl = 0x00, seroctl = 0x00;
 484        bool invert_lrclk;
 485
 486        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 487        case SND_SOC_DAIFMT_CBM_CFM:
 488                /* master, 64-bits per sample, 1 frame per sample */
 489                seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
 490                                | ADAU1701_SEROCTL_OLF1024;
 491                break;
 492        case SND_SOC_DAIFMT_CBS_CFS:
 493                break;
 494        default:
 495                return -EINVAL;
 496        }
 497
 498        /* clock inversion */
 499        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 500        case SND_SOC_DAIFMT_NB_NF:
 501                invert_lrclk = false;
 502                break;
 503        case SND_SOC_DAIFMT_NB_IF:
 504                invert_lrclk = true;
 505                break;
 506        case SND_SOC_DAIFMT_IB_NF:
 507                invert_lrclk = false;
 508                serictl |= ADAU1701_SERICTL_INV_BCLK;
 509                seroctl |= ADAU1701_SEROCTL_INV_BCLK;
 510                break;
 511        case SND_SOC_DAIFMT_IB_IF:
 512                invert_lrclk = true;
 513                serictl |= ADAU1701_SERICTL_INV_BCLK;
 514                seroctl |= ADAU1701_SEROCTL_INV_BCLK;
 515                break;
 516        default:
 517                return -EINVAL;
 518        }
 519
 520        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 521        case SND_SOC_DAIFMT_I2S:
 522                break;
 523        case SND_SOC_DAIFMT_LEFT_J:
 524                serictl |= ADAU1701_SERICTL_LEFTJ;
 525                seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
 526                invert_lrclk = !invert_lrclk;
 527                break;
 528        case SND_SOC_DAIFMT_RIGHT_J:
 529                serictl |= ADAU1701_SERICTL_RIGHTJ_24;
 530                seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
 531                invert_lrclk = !invert_lrclk;
 532                break;
 533        default:
 534                return -EINVAL;
 535        }
 536
 537        if (invert_lrclk) {
 538                seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
 539                serictl |= ADAU1701_SERICTL_INV_LRCLK;
 540        }
 541
 542        adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
 543
 544        regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
 545        regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
 546                ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
 547
 548        return 0;
 549}
 550
 551static int adau1701_set_bias_level(struct snd_soc_component *component,
 552                enum snd_soc_bias_level level)
 553{
 554        unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
 555        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 556
 557        switch (level) {
 558        case SND_SOC_BIAS_ON:
 559                break;
 560        case SND_SOC_BIAS_PREPARE:
 561                break;
 562        case SND_SOC_BIAS_STANDBY:
 563                /* Enable VREF and VREF buffer */
 564                regmap_update_bits(adau1701->regmap,
 565                                   ADAU1701_AUXNPOW, mask, 0x00);
 566                break;
 567        case SND_SOC_BIAS_OFF:
 568                /* Disable VREF and VREF buffer */
 569                regmap_update_bits(adau1701->regmap,
 570                                   ADAU1701_AUXNPOW, mask, mask);
 571                break;
 572        }
 573
 574        return 0;
 575}
 576
 577static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
 578{
 579        struct snd_soc_component *component = dai->component;
 580        unsigned int mask = ADAU1701_DSPCTRL_DAM;
 581        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 582        unsigned int val;
 583
 584        if (mute)
 585                val = 0;
 586        else
 587                val = mask;
 588
 589        regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
 590
 591        return 0;
 592}
 593
 594static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,
 595        int source, unsigned int freq, int dir)
 596{
 597        unsigned int val;
 598        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 599
 600        switch (clk_id) {
 601        case ADAU1701_CLK_SRC_OSC:
 602                val = 0x0;
 603                break;
 604        case ADAU1701_CLK_SRC_MCLK:
 605                val = ADAU1701_OSCIPOW_OPD;
 606                break;
 607        default:
 608                return -EINVAL;
 609        }
 610
 611        regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
 612                           ADAU1701_OSCIPOW_OPD, val);
 613        adau1701->sysclk = freq;
 614
 615        return 0;
 616}
 617
 618static int adau1701_startup(struct snd_pcm_substream *substream,
 619        struct snd_soc_dai *dai)
 620{
 621        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
 622
 623        return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
 624}
 625
 626#define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
 627        SNDRV_PCM_RATE_192000)
 628
 629#define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 630        SNDRV_PCM_FMTBIT_S24_LE)
 631
 632static const struct snd_soc_dai_ops adau1701_dai_ops = {
 633        .set_fmt        = adau1701_set_dai_fmt,
 634        .hw_params      = adau1701_hw_params,
 635        .digital_mute   = adau1701_digital_mute,
 636        .startup        = adau1701_startup,
 637};
 638
 639static struct snd_soc_dai_driver adau1701_dai = {
 640        .name = "adau1701",
 641        .playback = {
 642                .stream_name = "Playback",
 643                .channels_min = 2,
 644                .channels_max = 8,
 645                .rates = ADAU1701_RATES,
 646                .formats = ADAU1701_FORMATS,
 647        },
 648        .capture = {
 649                .stream_name = "Capture",
 650                .channels_min = 2,
 651                .channels_max = 8,
 652                .rates = ADAU1701_RATES,
 653                .formats = ADAU1701_FORMATS,
 654        },
 655        .ops = &adau1701_dai_ops,
 656        .symmetric_rates = 1,
 657};
 658
 659#ifdef CONFIG_OF
 660static const struct of_device_id adau1701_dt_ids[] = {
 661        { .compatible = "adi,adau1701", },
 662        { }
 663};
 664MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
 665#endif
 666
 667static int adau1701_probe(struct snd_soc_component *component)
 668{
 669        int i, ret;
 670        unsigned int val;
 671        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 672
 673        ret = sigmadsp_attach(adau1701->sigmadsp, component);
 674        if (ret)
 675                return ret;
 676
 677        ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
 678                                    adau1701->supplies);
 679        if (ret < 0) {
 680                dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
 681                return ret;
 682        }
 683
 684        /*
 685         * Let the pll_clkdiv variable default to something that won't happen
 686         * at runtime. That way, we can postpone the firmware download from
 687         * adau1701_reset() to a point in time when we know the correct PLL
 688         * mode parameters.
 689         */
 690        adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
 691
 692        /* initalize with pre-configured pll mode settings */
 693        ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
 694        if (ret < 0)
 695                goto exit_regulators_disable;
 696
 697        /* set up pin config */
 698        val = 0;
 699        for (i = 0; i < 6; i++)
 700                val |= adau1701->pin_config[i] << (i * 4);
 701
 702        regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
 703
 704        val = 0;
 705        for (i = 0; i < 6; i++)
 706                val |= adau1701->pin_config[i + 6] << (i * 4);
 707
 708        regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
 709
 710        return 0;
 711
 712exit_regulators_disable:
 713
 714        regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
 715        return ret;
 716}
 717
 718static void adau1701_remove(struct snd_soc_component *component)
 719{
 720        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 721
 722        if (gpio_is_valid(adau1701->gpio_nreset))
 723                gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
 724
 725        regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
 726}
 727
 728#ifdef CONFIG_PM
 729static int adau1701_suspend(struct snd_soc_component *component)
 730{
 731        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 732
 733        regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
 734                               adau1701->supplies);
 735
 736        return 0;
 737}
 738
 739static int adau1701_resume(struct snd_soc_component *component)
 740{
 741        struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
 742        int ret;
 743
 744        ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
 745                                    adau1701->supplies);
 746        if (ret < 0) {
 747                dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
 748                return ret;
 749        }
 750
 751        return adau1701_reset(component, adau1701->pll_clkdiv, 0);
 752}
 753#else
 754#define adau1701_resume         NULL
 755#define adau1701_suspend        NULL
 756#endif /* CONFIG_PM */
 757
 758static const struct snd_soc_component_driver adau1701_component_drv = {
 759        .probe                  = adau1701_probe,
 760        .remove                 = adau1701_remove,
 761        .resume                 = adau1701_resume,
 762        .suspend                = adau1701_suspend,
 763        .set_bias_level         = adau1701_set_bias_level,
 764        .controls               = adau1701_controls,
 765        .num_controls           = ARRAY_SIZE(adau1701_controls),
 766        .dapm_widgets           = adau1701_dapm_widgets,
 767        .num_dapm_widgets       = ARRAY_SIZE(adau1701_dapm_widgets),
 768        .dapm_routes            = adau1701_dapm_routes,
 769        .num_dapm_routes        = ARRAY_SIZE(adau1701_dapm_routes),
 770        .set_sysclk             = adau1701_set_sysclk,
 771        .use_pmdown_time        = 1,
 772        .endianness             = 1,
 773        .non_legacy_dai_naming  = 1,
 774};
 775
 776static const struct regmap_config adau1701_regmap = {
 777        .reg_bits               = 16,
 778        .val_bits               = 32,
 779        .max_register           = ADAU1701_MAX_REGISTER,
 780        .cache_type             = REGCACHE_RBTREE,
 781        .volatile_reg           = adau1701_volatile_reg,
 782        .reg_write              = adau1701_reg_write,
 783        .reg_read               = adau1701_reg_read,
 784};
 785
 786static int adau1701_i2c_probe(struct i2c_client *client,
 787                              const struct i2c_device_id *id)
 788{
 789        struct adau1701 *adau1701;
 790        struct device *dev = &client->dev;
 791        int gpio_nreset = -EINVAL;
 792        int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
 793        int ret, i;
 794
 795        adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
 796        if (!adau1701)
 797                return -ENOMEM;
 798
 799        for (i = 0; i < ARRAY_SIZE(supply_names); i++)
 800                adau1701->supplies[i].supply = supply_names[i];
 801
 802        ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
 803                        adau1701->supplies);
 804        if (ret < 0) {
 805                dev_err(dev, "Failed to get regulators: %d\n", ret);
 806                return ret;
 807        }
 808
 809        ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
 810                        adau1701->supplies);
 811        if (ret < 0) {
 812                dev_err(dev, "Failed to enable regulators: %d\n", ret);
 813                return ret;
 814        }
 815
 816        adau1701->client = client;
 817        adau1701->regmap = devm_regmap_init(dev, NULL, client,
 818                                            &adau1701_regmap);
 819        if (IS_ERR(adau1701->regmap)) {
 820                ret = PTR_ERR(adau1701->regmap);
 821                goto exit_regulators_disable;
 822        }
 823
 824
 825        if (dev->of_node) {
 826                gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
 827                if (gpio_nreset < 0 && gpio_nreset != -ENOENT) {
 828                        ret = gpio_nreset;
 829                        goto exit_regulators_disable;
 830                }
 831
 832                gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
 833                                                   "adi,pll-mode-gpios", 0);
 834                if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT) {
 835                        ret = gpio_pll_mode[0];
 836                        goto exit_regulators_disable;
 837                }
 838
 839                gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
 840                                                   "adi,pll-mode-gpios", 1);
 841                if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT) {
 842                        ret = gpio_pll_mode[1];
 843                        goto exit_regulators_disable;
 844                }
 845
 846                of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
 847                                     &adau1701->pll_clkdiv);
 848
 849                of_property_read_u8_array(dev->of_node, "adi,pin-config",
 850                                          adau1701->pin_config,
 851                                          ARRAY_SIZE(adau1701->pin_config));
 852        }
 853
 854        if (gpio_is_valid(gpio_nreset)) {
 855                ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
 856                                            "ADAU1701 Reset");
 857                if (ret < 0)
 858                        goto exit_regulators_disable;
 859        }
 860
 861        if (gpio_is_valid(gpio_pll_mode[0]) &&
 862            gpio_is_valid(gpio_pll_mode[1])) {
 863                ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
 864                                            GPIOF_OUT_INIT_LOW,
 865                                            "ADAU1701 PLL mode 0");
 866                if (ret < 0)
 867                        goto exit_regulators_disable;
 868
 869                ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
 870                                            GPIOF_OUT_INIT_LOW,
 871                                            "ADAU1701 PLL mode 1");
 872                if (ret < 0)
 873                        goto exit_regulators_disable;
 874        }
 875
 876        adau1701->gpio_nreset = gpio_nreset;
 877        adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
 878        adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
 879
 880        i2c_set_clientdata(client, adau1701);
 881
 882        adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
 883                &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
 884        if (IS_ERR(adau1701->sigmadsp)) {
 885                ret = PTR_ERR(adau1701->sigmadsp);
 886                goto exit_regulators_disable;
 887        }
 888
 889        ret = devm_snd_soc_register_component(&client->dev,
 890                        &adau1701_component_drv,
 891                        &adau1701_dai, 1);
 892
 893exit_regulators_disable:
 894
 895        regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
 896        return ret;
 897}
 898
 899static const struct i2c_device_id adau1701_i2c_id[] = {
 900        { "adau1401", 0 },
 901        { "adau1401a", 0 },
 902        { "adau1701", 0 },
 903        { "adau1702", 0 },
 904        { }
 905};
 906MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
 907
 908static struct i2c_driver adau1701_i2c_driver = {
 909        .driver = {
 910                .name   = "adau1701",
 911                .of_match_table = of_match_ptr(adau1701_dt_ids),
 912        },
 913        .probe          = adau1701_i2c_probe,
 914        .id_table       = adau1701_i2c_id,
 915};
 916
 917module_i2c_driver(adau1701_i2c_driver);
 918
 919MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
 920MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
 921MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 922MODULE_LICENSE("GPL");
 923