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12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/clk.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
19#include <linux/platform_device.h>
20#include <linux/spi/spi.h>
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
25#include <sound/soc-dapm.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "rl6231.h"
30#include "rt5616.h"
31
32#define RT5616_PR_RANGE_BASE (0xff + 1)
33#define RT5616_PR_SPACING 0x100
34
35#define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
36
37static const struct regmap_range_cfg rt5616_ranges[] = {
38 {
39 .name = "PR",
40 .range_min = RT5616_PR_BASE,
41 .range_max = RT5616_PR_BASE + 0xf8,
42 .selector_reg = RT5616_PRIV_INDEX,
43 .selector_mask = 0xff,
44 .selector_shift = 0x0,
45 .window_start = RT5616_PRIV_DATA,
46 .window_len = 0x1,
47 },
48};
49
50static const struct reg_sequence init_list[] = {
51 {RT5616_PR_BASE + 0x3d, 0x3e00},
52 {RT5616_PR_BASE + 0x25, 0x6110},
53 {RT5616_PR_BASE + 0x20, 0x611f},
54 {RT5616_PR_BASE + 0x21, 0x4040},
55 {RT5616_PR_BASE + 0x23, 0x0004},
56};
57
58#define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
59
60static const struct reg_default rt5616_reg[] = {
61 { 0x00, 0x0021 },
62 { 0x02, 0xc8c8 },
63 { 0x03, 0xc8c8 },
64 { 0x05, 0x0000 },
65 { 0x0d, 0x0000 },
66 { 0x0f, 0x0808 },
67 { 0x19, 0xafaf },
68 { 0x1c, 0x2f2f },
69 { 0x1e, 0x0000 },
70 { 0x27, 0x7860 },
71 { 0x29, 0x8080 },
72 { 0x2a, 0x5252 },
73 { 0x3b, 0x0000 },
74 { 0x3c, 0x006f },
75 { 0x3d, 0x0000 },
76 { 0x3e, 0x006f },
77 { 0x45, 0x6000 },
78 { 0x4d, 0x0000 },
79 { 0x4e, 0x0000 },
80 { 0x4f, 0x0279 },
81 { 0x50, 0x0000 },
82 { 0x51, 0x0000 },
83 { 0x52, 0x0279 },
84 { 0x53, 0xf000 },
85 { 0x61, 0x0000 },
86 { 0x62, 0x0000 },
87 { 0x63, 0x00c0 },
88 { 0x64, 0x0000 },
89 { 0x65, 0x0000 },
90 { 0x66, 0x0000 },
91 { 0x70, 0x8000 },
92 { 0x73, 0x1104 },
93 { 0x74, 0x0c00 },
94 { 0x80, 0x0000 },
95 { 0x81, 0x0000 },
96 { 0x82, 0x0000 },
97 { 0x8b, 0x0600 },
98 { 0x8e, 0x0004 },
99 { 0x8f, 0x1100 },
100 { 0x90, 0x0000 },
101 { 0x91, 0x0c00 },
102 { 0x92, 0x0000 },
103 { 0x93, 0x2000 },
104 { 0x94, 0x0200 },
105 { 0x95, 0x0000 },
106 { 0xb0, 0x2080 },
107 { 0xb1, 0x0000 },
108 { 0xb2, 0x0000 },
109 { 0xb4, 0x2206 },
110 { 0xb5, 0x1f00 },
111 { 0xb6, 0x0000 },
112 { 0xb7, 0x0000 },
113 { 0xbb, 0x0000 },
114 { 0xbc, 0x0000 },
115 { 0xbd, 0x0000 },
116 { 0xbe, 0x0000 },
117 { 0xbf, 0x0000 },
118 { 0xc0, 0x0100 },
119 { 0xc1, 0x0000 },
120 { 0xc2, 0x0000 },
121 { 0xc8, 0x0000 },
122 { 0xc9, 0x0000 },
123 { 0xca, 0x0000 },
124 { 0xcb, 0x0000 },
125 { 0xcc, 0x0000 },
126 { 0xcd, 0x0000 },
127 { 0xce, 0x0000 },
128 { 0xcf, 0x0013 },
129 { 0xd0, 0x0680 },
130 { 0xd1, 0x1c17 },
131 { 0xd3, 0xb320 },
132 { 0xd4, 0x0000 },
133 { 0xd6, 0x0000 },
134 { 0xd7, 0x0000 },
135 { 0xd9, 0x0809 },
136 { 0xda, 0x0000 },
137 { 0xfa, 0x0010 },
138 { 0xfb, 0x0000 },
139 { 0xfc, 0x0000 },
140 { 0xfe, 0x10ec },
141 { 0xff, 0x6281 },
142};
143
144struct rt5616_priv {
145 struct snd_soc_component *component;
146 struct delayed_work patch_work;
147 struct regmap *regmap;
148 struct clk *mclk;
149
150 int sysclk;
151 int sysclk_src;
152 int lrck[RT5616_AIFS];
153 int bclk[RT5616_AIFS];
154 int master[RT5616_AIFS];
155
156 int pll_src;
157 int pll_in;
158 int pll_out;
159
160};
161
162static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
163{
164 int i;
165
166 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
167 if (reg >= rt5616_ranges[i].range_min &&
168 reg <= rt5616_ranges[i].range_max)
169 return true;
170 }
171
172 switch (reg) {
173 case RT5616_RESET:
174 case RT5616_PRIV_DATA:
175 case RT5616_EQ_CTRL1:
176 case RT5616_DRC_AGC_1:
177 case RT5616_IRQ_CTRL2:
178 case RT5616_INT_IRQ_ST:
179 case RT5616_PGM_REG_ARR1:
180 case RT5616_PGM_REG_ARR3:
181 case RT5616_VENDOR_ID:
182 case RT5616_DEVICE_ID:
183 return true;
184 default:
185 return false;
186 }
187}
188
189static bool rt5616_readable_register(struct device *dev, unsigned int reg)
190{
191 int i;
192
193 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
194 if (reg >= rt5616_ranges[i].range_min &&
195 reg <= rt5616_ranges[i].range_max)
196 return true;
197 }
198
199 switch (reg) {
200 case RT5616_RESET:
201 case RT5616_VERSION_ID:
202 case RT5616_VENDOR_ID:
203 case RT5616_DEVICE_ID:
204 case RT5616_HP_VOL:
205 case RT5616_LOUT_CTRL1:
206 case RT5616_LOUT_CTRL2:
207 case RT5616_IN1_IN2:
208 case RT5616_INL1_INR1_VOL:
209 case RT5616_DAC1_DIG_VOL:
210 case RT5616_ADC_DIG_VOL:
211 case RT5616_ADC_BST_VOL:
212 case RT5616_STO1_ADC_MIXER:
213 case RT5616_AD_DA_MIXER:
214 case RT5616_STO_DAC_MIXER:
215 case RT5616_REC_L1_MIXER:
216 case RT5616_REC_L2_MIXER:
217 case RT5616_REC_R1_MIXER:
218 case RT5616_REC_R2_MIXER:
219 case RT5616_HPO_MIXER:
220 case RT5616_OUT_L1_MIXER:
221 case RT5616_OUT_L2_MIXER:
222 case RT5616_OUT_L3_MIXER:
223 case RT5616_OUT_R1_MIXER:
224 case RT5616_OUT_R2_MIXER:
225 case RT5616_OUT_R3_MIXER:
226 case RT5616_LOUT_MIXER:
227 case RT5616_PWR_DIG1:
228 case RT5616_PWR_DIG2:
229 case RT5616_PWR_ANLG1:
230 case RT5616_PWR_ANLG2:
231 case RT5616_PWR_MIXER:
232 case RT5616_PWR_VOL:
233 case RT5616_PRIV_INDEX:
234 case RT5616_PRIV_DATA:
235 case RT5616_I2S1_SDP:
236 case RT5616_ADDA_CLK1:
237 case RT5616_ADDA_CLK2:
238 case RT5616_GLB_CLK:
239 case RT5616_PLL_CTRL1:
240 case RT5616_PLL_CTRL2:
241 case RT5616_HP_OVCD:
242 case RT5616_DEPOP_M1:
243 case RT5616_DEPOP_M2:
244 case RT5616_DEPOP_M3:
245 case RT5616_CHARGE_PUMP:
246 case RT5616_PV_DET_SPK_G:
247 case RT5616_MICBIAS:
248 case RT5616_A_JD_CTL1:
249 case RT5616_A_JD_CTL2:
250 case RT5616_EQ_CTRL1:
251 case RT5616_EQ_CTRL2:
252 case RT5616_WIND_FILTER:
253 case RT5616_DRC_AGC_1:
254 case RT5616_DRC_AGC_2:
255 case RT5616_DRC_AGC_3:
256 case RT5616_SVOL_ZC:
257 case RT5616_JD_CTRL1:
258 case RT5616_JD_CTRL2:
259 case RT5616_IRQ_CTRL1:
260 case RT5616_IRQ_CTRL2:
261 case RT5616_INT_IRQ_ST:
262 case RT5616_GPIO_CTRL1:
263 case RT5616_GPIO_CTRL2:
264 case RT5616_GPIO_CTRL3:
265 case RT5616_PGM_REG_ARR1:
266 case RT5616_PGM_REG_ARR2:
267 case RT5616_PGM_REG_ARR3:
268 case RT5616_PGM_REG_ARR4:
269 case RT5616_PGM_REG_ARR5:
270 case RT5616_SCB_FUNC:
271 case RT5616_SCB_CTRL:
272 case RT5616_BASE_BACK:
273 case RT5616_MP3_PLUS1:
274 case RT5616_MP3_PLUS2:
275 case RT5616_ADJ_HPF_CTRL1:
276 case RT5616_ADJ_HPF_CTRL2:
277 case RT5616_HP_CALIB_AMP_DET:
278 case RT5616_HP_CALIB2:
279 case RT5616_SV_ZCD1:
280 case RT5616_SV_ZCD2:
281 case RT5616_D_MISC:
282 case RT5616_DUMMY2:
283 case RT5616_DUMMY3:
284 return true;
285 default:
286 return false;
287 }
288}
289
290static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
291static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
292static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
293static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
294static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
295
296
297static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(bst_tlv,
298 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
299 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
300 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
301 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
302 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
303 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
304 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
305);
306
307static const struct snd_kcontrol_new rt5616_snd_controls[] = {
308
309 SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
310 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
311 SOC_DOUBLE("HPVOL Playback Switch", RT5616_HP_VOL,
312 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
313 SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
314 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
315
316 SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
317 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
318 SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
319 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
320 SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
321 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
322
323
324 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
325 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
326 175, 0, dac_vol_tlv),
327
328 SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
329 RT5616_BST_SFT1, 8, 0, bst_tlv),
330 SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
331 RT5616_BST_SFT2, 8, 0, bst_tlv),
332
333 SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
334 RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
335 31, 1, in_vol_tlv),
336
337 SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
338 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
339 SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
340 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
341 127, 0, adc_vol_tlv),
342
343
344 SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
345 RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
346 3, 0, adc_bst_tlv),
347};
348
349static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
350 struct snd_soc_dapm_widget *sink)
351{
352 unsigned int val;
353
354 val = snd_soc_component_read32(snd_soc_dapm_to_component(source->dapm), RT5616_GLB_CLK);
355 val &= RT5616_SCLK_SRC_MASK;
356 if (val == RT5616_SCLK_SRC_PLL1)
357 return 1;
358 else
359 return 0;
360}
361
362
363static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
364 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
365 RT5616_M_STO1_ADC_L1_SFT, 1, 1),
366};
367
368static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
369 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
370 RT5616_M_STO1_ADC_R1_SFT, 1, 1),
371};
372
373static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
374 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
375 RT5616_M_ADCMIX_L_SFT, 1, 1),
376 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
377 RT5616_M_IF1_DAC_L_SFT, 1, 1),
378};
379
380static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
381 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
382 RT5616_M_ADCMIX_R_SFT, 1, 1),
383 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
384 RT5616_M_IF1_DAC_R_SFT, 1, 1),
385};
386
387static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
388 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
389 RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
390 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
391 RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
392};
393
394static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
395 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
396 RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
397 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
398 RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
399};
400
401
402static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
403 SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
404 RT5616_M_IN1_L_RM_L_SFT, 1, 1),
405 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
406 RT5616_M_BST2_RM_L_SFT, 1, 1),
407 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
408 RT5616_M_BST1_RM_L_SFT, 1, 1),
409};
410
411static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
412 SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
413 RT5616_M_IN1_R_RM_R_SFT, 1, 1),
414 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
415 RT5616_M_BST2_RM_R_SFT, 1, 1),
416 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
417 RT5616_M_BST1_RM_R_SFT, 1, 1),
418};
419
420
421
422static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
423 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
424 RT5616_M_BST1_OM_L_SFT, 1, 1),
425 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
426 RT5616_M_BST2_OM_L_SFT, 1, 1),
427 SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
428 RT5616_M_IN1_L_OM_L_SFT, 1, 1),
429 SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
430 RT5616_M_RM_L_OM_L_SFT, 1, 1),
431 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
432 RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
433};
434
435static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
436 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
437 RT5616_M_BST2_OM_R_SFT, 1, 1),
438 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
439 RT5616_M_BST1_OM_R_SFT, 1, 1),
440 SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
441 RT5616_M_IN1_R_OM_R_SFT, 1, 1),
442 SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
443 RT5616_M_RM_R_OM_R_SFT, 1, 1),
444 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
445 RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
446};
447
448static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
449 SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
450 RT5616_M_DAC1_HM_SFT, 1, 1),
451 SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
452 RT5616_M_HPVOL_HM_SFT, 1, 1),
453};
454
455static const struct snd_kcontrol_new rt5616_lout_mix[] = {
456 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
457 RT5616_M_DAC_L1_LM_SFT, 1, 1),
458 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
459 RT5616_M_DAC_R1_LM_SFT, 1, 1),
460 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
461 RT5616_M_OV_L_LM_SFT, 1, 1),
462 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
463 RT5616_M_OV_R_LM_SFT, 1, 1),
464};
465
466static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
467 struct snd_kcontrol *kcontrol, int event)
468{
469 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
470
471 switch (event) {
472 case SND_SOC_DAPM_POST_PMU:
473 snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
474 RT5616_L_MUTE | RT5616_R_MUTE, 0);
475 break;
476
477 case SND_SOC_DAPM_POST_PMD:
478 snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
479 RT5616_L_MUTE | RT5616_R_MUTE,
480 RT5616_L_MUTE | RT5616_R_MUTE);
481 break;
482
483 default:
484 return 0;
485 }
486
487 return 0;
488}
489
490static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
491 struct snd_kcontrol *kcontrol, int event)
492{
493 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
494
495 switch (event) {
496 case SND_SOC_DAPM_POST_PMU:
497
498 snd_soc_component_update_bits(component, RT5616_DEPOP_M2,
499 RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
500 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
501 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
502 RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
503 RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
504 snd_soc_component_write(component, RT5616_PR_BASE +
505 RT5616_HP_DCC_INT1, 0x9f00);
506
507 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
508 RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
509 snd_soc_component_update_bits(component, RT5616_PWR_VOL,
510 RT5616_PWR_HV_L | RT5616_PWR_HV_R,
511 RT5616_PWR_HV_L | RT5616_PWR_HV_R);
512 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
513 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
514 RT5616_PWR_HA, RT5616_PWR_HP_L |
515 RT5616_PWR_HP_R | RT5616_PWR_HA);
516 msleep(50);
517 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
518 RT5616_PWR_FV1 | RT5616_PWR_FV2,
519 RT5616_PWR_FV1 | RT5616_PWR_FV2);
520
521 snd_soc_component_update_bits(component, RT5616_CHARGE_PUMP,
522 RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
523 snd_soc_component_update_bits(component, RT5616_PR_BASE +
524 RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
525 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
526 RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
527 RT5616_HP_CO_EN | RT5616_HP_SG_EN);
528 break;
529 case SND_SOC_DAPM_PRE_PMD:
530 snd_soc_component_update_bits(component, RT5616_PR_BASE +
531 RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
532 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
533 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
534 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
535 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
536
537 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
538 RT5616_SMT_TRIG_MASK |
539 RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK |
540 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
541 RT5616_HP_CB_MASK,
542 RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
543 RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
544 RT5616_HP_SG_EN | RT5616_HP_CB_PD);
545 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
546 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
547 RT5616_PWR_HA, 0);
548 break;
549 default:
550 return 0;
551 }
552
553 return 0;
554}
555
556static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
557 struct snd_kcontrol *kcontrol, int event)
558{
559 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
560
561 switch (event) {
562 case SND_SOC_DAPM_POST_PMU:
563
564 snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
565 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
566 RT5616_CP_FQ3_MASK,
567 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT |
568 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
569 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT);
570 snd_soc_component_write(component, RT5616_PR_BASE +
571 RT5616_MAMP_INT_REG2, 0xfc00);
572 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
573 RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
574 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
575 RT5616_RSTN_MASK, RT5616_RSTN_EN);
576 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
577 RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
578 RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
579 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
580 snd_soc_component_update_bits(component, RT5616_HP_VOL,
581 RT5616_L_MUTE | RT5616_R_MUTE, 0);
582 msleep(100);
583 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
584 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
585 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
586 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
587 msleep(20);
588 snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
589 RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
590 break;
591
592 case SND_SOC_DAPM_PRE_PMD:
593
594 snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
595 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
596 RT5616_CP_FQ3_MASK,
597 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT |
598 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
599 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT);
600 snd_soc_component_write(component, RT5616_PR_BASE +
601 RT5616_MAMP_INT_REG2, 0xfc00);
602 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
603 RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
604 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
605 RT5616_RSTP_MASK, RT5616_RSTP_EN);
606 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
607 RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
608 RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
609 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
610 snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
611 RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
612 msleep(90);
613 snd_soc_component_update_bits(component, RT5616_HP_VOL,
614 RT5616_L_MUTE | RT5616_R_MUTE,
615 RT5616_L_MUTE | RT5616_R_MUTE);
616 msleep(30);
617 break;
618
619 default:
620 return 0;
621 }
622
623 return 0;
624}
625
626static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
627 struct snd_kcontrol *kcontrol, int event)
628{
629 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
630
631 switch (event) {
632 case SND_SOC_DAPM_POST_PMU:
633 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
634 RT5616_PWR_LM, RT5616_PWR_LM);
635 snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
636 RT5616_L_MUTE | RT5616_R_MUTE, 0);
637 break;
638
639 case SND_SOC_DAPM_PRE_PMD:
640 snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
641 RT5616_L_MUTE | RT5616_R_MUTE,
642 RT5616_L_MUTE | RT5616_R_MUTE);
643 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
644 RT5616_PWR_LM, 0);
645 break;
646
647 default:
648 return 0;
649 }
650
651 return 0;
652}
653
654static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
655 struct snd_kcontrol *kcontrol, int event)
656{
657 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
658
659 switch (event) {
660 case SND_SOC_DAPM_POST_PMU:
661 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
662 RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
663 break;
664
665 case SND_SOC_DAPM_PRE_PMD:
666 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
667 RT5616_PWR_BST1_OP2, 0);
668 break;
669
670 default:
671 return 0;
672 }
673
674 return 0;
675}
676
677static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
678 struct snd_kcontrol *kcontrol, int event)
679{
680 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
681
682 switch (event) {
683 case SND_SOC_DAPM_POST_PMU:
684 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
685 RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
686 break;
687
688 case SND_SOC_DAPM_PRE_PMD:
689 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
690 RT5616_PWR_BST2_OP2, 0);
691 break;
692
693 default:
694 return 0;
695 }
696
697 return 0;
698}
699
700static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
701 SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
702 RT5616_PWR_PLL_BIT, 0, NULL, 0),
703
704
705 SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
706 RT5616_PWR_LDO_BIT, 0, NULL, 0),
707 SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
708 RT5616_PWR_MB1_BIT, 0, NULL, 0),
709
710
711 SND_SOC_DAPM_INPUT("MIC1"),
712 SND_SOC_DAPM_INPUT("MIC2"),
713
714 SND_SOC_DAPM_INPUT("IN1P"),
715 SND_SOC_DAPM_INPUT("IN2P"),
716 SND_SOC_DAPM_INPUT("IN2N"),
717
718
719 SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
720 RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
721 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
722 SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
723 RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
724 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
725
726 SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
727 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
728 SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
729 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
730 SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
731 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
732 SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
733 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
734
735
736 SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
737 rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
738 SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
739 rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
740
741 SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
742 RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
743 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
744 SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
745 RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
746 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
747
748
749 SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
750 RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
751 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
752 rt5616_sto1_adc_l_mix,
753 ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
754 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
755 rt5616_sto1_adc_r_mix,
756 ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
757
758
759 SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
760 RT5616_PWR_I2S1_BIT, 0, NULL, 0),
761 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
762 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
763 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
764 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
765
766
767
768
769 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
770 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
771
772
773 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
774
775
776
777 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
778 rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
779 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
780 rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
781
782 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
783 RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
784
785
786 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
787 rt5616_sto_dac_l_mix,
788 ARRAY_SIZE(rt5616_sto_dac_l_mix)),
789 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
790 rt5616_sto_dac_r_mix,
791 ARRAY_SIZE(rt5616_sto_dac_r_mix)),
792
793
794 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
795 RT5616_PWR_DAC_L1_BIT, 0),
796 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
797 RT5616_PWR_DAC_R1_BIT, 0),
798
799 SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
800 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
801 SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
802 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
803
804 SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
805 RT5616_PWR_OV_L_BIT, 0, NULL, 0),
806 SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
807 RT5616_PWR_OV_R_BIT, 0, NULL, 0),
808 SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
809 RT5616_PWR_HV_L_BIT, 0, NULL, 0),
810 SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
811 RT5616_PWR_HV_R_BIT, 0, NULL, 0),
812 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
813 0, 0, NULL, 0),
814 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
815 0, 0, NULL, 0),
816 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
817 0, 0, NULL, 0),
818 SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
819 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
820 SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
821 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
822 SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
823 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
824 SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
825 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
826
827 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
828 rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
829 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
830 rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
831
832 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
833 rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
834 SND_SOC_DAPM_POST_PMU),
835 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
836 rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
837 SND_SOC_DAPM_POST_PMU),
838
839 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
840 rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
841 SND_SOC_DAPM_PRE_PMD),
842
843
844 SND_SOC_DAPM_OUTPUT("HPOL"),
845 SND_SOC_DAPM_OUTPUT("HPOR"),
846 SND_SOC_DAPM_OUTPUT("LOUTL"),
847 SND_SOC_DAPM_OUTPUT("LOUTR"),
848};
849
850static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
851 {"IN1P", NULL, "LDO"},
852 {"IN2P", NULL, "LDO"},
853
854 {"IN1P", NULL, "MIC1"},
855 {"IN2P", NULL, "MIC2"},
856 {"IN2N", NULL, "MIC2"},
857
858 {"BST1", NULL, "IN1P"},
859 {"BST2", NULL, "IN2P"},
860 {"BST2", NULL, "IN2N"},
861 {"BST1", NULL, "micbias1"},
862 {"BST2", NULL, "micbias1"},
863
864 {"INL1 VOL", NULL, "IN2P"},
865 {"INR1 VOL", NULL, "IN2N"},
866
867 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
868 {"RECMIXL", "BST2 Switch", "BST2"},
869 {"RECMIXL", "BST1 Switch", "BST1"},
870
871 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
872 {"RECMIXR", "BST2 Switch", "BST2"},
873 {"RECMIXR", "BST1 Switch", "BST1"},
874
875 {"ADC L", NULL, "RECMIXL"},
876 {"ADC R", NULL, "RECMIXR"},
877
878 {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
879 {"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
880 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
881
882 {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
883 {"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
884 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
885
886 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
887 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
888 {"IF1 ADC1", NULL, "I2S1"},
889
890 {"AIF1TX", NULL, "IF1 ADC1"},
891
892 {"IF1 DAC", NULL, "AIF1RX"},
893 {"IF1 DAC", NULL, "I2S1"},
894
895 {"IF1 DAC1 L", NULL, "IF1 DAC"},
896 {"IF1 DAC1 R", NULL, "IF1 DAC"},
897
898 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
899 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
900 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
901 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
902
903 {"Audio DSP", NULL, "DAC MIXL"},
904 {"Audio DSP", NULL, "DAC MIXR"},
905
906 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
907 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
908 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
909 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
910 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
911 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
912
913 {"DAC L1", NULL, "Stereo DAC MIXL"},
914 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
915 {"DAC R1", NULL, "Stereo DAC MIXR"},
916 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
917
918 {"OUT MIXL", "BST1 Switch", "BST1"},
919 {"OUT MIXL", "BST2 Switch", "BST2"},
920 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
921 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
922 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
923
924 {"OUT MIXR", "BST2 Switch", "BST2"},
925 {"OUT MIXR", "BST1 Switch", "BST1"},
926 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
927 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
928 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
929
930 {"HPOVOL L", NULL, "OUT MIXL"},
931 {"HPOVOL R", NULL, "OUT MIXR"},
932 {"OUTVOL L", NULL, "OUT MIXL"},
933 {"OUTVOL R", NULL, "OUT MIXR"},
934
935 {"DAC 1", NULL, "DAC L1"},
936 {"DAC 1", NULL, "DAC R1"},
937 {"HPOVOL", NULL, "HPOVOL L"},
938 {"HPOVOL", NULL, "HPOVOL R"},
939 {"HPO MIX", "DAC1 Switch", "DAC 1"},
940 {"HPO MIX", "HPVOL Switch", "HPOVOL"},
941
942 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
943 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
944 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
945 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
946
947 {"HP amp", NULL, "HPO MIX"},
948 {"HP amp", NULL, "Charge Pump"},
949 {"HPOL", NULL, "HP amp"},
950 {"HPOR", NULL, "HP amp"},
951
952 {"LOUT amp", NULL, "LOUT MIX"},
953 {"LOUT amp", NULL, "Charge Pump"},
954 {"LOUTL", NULL, "LOUT amp"},
955 {"LOUTR", NULL, "LOUT amp"},
956
957};
958
959static int rt5616_hw_params(struct snd_pcm_substream *substream,
960 struct snd_pcm_hw_params *params,
961 struct snd_soc_dai *dai)
962{
963 struct snd_soc_component *component = dai->component;
964 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
965 unsigned int val_len = 0, val_clk, mask_clk;
966 int pre_div, bclk_ms, frame_size;
967
968 rt5616->lrck[dai->id] = params_rate(params);
969
970 pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
971
972 if (pre_div < 0) {
973 dev_err(component->dev, "Unsupported clock setting\n");
974 return -EINVAL;
975 }
976 frame_size = snd_soc_params_to_frame_size(params);
977 if (frame_size < 0) {
978 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
979 return -EINVAL;
980 }
981 bclk_ms = frame_size > 32 ? 1 : 0;
982 rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
983
984 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
985 rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
986 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
987 bclk_ms, pre_div, dai->id);
988
989 switch (params_format(params)) {
990 case SNDRV_PCM_FORMAT_S16_LE:
991 break;
992 case SNDRV_PCM_FORMAT_S20_3LE:
993 val_len |= RT5616_I2S_DL_20;
994 break;
995 case SNDRV_PCM_FORMAT_S24_LE:
996 val_len |= RT5616_I2S_DL_24;
997 break;
998 case SNDRV_PCM_FORMAT_S8:
999 val_len |= RT5616_I2S_DL_8;
1000 break;
1001 default:
1002 return -EINVAL;
1003 }
1004
1005 mask_clk = RT5616_I2S_PD1_MASK;
1006 val_clk = pre_div << RT5616_I2S_PD1_SFT;
1007 snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
1008 RT5616_I2S_DL_MASK, val_len);
1009 snd_soc_component_update_bits(component, RT5616_ADDA_CLK1, mask_clk, val_clk);
1010
1011 return 0;
1012}
1013
1014static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1015{
1016 struct snd_soc_component *component = dai->component;
1017 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1018 unsigned int reg_val = 0;
1019
1020 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1021 case SND_SOC_DAIFMT_CBM_CFM:
1022 rt5616->master[dai->id] = 1;
1023 break;
1024 case SND_SOC_DAIFMT_CBS_CFS:
1025 reg_val |= RT5616_I2S_MS_S;
1026 rt5616->master[dai->id] = 0;
1027 break;
1028 default:
1029 return -EINVAL;
1030 }
1031
1032 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1033 case SND_SOC_DAIFMT_NB_NF:
1034 break;
1035 case SND_SOC_DAIFMT_IB_NF:
1036 reg_val |= RT5616_I2S_BP_INV;
1037 break;
1038 default:
1039 return -EINVAL;
1040 }
1041
1042 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1043 case SND_SOC_DAIFMT_I2S:
1044 break;
1045 case SND_SOC_DAIFMT_LEFT_J:
1046 reg_val |= RT5616_I2S_DF_LEFT;
1047 break;
1048 case SND_SOC_DAIFMT_DSP_A:
1049 reg_val |= RT5616_I2S_DF_PCM_A;
1050 break;
1051 case SND_SOC_DAIFMT_DSP_B:
1052 reg_val |= RT5616_I2S_DF_PCM_B;
1053 break;
1054 default:
1055 return -EINVAL;
1056 }
1057
1058 snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
1059 RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
1060 RT5616_I2S_DF_MASK, reg_val);
1061
1062 return 0;
1063}
1064
1065static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
1066 int clk_id, unsigned int freq, int dir)
1067{
1068 struct snd_soc_component *component = dai->component;
1069 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1070 unsigned int reg_val = 0;
1071
1072 if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
1073 return 0;
1074
1075 switch (clk_id) {
1076 case RT5616_SCLK_S_MCLK:
1077 reg_val |= RT5616_SCLK_SRC_MCLK;
1078 break;
1079 case RT5616_SCLK_S_PLL1:
1080 reg_val |= RT5616_SCLK_SRC_PLL1;
1081 break;
1082 default:
1083 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1084 return -EINVAL;
1085 }
1086
1087 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1088 RT5616_SCLK_SRC_MASK, reg_val);
1089 rt5616->sysclk = freq;
1090 rt5616->sysclk_src = clk_id;
1091
1092 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1093
1094 return 0;
1095}
1096
1097static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1098 unsigned int freq_in, unsigned int freq_out)
1099{
1100 struct snd_soc_component *component = dai->component;
1101 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1102 struct rl6231_pll_code pll_code;
1103 int ret;
1104
1105 if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
1106 freq_out == rt5616->pll_out)
1107 return 0;
1108
1109 if (!freq_in || !freq_out) {
1110 dev_dbg(component->dev, "PLL disabled\n");
1111
1112 rt5616->pll_in = 0;
1113 rt5616->pll_out = 0;
1114 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1115 RT5616_SCLK_SRC_MASK,
1116 RT5616_SCLK_SRC_MCLK);
1117 return 0;
1118 }
1119
1120 switch (source) {
1121 case RT5616_PLL1_S_MCLK:
1122 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1123 RT5616_PLL1_SRC_MASK,
1124 RT5616_PLL1_SRC_MCLK);
1125 break;
1126 case RT5616_PLL1_S_BCLK1:
1127 case RT5616_PLL1_S_BCLK2:
1128 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1129 RT5616_PLL1_SRC_MASK,
1130 RT5616_PLL1_SRC_BCLK1);
1131 break;
1132 default:
1133 dev_err(component->dev, "Unknown PLL source %d\n", source);
1134 return -EINVAL;
1135 }
1136
1137 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1138 if (ret < 0) {
1139 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
1140 return ret;
1141 }
1142
1143 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1144 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1145 pll_code.n_code, pll_code.k_code);
1146
1147 snd_soc_component_write(component, RT5616_PLL_CTRL1,
1148 pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
1149 snd_soc_component_write(component, RT5616_PLL_CTRL2,
1150 (pll_code.m_bp ? 0 : pll_code.m_code) <<
1151 RT5616_PLL_M_SFT |
1152 pll_code.m_bp << RT5616_PLL_M_BP_SFT);
1153
1154 rt5616->pll_in = freq_in;
1155 rt5616->pll_out = freq_out;
1156 rt5616->pll_src = source;
1157
1158 return 0;
1159}
1160
1161static int rt5616_set_bias_level(struct snd_soc_component *component,
1162 enum snd_soc_bias_level level)
1163{
1164 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1165 int ret;
1166
1167 switch (level) {
1168
1169 case SND_SOC_BIAS_ON:
1170 break;
1171
1172 case SND_SOC_BIAS_PREPARE:
1173
1174
1175
1176
1177
1178
1179
1180 if (IS_ERR(rt5616->mclk))
1181 break;
1182
1183 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
1184 clk_disable_unprepare(rt5616->mclk);
1185 } else {
1186 ret = clk_prepare_enable(rt5616->mclk);
1187 if (ret)
1188 return ret;
1189 }
1190 break;
1191
1192 case SND_SOC_BIAS_STANDBY:
1193 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1194 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
1195 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1196 RT5616_PWR_BG | RT5616_PWR_VREF2,
1197 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1198 RT5616_PWR_BG | RT5616_PWR_VREF2);
1199 mdelay(10);
1200 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
1201 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1202 RT5616_PWR_FV1 | RT5616_PWR_FV2);
1203 snd_soc_component_update_bits(component, RT5616_D_MISC,
1204 RT5616_D_GATE_EN,
1205 RT5616_D_GATE_EN);
1206 }
1207 break;
1208
1209 case SND_SOC_BIAS_OFF:
1210 snd_soc_component_update_bits(component, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
1211 snd_soc_component_write(component, RT5616_PWR_DIG1, 0x0000);
1212 snd_soc_component_write(component, RT5616_PWR_DIG2, 0x0000);
1213 snd_soc_component_write(component, RT5616_PWR_VOL, 0x0000);
1214 snd_soc_component_write(component, RT5616_PWR_MIXER, 0x0000);
1215 snd_soc_component_write(component, RT5616_PWR_ANLG1, 0x0000);
1216 snd_soc_component_write(component, RT5616_PWR_ANLG2, 0x0000);
1217 break;
1218
1219 default:
1220 break;
1221 }
1222
1223 return 0;
1224}
1225
1226static int rt5616_probe(struct snd_soc_component *component)
1227{
1228 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1229
1230
1231 rt5616->mclk = devm_clk_get(component->dev, "mclk");
1232 if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER)
1233 return -EPROBE_DEFER;
1234
1235 rt5616->component = component;
1236
1237 return 0;
1238}
1239
1240#ifdef CONFIG_PM
1241static int rt5616_suspend(struct snd_soc_component *component)
1242{
1243 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1244
1245 regcache_cache_only(rt5616->regmap, true);
1246 regcache_mark_dirty(rt5616->regmap);
1247
1248 return 0;
1249}
1250
1251static int rt5616_resume(struct snd_soc_component *component)
1252{
1253 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1254
1255 regcache_cache_only(rt5616->regmap, false);
1256 regcache_sync(rt5616->regmap);
1257 return 0;
1258}
1259#else
1260#define rt5616_suspend NULL
1261#define rt5616_resume NULL
1262#endif
1263
1264#define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1265#define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1266 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1267
1268static const struct snd_soc_dai_ops rt5616_aif_dai_ops = {
1269 .hw_params = rt5616_hw_params,
1270 .set_fmt = rt5616_set_dai_fmt,
1271 .set_sysclk = rt5616_set_dai_sysclk,
1272 .set_pll = rt5616_set_dai_pll,
1273};
1274
1275static struct snd_soc_dai_driver rt5616_dai[] = {
1276 {
1277 .name = "rt5616-aif1",
1278 .id = RT5616_AIF1,
1279 .playback = {
1280 .stream_name = "AIF1 Playback",
1281 .channels_min = 1,
1282 .channels_max = 2,
1283 .rates = RT5616_STEREO_RATES,
1284 .formats = RT5616_FORMATS,
1285 },
1286 .capture = {
1287 .stream_name = "AIF1 Capture",
1288 .channels_min = 1,
1289 .channels_max = 2,
1290 .rates = RT5616_STEREO_RATES,
1291 .formats = RT5616_FORMATS,
1292 },
1293 .ops = &rt5616_aif_dai_ops,
1294 },
1295};
1296
1297static const struct snd_soc_component_driver soc_component_dev_rt5616 = {
1298 .probe = rt5616_probe,
1299 .suspend = rt5616_suspend,
1300 .resume = rt5616_resume,
1301 .set_bias_level = rt5616_set_bias_level,
1302 .controls = rt5616_snd_controls,
1303 .num_controls = ARRAY_SIZE(rt5616_snd_controls),
1304 .dapm_widgets = rt5616_dapm_widgets,
1305 .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
1306 .dapm_routes = rt5616_dapm_routes,
1307 .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
1308 .use_pmdown_time = 1,
1309 .endianness = 1,
1310 .non_legacy_dai_naming = 1,
1311};
1312
1313static const struct regmap_config rt5616_regmap = {
1314 .reg_bits = 8,
1315 .val_bits = 16,
1316 .use_single_read = true,
1317 .use_single_write = true,
1318 .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
1319 RT5616_PR_SPACING),
1320 .volatile_reg = rt5616_volatile_register,
1321 .readable_reg = rt5616_readable_register,
1322 .cache_type = REGCACHE_RBTREE,
1323 .reg_defaults = rt5616_reg,
1324 .num_reg_defaults = ARRAY_SIZE(rt5616_reg),
1325 .ranges = rt5616_ranges,
1326 .num_ranges = ARRAY_SIZE(rt5616_ranges),
1327};
1328
1329static const struct i2c_device_id rt5616_i2c_id[] = {
1330 { "rt5616", 0 },
1331 { }
1332};
1333MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
1334
1335#if defined(CONFIG_OF)
1336static const struct of_device_id rt5616_of_match[] = {
1337 { .compatible = "realtek,rt5616", },
1338 {},
1339};
1340MODULE_DEVICE_TABLE(of, rt5616_of_match);
1341#endif
1342
1343static int rt5616_i2c_probe(struct i2c_client *i2c,
1344 const struct i2c_device_id *id)
1345{
1346 struct rt5616_priv *rt5616;
1347 unsigned int val;
1348 int ret;
1349
1350 rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
1351 GFP_KERNEL);
1352 if (!rt5616)
1353 return -ENOMEM;
1354
1355 i2c_set_clientdata(i2c, rt5616);
1356
1357 rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
1358 if (IS_ERR(rt5616->regmap)) {
1359 ret = PTR_ERR(rt5616->regmap);
1360 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1361 ret);
1362 return ret;
1363 }
1364
1365 regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
1366 if (val != 0x6281) {
1367 dev_err(&i2c->dev,
1368 "Device with ID register %#x is not rt5616\n",
1369 val);
1370 return -ENODEV;
1371 }
1372 regmap_write(rt5616->regmap, RT5616_RESET, 0);
1373 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1374 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1375 RT5616_PWR_BG | RT5616_PWR_VREF2,
1376 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1377 RT5616_PWR_BG | RT5616_PWR_VREF2);
1378 mdelay(10);
1379 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1380 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1381 RT5616_PWR_FV1 | RT5616_PWR_FV2);
1382
1383 ret = regmap_register_patch(rt5616->regmap, init_list,
1384 ARRAY_SIZE(init_list));
1385 if (ret != 0)
1386 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1387
1388 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1389 RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
1390
1391 return devm_snd_soc_register_component(&i2c->dev,
1392 &soc_component_dev_rt5616,
1393 rt5616_dai, ARRAY_SIZE(rt5616_dai));
1394}
1395
1396static int rt5616_i2c_remove(struct i2c_client *i2c)
1397{
1398 return 0;
1399}
1400
1401static void rt5616_i2c_shutdown(struct i2c_client *client)
1402{
1403 struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
1404
1405 regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
1406 regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
1407}
1408
1409static struct i2c_driver rt5616_i2c_driver = {
1410 .driver = {
1411 .name = "rt5616",
1412 .of_match_table = of_match_ptr(rt5616_of_match),
1413 },
1414 .probe = rt5616_i2c_probe,
1415 .remove = rt5616_i2c_remove,
1416 .shutdown = rt5616_i2c_shutdown,
1417 .id_table = rt5616_i2c_id,
1418};
1419module_i2c_driver(rt5616_i2c_driver);
1420
1421MODULE_DESCRIPTION("ASoC RT5616 driver");
1422MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1423MODULE_LICENSE("GPL");
1424
