LXR linux/arch/arm/mach-pxa/include/mach/addr-map.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef __ASM_MACH_ADDR_MAP_H
   3#define __ASM_MACH_ADDR_MAP_H
   4
   5/*
   6 * Chip Selects
   7 */
   8#define PXA_CS0_PHYS            0x00000000
   9#define PXA_CS1_PHYS            0x04000000
  10#define PXA_CS2_PHYS            0x08000000
  11#define PXA_CS3_PHYS            0x0C000000
  12#define PXA_CS4_PHYS            0x10000000
  13#define PXA_CS5_PHYS            0x14000000
  14
  15#define PXA300_CS0_PHYS         0x00000000      /* PXA300/PXA310 _only_ */
  16#define PXA300_CS1_PHYS         0x30000000      /* PXA300/PXA310 _only_ */
  17#define PXA3xx_CS2_PHYS         0x10000000
  18#define PXA3xx_CS3_PHYS         0x14000000
  19
  20/*
  21 * Peripheral Bus
  22 */
  23#define PERIPH_PHYS             0x40000000
  24#define PERIPH_VIRT             IOMEM(0xf2000000)
  25#define PERIPH_SIZE             0x02000000
  26
  27/*
  28 * Static Memory Controller (w/ SDRAM controls on PXA25x/PXA27x)
  29 */
  30#define PXA2XX_SMEMC_PHYS       0x48000000
  31#define PXA3XX_SMEMC_PHYS       0x4a000000
  32#define SMEMC_VIRT              IOMEM(0xf6000000)
  33#define SMEMC_SIZE              0x00100000
  34
  35/*
  36 * Dynamic Memory Controller (only on PXA3xx)
  37 */
  38#define DMEMC_PHYS              0x48100000
  39#define DMEMC_VIRT              IOMEM(0xf6100000)
  40#define DMEMC_SIZE              0x00100000
  41
  42/*
  43 * Reserved space for low level debug virtual addresses within
  44 * 0xf6200000..0xf6201000
  45 */
  46
  47/*
  48 * DFI Bus for NAND, PXA3xx only
  49 */
  50#define NAND_PHYS               0x43100000
  51#define NAND_VIRT               IOMEM(0xf6300000)
  52#define NAND_SIZE               0x00100000
  53
  54/*
  55 * Internal Memory Controller (PXA27x and later)
  56 */
  57#define IMEMC_PHYS              0x58000000
  58#define IMEMC_VIRT              IOMEM(0xfe000000)
  59#define IMEMC_SIZE              0x00100000
  60
  61#endif /* __ASM_MACH_ADDR_MAP_H */
  62