linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c
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   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "nv50.h"
  25
  26#include <core/gpuobj.h>
  27#include <subdev/bar.h>
  28#include <engine/disp.h>
  29#include <engine/fifo.h>
  30
  31#include <nvif/class.h>
  32#include <nvif/event.h>
  33
  34/*******************************************************************************
  35 * software context
  36 ******************************************************************************/
  37
  38static int
  39gf100_sw_chan_vblsem_release(struct nvkm_notify *notify)
  40{
  41        struct nv50_sw_chan *chan =
  42                container_of(notify, typeof(*chan), vblank.notify[notify->index]);
  43        struct nvkm_sw *sw = chan->base.sw;
  44        struct nvkm_device *device = sw->engine.subdev.device;
  45        u32 inst = chan->base.fifo->inst->addr >> 12;
  46
  47        nvkm_wr32(device, 0x001718, 0x80000000 | inst);
  48        nvkm_bar_flush(device->bar);
  49        nvkm_wr32(device, 0x06000c, upper_32_bits(chan->vblank.offset));
  50        nvkm_wr32(device, 0x060010, lower_32_bits(chan->vblank.offset));
  51        nvkm_wr32(device, 0x060014, chan->vblank.value);
  52
  53        return NVKM_NOTIFY_DROP;
  54}
  55
  56static bool
  57gf100_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
  58{
  59        struct nv50_sw_chan *chan = nv50_sw_chan(base);
  60        struct nvkm_engine *engine = chan->base.object.engine;
  61        struct nvkm_device *device = engine->subdev.device;
  62        switch (mthd) {
  63        case 0x0400:
  64                chan->vblank.offset &= 0x00ffffffffULL;
  65                chan->vblank.offset |= (u64)data << 32;
  66                return true;
  67        case 0x0404:
  68                chan->vblank.offset &= 0xff00000000ULL;
  69                chan->vblank.offset |= data;
  70                return true;
  71        case 0x0408:
  72                chan->vblank.value = data;
  73                return true;
  74        case 0x040c:
  75                if (data < device->disp->vblank.index_nr) {
  76                        nvkm_notify_get(&chan->vblank.notify[data]);
  77                        return true;
  78                }
  79                break;
  80        case 0x600: /* MP.PM_UNK000 */
  81                nvkm_wr32(device, 0x419e00, data);
  82                return true;
  83        case 0x644: /* MP.TRAP_WARP_ERROR_EN */
  84                if (!(data & ~0x001ffffe)) {
  85                        nvkm_wr32(device, 0x419e44, data);
  86                        return true;
  87                }
  88                break;
  89        case 0x6ac: /* MP.PM_UNK0AC */
  90                nvkm_wr32(device, 0x419eac, data);
  91                return true;
  92        default:
  93                break;
  94        }
  95        return false;
  96}
  97
  98static const struct nvkm_sw_chan_func
  99gf100_sw_chan = {
 100        .dtor = nv50_sw_chan_dtor,
 101        .mthd = gf100_sw_chan_mthd,
 102};
 103
 104static int
 105gf100_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch,
 106                  const struct nvkm_oclass *oclass,
 107                  struct nvkm_object **pobject)
 108{
 109        struct nvkm_disp *disp = sw->engine.subdev.device->disp;
 110        struct nv50_sw_chan *chan;
 111        int ret, i;
 112
 113        if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
 114                return -ENOMEM;
 115        *pobject = &chan->base.object;
 116
 117        ret = nvkm_sw_chan_ctor(&gf100_sw_chan, sw, fifoch, oclass,
 118                                &chan->base);
 119        if (ret)
 120                return ret;
 121
 122        for (i = 0; disp && i < disp->vblank.index_nr; i++) {
 123                ret = nvkm_notify_init(NULL, &disp->vblank,
 124                                       gf100_sw_chan_vblsem_release, false,
 125                                       &(struct nvif_notify_head_req_v0) {
 126                                        .head = i,
 127                                       },
 128                                       sizeof(struct nvif_notify_head_req_v0),
 129                                       sizeof(struct nvif_notify_head_rep_v0),
 130                                       &chan->vblank.notify[i]);
 131                if (ret)
 132                        return ret;
 133        }
 134
 135        return 0;
 136}
 137
 138/*******************************************************************************
 139 * software engine/subdev functions
 140 ******************************************************************************/
 141
 142static const struct nvkm_sw_func
 143gf100_sw = {
 144        .chan_new = gf100_sw_chan_new,
 145        .sclass = {
 146                { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_GF100 } },
 147                {}
 148        }
 149};
 150
 151int
 152gf100_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw)
 153{
 154        return nvkm_sw_new_(&gf100_sw, device, index, psw);
 155}
 156