linux/drivers/media/platform/davinci/vpif.c
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   1/*
   2 * vpif - Video Port Interface driver
   3 * VPIF is a receiver and transmitter for video data. It has two channels(0, 1)
   4 * that receiving video byte stream and two channels(2, 3) for video output.
   5 * The hardware supports SDTV, HDTV formats, raw data capture.
   6 * Currently, the driver supports NTSC and PAL standards.
   7 *
   8 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License as
  12 * published by the Free Software Foundation version 2.
  13 *
  14 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
  15 * kind, whether express or implied; without even the implied warranty
  16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 * GNU General Public License for more details.
  18 */
  19
  20#include <linux/err.h>
  21#include <linux/init.h>
  22#include <linux/io.h>
  23#include <linux/kernel.h>
  24#include <linux/module.h>
  25#include <linux/platform_device.h>
  26#include <linux/pm_runtime.h>
  27#include <linux/spinlock.h>
  28#include <linux/v4l2-dv-timings.h>
  29#include <linux/of_graph.h>
  30
  31#include "vpif.h"
  32
  33MODULE_DESCRIPTION("TI DaVinci Video Port Interface driver");
  34MODULE_LICENSE("GPL");
  35
  36#define VPIF_DRIVER_NAME        "vpif"
  37MODULE_ALIAS("platform:" VPIF_DRIVER_NAME);
  38
  39#define VPIF_CH0_MAX_MODES      22
  40#define VPIF_CH1_MAX_MODES      2
  41#define VPIF_CH2_MAX_MODES      15
  42#define VPIF_CH3_MAX_MODES      2
  43
  44spinlock_t vpif_lock;
  45EXPORT_SYMBOL_GPL(vpif_lock);
  46
  47void __iomem *vpif_base;
  48EXPORT_SYMBOL_GPL(vpif_base);
  49
  50/*
  51 * vpif_ch_params: video standard configuration parameters for vpif
  52 *
  53 * The table must include all presets from supported subdevices.
  54 */
  55const struct vpif_channel_config_params vpif_ch_params[] = {
  56        /* HDTV formats */
  57        {
  58                .name = "480p59_94",
  59                .width = 720,
  60                .height = 480,
  61                .frm_fmt = 1,
  62                .ycmux_mode = 0,
  63                .eav2sav = 138-8,
  64                .sav2eav = 720,
  65                .l1 = 1,
  66                .l3 = 43,
  67                .l5 = 523,
  68                .vsize = 525,
  69                .capture_format = 0,
  70                .vbi_supported = 0,
  71                .hd_sd = 1,
  72                .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
  73        },
  74        {
  75                .name = "576p50",
  76                .width = 720,
  77                .height = 576,
  78                .frm_fmt = 1,
  79                .ycmux_mode = 0,
  80                .eav2sav = 144-8,
  81                .sav2eav = 720,
  82                .l1 = 1,
  83                .l3 = 45,
  84                .l5 = 621,
  85                .vsize = 625,
  86                .capture_format = 0,
  87                .vbi_supported = 0,
  88                .hd_sd = 1,
  89                .dv_timings = V4L2_DV_BT_CEA_720X576P50,
  90        },
  91        {
  92                .name = "720p50",
  93                .width = 1280,
  94                .height = 720,
  95                .frm_fmt = 1,
  96                .ycmux_mode = 0,
  97                .eav2sav = 700-8,
  98                .sav2eav = 1280,
  99                .l1 = 1,
 100                .l3 = 26,
 101                .l5 = 746,
 102                .vsize = 750,
 103                .capture_format = 0,
 104                .vbi_supported = 0,
 105                .hd_sd = 1,
 106                .dv_timings = V4L2_DV_BT_CEA_1280X720P50,
 107        },
 108        {
 109                .name = "720p60",
 110                .width = 1280,
 111                .height = 720,
 112                .frm_fmt = 1,
 113                .ycmux_mode = 0,
 114                .eav2sav = 370 - 8,
 115                .sav2eav = 1280,
 116                .l1 = 1,
 117                .l3 = 26,
 118                .l5 = 746,
 119                .vsize = 750,
 120                .capture_format = 0,
 121                .vbi_supported = 0,
 122                .hd_sd = 1,
 123                .dv_timings = V4L2_DV_BT_CEA_1280X720P60,
 124        },
 125        {
 126                .name = "1080I50",
 127                .width = 1920,
 128                .height = 1080,
 129                .frm_fmt = 0,
 130                .ycmux_mode = 0,
 131                .eav2sav = 720 - 8,
 132                .sav2eav = 1920,
 133                .l1 = 1,
 134                .l3 = 21,
 135                .l5 = 561,
 136                .l7 = 563,
 137                .l9 = 584,
 138                .l11 = 1124,
 139                .vsize = 1125,
 140                .capture_format = 0,
 141                .vbi_supported = 0,
 142                .hd_sd = 1,
 143                .dv_timings = V4L2_DV_BT_CEA_1920X1080I50,
 144        },
 145        {
 146                .name = "1080I60",
 147                .width = 1920,
 148                .height = 1080,
 149                .frm_fmt = 0,
 150                .ycmux_mode = 0,
 151                .eav2sav = 280 - 8,
 152                .sav2eav = 1920,
 153                .l1 = 1,
 154                .l3 = 21,
 155                .l5 = 561,
 156                .l7 = 563,
 157                .l9 = 584,
 158                .l11 = 1124,
 159                .vsize = 1125,
 160                .capture_format = 0,
 161                .vbi_supported = 0,
 162                .hd_sd = 1,
 163                .dv_timings = V4L2_DV_BT_CEA_1920X1080I60,
 164        },
 165        {
 166                .name = "1080p60",
 167                .width = 1920,
 168                .height = 1080,
 169                .frm_fmt = 1,
 170                .ycmux_mode = 0,
 171                .eav2sav = 280 - 8,
 172                .sav2eav = 1920,
 173                .l1 = 1,
 174                .l3 = 42,
 175                .l5 = 1122,
 176                .vsize = 1125,
 177                .capture_format = 0,
 178                .vbi_supported = 0,
 179                .hd_sd = 1,
 180                .dv_timings = V4L2_DV_BT_CEA_1920X1080P60,
 181        },
 182
 183        /* SDTV formats */
 184        {
 185                .name = "NTSC_M",
 186                .width = 720,
 187                .height = 480,
 188                .frm_fmt = 0,
 189                .ycmux_mode = 1,
 190                .eav2sav = 268,
 191                .sav2eav = 1440,
 192                .l1 = 1,
 193                .l3 = 23,
 194                .l5 = 263,
 195                .l7 = 266,
 196                .l9 = 286,
 197                .l11 = 525,
 198                .vsize = 525,
 199                .capture_format = 0,
 200                .vbi_supported = 1,
 201                .hd_sd = 0,
 202                .stdid = V4L2_STD_525_60,
 203        },
 204        {
 205                .name = "PAL_BDGHIK",
 206                .width = 720,
 207                .height = 576,
 208                .frm_fmt = 0,
 209                .ycmux_mode = 1,
 210                .eav2sav = 280,
 211                .sav2eav = 1440,
 212                .l1 = 1,
 213                .l3 = 23,
 214                .l5 = 311,
 215                .l7 = 313,
 216                .l9 = 336,
 217                .l11 = 624,
 218                .vsize = 625,
 219                .capture_format = 0,
 220                .vbi_supported = 1,
 221                .hd_sd = 0,
 222                .stdid = V4L2_STD_625_50,
 223        },
 224};
 225EXPORT_SYMBOL_GPL(vpif_ch_params);
 226
 227const unsigned int vpif_ch_params_count = ARRAY_SIZE(vpif_ch_params);
 228EXPORT_SYMBOL_GPL(vpif_ch_params_count);
 229
 230static inline void vpif_wr_bit(u32 reg, u32 bit, u32 val)
 231{
 232        if (val)
 233                vpif_set_bit(reg, bit);
 234        else
 235                vpif_clr_bit(reg, bit);
 236}
 237
 238/* This structure is used to keep track of VPIF size register's offsets */
 239struct vpif_registers {
 240        u32 h_cfg, v_cfg_00, v_cfg_01, v_cfg_02, v_cfg, ch_ctrl;
 241        u32 line_offset, vanc0_strt, vanc0_size, vanc1_strt;
 242        u32 vanc1_size, width_mask, len_mask;
 243        u8 max_modes;
 244};
 245
 246static const struct vpif_registers vpifregs[VPIF_NUM_CHANNELS] = {
 247        /* Channel0 */
 248        {
 249                VPIF_CH0_H_CFG, VPIF_CH0_V_CFG_00, VPIF_CH0_V_CFG_01,
 250                VPIF_CH0_V_CFG_02, VPIF_CH0_V_CFG_03, VPIF_CH0_CTRL,
 251                VPIF_CH0_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
 252                VPIF_CH0_MAX_MODES,
 253        },
 254        /* Channel1 */
 255        {
 256                VPIF_CH1_H_CFG, VPIF_CH1_V_CFG_00, VPIF_CH1_V_CFG_01,
 257                VPIF_CH1_V_CFG_02, VPIF_CH1_V_CFG_03, VPIF_CH1_CTRL,
 258                VPIF_CH1_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
 259                VPIF_CH1_MAX_MODES,
 260        },
 261        /* Channel2 */
 262        {
 263                VPIF_CH2_H_CFG, VPIF_CH2_V_CFG_00, VPIF_CH2_V_CFG_01,
 264                VPIF_CH2_V_CFG_02, VPIF_CH2_V_CFG_03, VPIF_CH2_CTRL,
 265                VPIF_CH2_IMG_ADD_OFST, VPIF_CH2_VANC0_STRT, VPIF_CH2_VANC0_SIZE,
 266                VPIF_CH2_VANC1_STRT, VPIF_CH2_VANC1_SIZE, 0x7FF, 0x7FF,
 267                VPIF_CH2_MAX_MODES
 268        },
 269        /* Channel3 */
 270        {
 271                VPIF_CH3_H_CFG, VPIF_CH3_V_CFG_00, VPIF_CH3_V_CFG_01,
 272                VPIF_CH3_V_CFG_02, VPIF_CH3_V_CFG_03, VPIF_CH3_CTRL,
 273                VPIF_CH3_IMG_ADD_OFST, VPIF_CH3_VANC0_STRT, VPIF_CH3_VANC0_SIZE,
 274                VPIF_CH3_VANC1_STRT, VPIF_CH3_VANC1_SIZE, 0x7FF, 0x7FF,
 275                VPIF_CH3_MAX_MODES
 276        },
 277};
 278
 279/* vpif_set_mode_info:
 280 * This function is used to set horizontal and vertical config parameters
 281 * As per the standard in the channel, configure the values of L1, L3,
 282 * L5, L7  L9, L11 in VPIF Register , also write width and height
 283 */
 284static void vpif_set_mode_info(const struct vpif_channel_config_params *config,
 285                                u8 channel_id, u8 config_channel_id)
 286{
 287        u32 value;
 288
 289        value = (config->eav2sav & vpifregs[config_channel_id].width_mask);
 290        value <<= VPIF_CH_LEN_SHIFT;
 291        value |= (config->sav2eav & vpifregs[config_channel_id].width_mask);
 292        regw(value, vpifregs[channel_id].h_cfg);
 293
 294        value = (config->l1 & vpifregs[config_channel_id].len_mask);
 295        value <<= VPIF_CH_LEN_SHIFT;
 296        value |= (config->l3 & vpifregs[config_channel_id].len_mask);
 297        regw(value, vpifregs[channel_id].v_cfg_00);
 298
 299        value = (config->l5 & vpifregs[config_channel_id].len_mask);
 300        value <<= VPIF_CH_LEN_SHIFT;
 301        value |= (config->l7 & vpifregs[config_channel_id].len_mask);
 302        regw(value, vpifregs[channel_id].v_cfg_01);
 303
 304        value = (config->l9 & vpifregs[config_channel_id].len_mask);
 305        value <<= VPIF_CH_LEN_SHIFT;
 306        value |= (config->l11 & vpifregs[config_channel_id].len_mask);
 307        regw(value, vpifregs[channel_id].v_cfg_02);
 308
 309        value = (config->vsize & vpifregs[config_channel_id].len_mask);
 310        regw(value, vpifregs[channel_id].v_cfg);
 311}
 312
 313/* config_vpif_params
 314 * Function to set the parameters of a channel
 315 * Mainly modifies the channel ciontrol register
 316 * It sets frame format, yc mux mode
 317 */
 318static void config_vpif_params(struct vpif_params *vpifparams,
 319                                u8 channel_id, u8 found)
 320{
 321        const struct vpif_channel_config_params *config = &vpifparams->std_info;
 322        u32 value, ch_nip, reg;
 323        u8 start, end;
 324        int i;
 325
 326        start = channel_id;
 327        end = channel_id + found;
 328
 329        for (i = start; i < end; i++) {
 330                reg = vpifregs[i].ch_ctrl;
 331                if (channel_id < 2)
 332                        ch_nip = VPIF_CAPTURE_CH_NIP;
 333                else
 334                        ch_nip = VPIF_DISPLAY_CH_NIP;
 335
 336                vpif_wr_bit(reg, ch_nip, config->frm_fmt);
 337                vpif_wr_bit(reg, VPIF_CH_YC_MUX_BIT, config->ycmux_mode);
 338                vpif_wr_bit(reg, VPIF_CH_INPUT_FIELD_FRAME_BIT,
 339                                        vpifparams->video_params.storage_mode);
 340
 341                /* Set raster scanning SDR Format */
 342                vpif_clr_bit(reg, VPIF_CH_SDR_FMT_BIT);
 343                vpif_wr_bit(reg, VPIF_CH_DATA_MODE_BIT, config->capture_format);
 344
 345                if (channel_id > 1)     /* Set the Pixel enable bit */
 346                        vpif_set_bit(reg, VPIF_DISPLAY_PIX_EN_BIT);
 347                else if (config->capture_format) {
 348                        /* Set the polarity of various pins */
 349                        vpif_wr_bit(reg, VPIF_CH_FID_POLARITY_BIT,
 350                                        vpifparams->iface.fid_pol);
 351                        vpif_wr_bit(reg, VPIF_CH_V_VALID_POLARITY_BIT,
 352                                        vpifparams->iface.vd_pol);
 353                        vpif_wr_bit(reg, VPIF_CH_H_VALID_POLARITY_BIT,
 354                                        vpifparams->iface.hd_pol);
 355
 356                        value = regr(reg);
 357                        /* Set data width */
 358                        value &= ~(0x3u <<
 359                                        VPIF_CH_DATA_WIDTH_BIT);
 360                        value |= ((vpifparams->params.data_sz) <<
 361                                                     VPIF_CH_DATA_WIDTH_BIT);
 362                        regw(value, reg);
 363                }
 364
 365                /* Write the pitch in the driver */
 366                regw((vpifparams->video_params.hpitch),
 367                                                vpifregs[i].line_offset);
 368        }
 369}
 370
 371/* vpif_set_video_params
 372 * This function is used to set video parameters in VPIF register
 373 */
 374int vpif_set_video_params(struct vpif_params *vpifparams, u8 channel_id)
 375{
 376        const struct vpif_channel_config_params *config = &vpifparams->std_info;
 377        int found = 1;
 378
 379        vpif_set_mode_info(config, channel_id, channel_id);
 380        if (!config->ycmux_mode) {
 381                /* YC are on separate channels (HDTV formats) */
 382                vpif_set_mode_info(config, channel_id + 1, channel_id);
 383                found = 2;
 384        }
 385
 386        config_vpif_params(vpifparams, channel_id, found);
 387
 388        regw(0x80, VPIF_REQ_SIZE);
 389        regw(0x01, VPIF_EMULATION_CTRL);
 390
 391        return found;
 392}
 393EXPORT_SYMBOL(vpif_set_video_params);
 394
 395void vpif_set_vbi_display_params(struct vpif_vbi_params *vbiparams,
 396                                u8 channel_id)
 397{
 398        u32 value;
 399
 400        value = 0x3F8 & (vbiparams->hstart0);
 401        value |= 0x3FFFFFF & ((vbiparams->vstart0) << 16);
 402        regw(value, vpifregs[channel_id].vanc0_strt);
 403
 404        value = 0x3F8 & (vbiparams->hstart1);
 405        value |= 0x3FFFFFF & ((vbiparams->vstart1) << 16);
 406        regw(value, vpifregs[channel_id].vanc1_strt);
 407
 408        value = 0x3F8 & (vbiparams->hsize0);
 409        value |= 0x3FFFFFF & ((vbiparams->vsize0) << 16);
 410        regw(value, vpifregs[channel_id].vanc0_size);
 411
 412        value = 0x3F8 & (vbiparams->hsize1);
 413        value |= 0x3FFFFFF & ((vbiparams->vsize1) << 16);
 414        regw(value, vpifregs[channel_id].vanc1_size);
 415
 416}
 417EXPORT_SYMBOL(vpif_set_vbi_display_params);
 418
 419int vpif_channel_getfid(u8 channel_id)
 420{
 421        return (regr(vpifregs[channel_id].ch_ctrl) & VPIF_CH_FID_MASK)
 422                                        >> VPIF_CH_FID_SHIFT;
 423}
 424EXPORT_SYMBOL(vpif_channel_getfid);
 425
 426static int vpif_probe(struct platform_device *pdev)
 427{
 428        static struct resource  *res, *res_irq;
 429        struct platform_device *pdev_capture, *pdev_display;
 430        struct device_node *endpoint = NULL;
 431
 432        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 433        vpif_base = devm_ioremap_resource(&pdev->dev, res);
 434        if (IS_ERR(vpif_base))
 435                return PTR_ERR(vpif_base);
 436
 437        pm_runtime_enable(&pdev->dev);
 438        pm_runtime_get(&pdev->dev);
 439
 440        spin_lock_init(&vpif_lock);
 441        dev_info(&pdev->dev, "vpif probe success\n");
 442
 443        /*
 444         * If VPIF Node has endpoints, assume "new" DT support,
 445         * where capture and display drivers don't have DT nodes
 446         * so their devices need to be registered manually here
 447         * for their legacy platform_drivers to work.
 448         */
 449        endpoint = of_graph_get_next_endpoint(pdev->dev.of_node,
 450                                              endpoint);
 451        if (!endpoint)
 452                return 0;
 453
 454        /*
 455         * For DT platforms, manually create platform_devices for
 456         * capture/display drivers.
 457         */
 458        res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 459        if (!res_irq) {
 460                dev_warn(&pdev->dev, "Missing IRQ resource.\n");
 461                pm_runtime_put(&pdev->dev);
 462                return -EINVAL;
 463        }
 464
 465        pdev_capture = devm_kzalloc(&pdev->dev, sizeof(*pdev_capture),
 466                                    GFP_KERNEL);
 467        if (pdev_capture) {
 468                pdev_capture->name = "vpif_capture";
 469                pdev_capture->id = -1;
 470                pdev_capture->resource = res_irq;
 471                pdev_capture->num_resources = 1;
 472                pdev_capture->dev.dma_mask = pdev->dev.dma_mask;
 473                pdev_capture->dev.coherent_dma_mask = pdev->dev.coherent_dma_mask;
 474                pdev_capture->dev.parent = &pdev->dev;
 475                platform_device_register(pdev_capture);
 476        } else {
 477                dev_warn(&pdev->dev, "Unable to allocate memory for pdev_capture.\n");
 478        }
 479
 480        pdev_display = devm_kzalloc(&pdev->dev, sizeof(*pdev_display),
 481                                    GFP_KERNEL);
 482        if (pdev_display) {
 483                pdev_display->name = "vpif_display";
 484                pdev_display->id = -1;
 485                pdev_display->resource = res_irq;
 486                pdev_display->num_resources = 1;
 487                pdev_display->dev.dma_mask = pdev->dev.dma_mask;
 488                pdev_display->dev.coherent_dma_mask = pdev->dev.coherent_dma_mask;
 489                pdev_display->dev.parent = &pdev->dev;
 490                platform_device_register(pdev_display);
 491        } else {
 492                dev_warn(&pdev->dev, "Unable to allocate memory for pdev_display.\n");
 493        }
 494
 495        return 0;
 496}
 497
 498static int vpif_remove(struct platform_device *pdev)
 499{
 500        pm_runtime_disable(&pdev->dev);
 501        return 0;
 502}
 503
 504#ifdef CONFIG_PM
 505static int vpif_suspend(struct device *dev)
 506{
 507        pm_runtime_put(dev);
 508        return 0;
 509}
 510
 511static int vpif_resume(struct device *dev)
 512{
 513        pm_runtime_get(dev);
 514        return 0;
 515}
 516
 517static const struct dev_pm_ops vpif_pm = {
 518        .suspend        = vpif_suspend,
 519        .resume         = vpif_resume,
 520};
 521
 522#define vpif_pm_ops (&vpif_pm)
 523#else
 524#define vpif_pm_ops NULL
 525#endif
 526
 527#if IS_ENABLED(CONFIG_OF)
 528static const struct of_device_id vpif_of_match[] = {
 529        { .compatible = "ti,da850-vpif", },
 530        { /* sentinel */ },
 531};
 532MODULE_DEVICE_TABLE(of, vpif_of_match);
 533#endif
 534
 535static struct platform_driver vpif_driver = {
 536        .driver = {
 537                .of_match_table = of_match_ptr(vpif_of_match),
 538                .name   = VPIF_DRIVER_NAME,
 539                .pm     = vpif_pm_ops,
 540        },
 541        .remove = vpif_remove,
 542        .probe = vpif_probe,
 543};
 544
 545static void vpif_exit(void)
 546{
 547        platform_driver_unregister(&vpif_driver);
 548}
 549
 550static int __init vpif_init(void)
 551{
 552        return platform_driver_register(&vpif_driver);
 553}
 554subsys_initcall(vpif_init);
 555module_exit(vpif_exit);
 556
 557