1
2
3
4#include <linux/clk.h>
5#include <linux/gpio.h>
6#include <linux/interrupt.h>
7#include <linux/kernel.h>
8#include <linux/mfd/core.h>
9#include <linux/mfd/wcd934x/registers.h>
10#include <linux/mfd/wcd934x/wcd934x.h>
11#include <linux/module.h>
12#include <linux/of_gpio.h>
13#include <linux/of.h>
14#include <linux/of_irq.h>
15#include <linux/platform_device.h>
16#include <linux/regmap.h>
17#include <linux/regulator/consumer.h>
18#include <linux/slimbus.h>
19
20static const struct mfd_cell wcd934x_devices[] = {
21 {
22 .name = "wcd934x-codec",
23 }, {
24 .name = "wcd934x-gpio",
25 .of_compatible = "qcom,wcd9340-gpio",
26 }, {
27 .name = "wcd934x-soundwire",
28 .of_compatible = "qcom,soundwire-v1.3.0",
29 },
30};
31
32static const struct regmap_irq wcd934x_irqs[] = {
33 [WCD934X_IRQ_SLIMBUS] = {
34 .reg_offset = 0,
35 .mask = BIT(0),
36 .type = {
37 .type_reg_offset = 0,
38 .types_supported = IRQ_TYPE_EDGE_BOTH,
39 .type_reg_mask = BIT(0),
40 .type_level_low_val = BIT(0),
41 .type_level_high_val = BIT(0),
42 .type_falling_val = 0,
43 .type_rising_val = 0,
44 },
45 },
46 [WCD934X_IRQ_SOUNDWIRE] = {
47 .reg_offset = 2,
48 .mask = BIT(4),
49 .type = {
50 .type_reg_offset = 2,
51 .types_supported = IRQ_TYPE_EDGE_BOTH,
52 .type_reg_mask = BIT(4),
53 .type_level_low_val = BIT(4),
54 .type_level_high_val = BIT(4),
55 .type_falling_val = 0,
56 .type_rising_val = 0,
57 },
58 },
59};
60
61static const struct regmap_irq_chip wcd934x_regmap_irq_chip = {
62 .name = "wcd934x_irq",
63 .status_base = WCD934X_INTR_PIN1_STATUS0,
64 .mask_base = WCD934X_INTR_PIN1_MASK0,
65 .ack_base = WCD934X_INTR_PIN1_CLEAR0,
66 .type_base = WCD934X_INTR_LEVEL0,
67 .num_type_reg = 4,
68 .type_in_mask = false,
69 .num_regs = 4,
70 .irqs = wcd934x_irqs,
71 .num_irqs = ARRAY_SIZE(wcd934x_irqs),
72};
73
74static bool wcd934x_is_volatile_register(struct device *dev, unsigned int reg)
75{
76 switch (reg) {
77 case WCD934X_INTR_PIN1_STATUS0...WCD934X_INTR_PIN2_CLEAR3:
78 case WCD934X_SWR_AHB_BRIDGE_RD_DATA_0:
79 case WCD934X_SWR_AHB_BRIDGE_RD_DATA_1:
80 case WCD934X_SWR_AHB_BRIDGE_RD_DATA_2:
81 case WCD934X_SWR_AHB_BRIDGE_RD_DATA_3:
82 case WCD934X_SWR_AHB_BRIDGE_ACCESS_STATUS:
83 case WCD934X_ANA_MBHC_RESULT_3:
84 case WCD934X_ANA_MBHC_RESULT_2:
85 case WCD934X_ANA_MBHC_RESULT_1:
86 case WCD934X_ANA_MBHC_MECH:
87 case WCD934X_ANA_MBHC_ELECT:
88 case WCD934X_ANA_MBHC_ZDET:
89 case WCD934X_ANA_MICB2:
90 case WCD934X_ANA_RCO:
91 case WCD934X_ANA_BIAS:
92 return true;
93 default:
94 return false;
95 }
96};
97
98static const struct regmap_range_cfg wcd934x_ranges[] = {
99 { .name = "WCD934X",
100 .range_min = 0x0,
101 .range_max = WCD934X_MAX_REGISTER,
102 .selector_reg = WCD934X_SEL_REGISTER,
103 .selector_mask = WCD934X_SEL_MASK,
104 .selector_shift = WCD934X_SEL_SHIFT,
105 .window_start = WCD934X_WINDOW_START,
106 .window_len = WCD934X_WINDOW_LENGTH,
107 },
108};
109
110static struct regmap_config wcd934x_regmap_config = {
111 .reg_bits = 16,
112 .val_bits = 8,
113 .cache_type = REGCACHE_RBTREE,
114 .max_register = 0xffff,
115 .can_multi_write = true,
116 .ranges = wcd934x_ranges,
117 .num_ranges = ARRAY_SIZE(wcd934x_ranges),
118 .volatile_reg = wcd934x_is_volatile_register,
119};
120
121static int wcd934x_bring_up(struct wcd934x_ddata *ddata)
122{
123 struct regmap *regmap = ddata->regmap;
124 u16 id_minor, id_major;
125 int ret;
126
127 ret = regmap_bulk_read(regmap, WCD934X_CHIP_TIER_CTRL_CHIP_ID_BYTE0,
128 (u8 *)&id_minor, sizeof(u16));
129 if (ret)
130 return ret;
131
132 ret = regmap_bulk_read(regmap, WCD934X_CHIP_TIER_CTRL_CHIP_ID_BYTE2,
133 (u8 *)&id_major, sizeof(u16));
134 if (ret)
135 return ret;
136
137 dev_info(ddata->dev, "WCD934x chip id major 0x%x, minor 0x%x\n",
138 id_major, id_minor);
139
140 regmap_write(regmap, WCD934X_CODEC_RPM_RST_CTL, 0x01);
141 regmap_write(regmap, WCD934X_SIDO_NEW_VOUT_A_STARTUP, 0x19);
142 regmap_write(regmap, WCD934X_SIDO_NEW_VOUT_D_STARTUP, 0x15);
143
144 usleep_range(1000, 1100);
145 regmap_write(regmap, WCD934X_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x5);
146 regmap_write(regmap, WCD934X_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x7);
147 regmap_write(regmap, WCD934X_CODEC_RPM_RST_CTL, 0x3);
148 regmap_write(regmap, WCD934X_CODEC_RPM_RST_CTL, 0x7);
149 regmap_write(regmap, WCD934X_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x3);
150
151 return 0;
152}
153
154static int wcd934x_slim_status_up(struct slim_device *sdev)
155{
156 struct device *dev = &sdev->dev;
157 struct wcd934x_ddata *ddata;
158 int ret;
159
160 ddata = dev_get_drvdata(dev);
161
162 ddata->regmap = regmap_init_slimbus(sdev, &wcd934x_regmap_config);
163 if (IS_ERR(ddata->regmap)) {
164 dev_err(dev, "Error allocating slim regmap\n");
165 return PTR_ERR(ddata->regmap);
166 }
167
168 ret = wcd934x_bring_up(ddata);
169 if (ret) {
170 dev_err(dev, "Failed to bring up WCD934X: err = %d\n", ret);
171 return ret;
172 }
173
174 ret = devm_regmap_add_irq_chip(dev, ddata->regmap, ddata->irq,
175 IRQF_TRIGGER_HIGH, 0,
176 &wcd934x_regmap_irq_chip,
177 &ddata->irq_data);
178 if (ret) {
179 dev_err(dev, "Failed to add IRQ chip: err = %d\n", ret);
180 return ret;
181 }
182
183 ret = mfd_add_devices(dev, PLATFORM_DEVID_AUTO, wcd934x_devices,
184 ARRAY_SIZE(wcd934x_devices), NULL, 0, NULL);
185 if (ret) {
186 dev_err(dev, "Failed to add child devices: err = %d\n",
187 ret);
188 return ret;
189 }
190
191 return ret;
192}
193
194static int wcd934x_slim_status(struct slim_device *sdev,
195 enum slim_device_status status)
196{
197 switch (status) {
198 case SLIM_DEVICE_STATUS_UP:
199 return wcd934x_slim_status_up(sdev);
200 case SLIM_DEVICE_STATUS_DOWN:
201 mfd_remove_devices(&sdev->dev);
202 break;
203 default:
204 return -EINVAL;
205 }
206
207 return 0;
208}
209
210static int wcd934x_slim_probe(struct slim_device *sdev)
211{
212 struct device *dev = &sdev->dev;
213 struct device_node *np = dev->of_node;
214 struct wcd934x_ddata *ddata;
215 int reset_gpio, ret;
216
217 ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
218 if (!ddata)
219 return -ENOMEM;
220
221 ddata->irq = of_irq_get(np, 0);
222 if (ddata->irq < 0)
223 return dev_err_probe(ddata->dev, ddata->irq,
224 "Failed to get IRQ\n");
225
226 reset_gpio = of_get_named_gpio(np, "reset-gpios", 0);
227 if (reset_gpio < 0) {
228 dev_err(dev, "Failed to get reset gpio: err = %d\n",
229 reset_gpio);
230 return reset_gpio;
231 }
232
233 ddata->extclk = devm_clk_get(dev, "extclk");
234 if (IS_ERR(ddata->extclk)) {
235 dev_err(dev, "Failed to get extclk");
236 return PTR_ERR(ddata->extclk);
237 }
238
239 ddata->supplies[0].supply = "vdd-buck";
240 ddata->supplies[1].supply = "vdd-buck-sido";
241 ddata->supplies[2].supply = "vdd-tx";
242 ddata->supplies[3].supply = "vdd-rx";
243 ddata->supplies[4].supply = "vdd-io";
244
245 ret = regulator_bulk_get(dev, WCD934X_MAX_SUPPLY, ddata->supplies);
246 if (ret) {
247 dev_err(dev, "Failed to get supplies: err = %d\n", ret);
248 return ret;
249 }
250
251 ret = regulator_bulk_enable(WCD934X_MAX_SUPPLY, ddata->supplies);
252 if (ret) {
253 dev_err(dev, "Failed to enable supplies: err = %d\n", ret);
254 return ret;
255 }
256
257
258
259
260
261
262 usleep_range(600, 650);
263 gpio_direction_output(reset_gpio, 0);
264 msleep(20);
265 gpio_set_value(reset_gpio, 1);
266 msleep(20);
267
268 ddata->dev = dev;
269 dev_set_drvdata(dev, ddata);
270
271 return 0;
272}
273
274static void wcd934x_slim_remove(struct slim_device *sdev)
275{
276 struct wcd934x_ddata *ddata = dev_get_drvdata(&sdev->dev);
277
278 regulator_bulk_disable(WCD934X_MAX_SUPPLY, ddata->supplies);
279 mfd_remove_devices(&sdev->dev);
280}
281
282static const struct slim_device_id wcd934x_slim_id[] = {
283 { SLIM_MANF_ID_QCOM, SLIM_PROD_CODE_WCD9340,
284 SLIM_DEV_IDX_WCD9340, SLIM_DEV_INSTANCE_ID_WCD9340 },
285 {}
286};
287
288static struct slim_driver wcd934x_slim_driver = {
289 .driver = {
290 .name = "wcd934x-slim",
291 },
292 .probe = wcd934x_slim_probe,
293 .remove = wcd934x_slim_remove,
294 .device_status = wcd934x_slim_status,
295 .id_table = wcd934x_slim_id,
296};
297
298module_slim_driver(wcd934x_slim_driver);
299MODULE_DESCRIPTION("WCD934X slim driver");
300MODULE_LICENSE("GPL v2");
301MODULE_ALIAS("slim:217:250:*");
302MODULE_AUTHOR("Srinivas Kandagatla <srinivas.kandagatla@linaro.org>");
303
