LXR linux/drivers/net/ethernet/intel/ice/ice.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright (c) 2018, Intel Corporation. */
   3
   4#ifndef _ICE_H_
   5#define _ICE_H_
   6
   7#include <linux/types.h>
   8#include <linux/errno.h>
   9#include <linux/kernel.h>
  10#include <linux/module.h>
  11#include <linux/firmware.h>
  12#include <linux/netdevice.h>
  13#include <linux/compiler.h>
  14#include <linux/etherdevice.h>
  15#include <linux/skbuff.h>
  16#include <linux/cpumask.h>
  17#include <linux/rtnetlink.h>
  18#include <linux/if_vlan.h>
  19#include <linux/dma-mapping.h>
  20#include <linux/pci.h>
  21#include <linux/workqueue.h>
  22#include <linux/wait.h>
  23#include <linux/aer.h>
  24#include <linux/interrupt.h>
  25#include <linux/ethtool.h>
  26#include <linux/timer.h>
  27#include <linux/delay.h>
  28#include <linux/bitmap.h>
  29#include <linux/log2.h>
  30#include <linux/ip.h>
  31#include <linux/sctp.h>
  32#include <linux/ipv6.h>
  33#include <linux/pkt_sched.h>
  34#include <linux/if_bridge.h>
  35#include <linux/ctype.h>
  36#include <linux/bpf.h>
  37#include <linux/avf/virtchnl.h>
  38#include <linux/cpu_rmap.h>
  39#include <net/devlink.h>
  40#include <net/ipv6.h>
  41#include <net/xdp_sock.h>
  42#include <net/geneve.h>
  43#include <net/gre.h>
  44#include <net/udp_tunnel.h>
  45#include <net/vxlan.h>
  46#include "ice_devids.h"
  47#include "ice_type.h"
  48#include "ice_txrx.h"
  49#include "ice_dcb.h"
  50#include "ice_switch.h"
  51#include "ice_common.h"
  52#include "ice_sched.h"
  53#include "ice_virtchnl_pf.h"
  54#include "ice_sriov.h"
  55#include "ice_fdir.h"
  56#include "ice_xsk.h"
  57#include "ice_arfs.h"
  58
  59#define ICE_BAR0                0
  60#define ICE_REQ_DESC_MULTIPLE   32
  61#define ICE_MIN_NUM_DESC        64
  62#define ICE_MAX_NUM_DESC        8160
  63#define ICE_DFLT_MIN_RX_DESC    512
  64#define ICE_DFLT_NUM_TX_DESC    256
  65#define ICE_DFLT_NUM_RX_DESC    2048
  66
  67#define ICE_DFLT_TRAFFIC_CLASS  BIT(0)
  68#define ICE_INT_NAME_STR_LEN    (IFNAMSIZ + 16)
  69#define ICE_AQ_LEN              64
  70#define ICE_MBXSQ_LEN           64
  71#define ICE_MIN_MSIX            2
  72#define ICE_FDIR_MSIX           1
  73#define ICE_NO_VSI              0xffff
  74#define ICE_VSI_MAP_CONTIG      0
  75#define ICE_VSI_MAP_SCATTER     1
  76#define ICE_MAX_SCATTER_TXQS    16
  77#define ICE_MAX_SCATTER_RXQS    16
  78#define ICE_Q_WAIT_RETRY_LIMIT  10
  79#define ICE_Q_WAIT_MAX_RETRY    (5 * ICE_Q_WAIT_RETRY_LIMIT)
  80#define ICE_MAX_LG_RSS_QS       256
  81#define ICE_RES_VALID_BIT       0x8000
  82#define ICE_RES_MISC_VEC_ID     (ICE_RES_VALID_BIT - 1)
  83#define ICE_INVAL_Q_INDEX       0xffff
  84#define ICE_INVAL_VFID          256
  85
  86#define ICE_MAX_RESET_WAIT              20
  87
  88#define ICE_VSIQF_HKEY_ARRAY_SIZE       ((VSIQF_HKEY_MAX_INDEX + 1) *   4)
  89
  90#define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
  91
  92#define ICE_MAX_MTU     (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
  93
  94#define ICE_UP_TABLE_TRANSLATE(val, i) \
  95                (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
  96                  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
  97
  98#define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
  99#define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
 100#define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
 101#define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
 102
 103/* Macro for each VSI in a PF */
 104#define ice_for_each_vsi(pf, i) \
 105        for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
 106
 107/* Macros for each Tx/Rx ring in a VSI */
 108#define ice_for_each_txq(vsi, i) \
 109        for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
 110
 111#define ice_for_each_rxq(vsi, i) \
 112        for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
 113
 114/* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
 115#define ice_for_each_alloc_txq(vsi, i) \
 116        for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
 117
 118#define ice_for_each_alloc_rxq(vsi, i) \
 119        for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
 120
 121#define ice_for_each_q_vector(vsi, i) \
 122        for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
 123
 124#define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
 125                                ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
 126
 127#define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
 128                                     ICE_PROMISC_MCAST_TX | \
 129                                     ICE_PROMISC_UCAST_RX | \
 130                                     ICE_PROMISC_MCAST_RX | \
 131                                     ICE_PROMISC_VLAN_TX  | \
 132                                     ICE_PROMISC_VLAN_RX)
 133
 134#define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
 135
 136#define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
 137                                     ICE_PROMISC_MCAST_RX | \
 138                                     ICE_PROMISC_VLAN_TX  | \
 139                                     ICE_PROMISC_VLAN_RX)
 140
 141#define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
 142
 143struct ice_txq_meta {
 144        u32 q_teid;     /* Tx-scheduler element identifier */
 145        u16 q_id;       /* Entry in VSI's txq_map bitmap */
 146        u16 q_handle;   /* Relative index of Tx queue within TC */
 147        u16 vsi_idx;    /* VSI index that Tx queue belongs to */
 148        u8 tc;          /* TC number that Tx queue belongs to */
 149};
 150
 151struct ice_tc_info {
 152        u16 qoffset;
 153        u16 qcount_tx;
 154        u16 qcount_rx;
 155        u8 netdev_tc;
 156};
 157
 158struct ice_tc_cfg {
 159        u8 numtc; /* Total number of enabled TCs */
 160        u8 ena_tc; /* Tx map */
 161        struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
 162};
 163
 164struct ice_res_tracker {
 165        u16 num_entries;
 166        u16 end;
 167        u16 list[1];
 168};
 169
 170struct ice_qs_cfg {
 171        struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
 172        unsigned long *pf_map;
 173        unsigned long pf_map_size;
 174        unsigned int q_count;
 175        unsigned int scatter_count;
 176        u16 *vsi_map;
 177        u16 vsi_map_offset;
 178        u8 mapping_mode;
 179};
 180
 181struct ice_sw {
 182        struct ice_pf *pf;
 183        u16 sw_id;              /* switch ID for this switch */
 184        u16 bridge_mode;        /* VEB/VEPA/Port Virtualizer */
 185        struct ice_vsi *dflt_vsi;       /* default VSI for this switch */
 186        u8 dflt_vsi_ena:1;      /* true if above dflt_vsi is enabled */
 187};
 188
 189enum ice_state {
 190        __ICE_TESTING,
 191        __ICE_DOWN,
 192        __ICE_NEEDS_RESTART,
 193        __ICE_PREPARED_FOR_RESET,       /* set by driver when prepared */
 194        __ICE_RESET_OICR_RECV,          /* set by driver after rcv reset OICR */
 195        __ICE_DCBNL_DEVRESET,           /* set by dcbnl devreset */
 196        __ICE_PFR_REQ,                  /* set by driver and peers */
 197        __ICE_CORER_REQ,                /* set by driver and peers */
 198        __ICE_GLOBR_REQ,                /* set by driver and peers */
 199        __ICE_CORER_RECV,               /* set by OICR handler */
 200        __ICE_GLOBR_RECV,               /* set by OICR handler */
 201        __ICE_EMPR_RECV,                /* set by OICR handler */
 202        __ICE_SUSPENDED,                /* set on module remove path */
 203        __ICE_RESET_FAILED,             /* set by reset/rebuild */
 204        /* When checking for the PF to be in a nominal operating state, the
 205         * bits that are grouped at the beginning of the list need to be
 206         * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will
 207         * be checked. If you need to add a bit into consideration for nominal
 208         * operating state, it must be added before
 209         * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
 210         * without appropriate consideration.
 211         */
 212        __ICE_STATE_NOMINAL_CHECK_BITS,
 213        __ICE_ADMINQ_EVENT_PENDING,
 214        __ICE_MAILBOXQ_EVENT_PENDING,
 215        __ICE_MDD_EVENT_PENDING,
 216        __ICE_VFLR_EVENT_PENDING,
 217        __ICE_FLTR_OVERFLOW_PROMISC,
 218        __ICE_VF_DIS,
 219        __ICE_CFG_BUSY,
 220        __ICE_SERVICE_SCHED,
 221        __ICE_SERVICE_DIS,
 222        __ICE_FD_FLUSH_REQ,
 223        __ICE_OICR_INTR_DIS,            /* Global OICR interrupt disabled */
 224        __ICE_MDD_VF_PRINT_PENDING,     /* set when MDD event handle */
 225        __ICE_VF_RESETS_DISABLED,       /* disable resets during ice_remove */
 226        __ICE_LINK_DEFAULT_OVERRIDE_PENDING,
 227        __ICE_PHY_INIT_COMPLETE,
 228        __ICE_STATE_NBITS               /* must be last */
 229};
 230
 231enum ice_vsi_flags {
 232        ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
 233        ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
 234        ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
 235        ICE_VSI_FLAG_PROMISC_CHANGED,
 236        ICE_VSI_FLAG_NBITS              /* must be last */
 237};
 238
 239/* struct that defines a VSI, associated with a dev */
 240struct ice_vsi {
 241        struct net_device *netdev;
 242        struct ice_sw *vsw;              /* switch this VSI is on */
 243        struct ice_pf *back;             /* back pointer to PF */
 244        struct ice_port_info *port_info; /* back pointer to port_info */
 245        struct ice_ring **rx_rings;      /* Rx ring array */
 246        struct ice_ring **tx_rings;      /* Tx ring array */
 247        struct ice_q_vector **q_vectors; /* q_vector array */
 248
 249        irqreturn_t (*irq_handler)(int irq, void *data);
 250
 251        u64 tx_linearize;
 252        DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 253        DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
 254        unsigned int current_netdev_flags;
 255        u32 tx_restart;
 256        u32 tx_busy;
 257        u32 rx_buf_failed;
 258        u32 rx_page_failed;
 259        u32 rx_gro_dropped;
 260        u16 num_q_vectors;
 261        u16 base_vector;                /* IRQ base for OS reserved vectors */
 262        enum ice_vsi_type type;
 263        u16 vsi_num;                    /* HW (absolute) index of this VSI */
 264        u16 idx;                        /* software index in pf->vsi[] */
 265
 266        s16 vf_id;                      /* VF ID for SR-IOV VSIs */
 267
 268        u16 ethtype;                    /* Ethernet protocol for pause frame */
 269        u16 num_gfltr;
 270        u16 num_bfltr;
 271
 272        /* RSS config */
 273        u16 rss_table_size;     /* HW RSS table size */
 274        u16 rss_size;           /* Allocated RSS queues */
 275        u8 *rss_hkey_user;      /* User configured hash keys */
 276        u8 *rss_lut_user;       /* User configured lookup table entries */
 277        u8 rss_lut_type;        /* used to configure Get/Set RSS LUT AQ call */
 278
 279        /* aRFS members only allocated for the PF VSI */
 280#define ICE_MAX_ARFS_LIST       1024
 281#define ICE_ARFS_LST_MASK       (ICE_MAX_ARFS_LIST - 1)
 282        struct hlist_head *arfs_fltr_list;
 283        struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
 284        spinlock_t arfs_lock;   /* protects aRFS hash table and filter state */
 285        atomic_t *arfs_last_fltr_id;
 286
 287        /* devlink port data */
 288        struct devlink_port devlink_port;
 289        bool devlink_port_registered;
 290
 291        u16 max_frame;
 292        u16 rx_buf_len;
 293
 294        struct ice_aqc_vsi_props info;   /* VSI properties */
 295
 296        /* VSI stats */
 297        struct rtnl_link_stats64 net_stats;
 298        struct ice_eth_stats eth_stats;
 299        struct ice_eth_stats eth_stats_prev;
 300
 301        struct list_head tmp_sync_list;         /* MAC filters to be synced */
 302        struct list_head tmp_unsync_list;       /* MAC filters to be unsynced */
 303
 304        u8 irqs_ready:1;
 305        u8 current_isup:1;               /* Sync 'link up' logging */
 306        u8 stat_offsets_loaded:1;
 307        u8 vlan_ena:1;
 308        u16 num_vlan;
 309
 310        /* queue information */
 311        u8 tx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 312        u8 rx_mapping_mode;              /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 313        u16 *txq_map;                    /* index in pf->avail_txqs */
 314        u16 *rxq_map;                    /* index in pf->avail_rxqs */
 315        u16 alloc_txq;                   /* Allocated Tx queues */
 316        u16 num_txq;                     /* Used Tx queues */
 317        u16 alloc_rxq;                   /* Allocated Rx queues */
 318        u16 num_rxq;                     /* Used Rx queues */
 319        u16 req_txq;                     /* User requested Tx queues */
 320        u16 req_rxq;                     /* User requested Rx queues */
 321        u16 num_rx_desc;
 322        u16 num_tx_desc;
 323        struct ice_tc_cfg tc_cfg;
 324        struct bpf_prog *xdp_prog;
 325        struct ice_ring **xdp_rings;     /* XDP ring array */
 326        u16 num_xdp_txq;                 /* Used XDP queues */
 327        u8 xdp_mapping_mode;             /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 328        struct xsk_buff_pool **xsk_pools;
 329        u16 num_xsk_pools_used;
 330        u16 num_xsk_pools;
 331} ____cacheline_internodealigned_in_smp;
 332
 333/* struct that defines an interrupt vector */
 334struct ice_q_vector {
 335        struct ice_vsi *vsi;
 336
 337        u16 v_idx;                      /* index in the vsi->q_vector array. */
 338        u16 reg_idx;
 339        u8 num_ring_rx;                 /* total number of Rx rings in vector */
 340        u8 num_ring_tx;                 /* total number of Tx rings in vector */
 341        u8 itr_countdown;               /* when 0 should adjust adaptive ITR */
 342        /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
 343         * value to the device
 344         */
 345        u8 intrl;
 346
 347        struct napi_struct napi;
 348
 349        struct ice_ring_container rx;
 350        struct ice_ring_container tx;
 351
 352        cpumask_t affinity_mask;
 353        struct irq_affinity_notify affinity_notify;
 354
 355        char name[ICE_INT_NAME_STR_LEN];
 356} ____cacheline_internodealigned_in_smp;
 357
 358enum ice_pf_flags {
 359        ICE_FLAG_FLTR_SYNC,
 360        ICE_FLAG_RSS_ENA,
 361        ICE_FLAG_SRIOV_ENA,
 362        ICE_FLAG_SRIOV_CAPABLE,
 363        ICE_FLAG_DCB_CAPABLE,
 364        ICE_FLAG_DCB_ENA,
 365        ICE_FLAG_FD_ENA,
 366        ICE_FLAG_ADV_FEATURES,
 367        ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
 368        ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
 369        ICE_FLAG_NO_MEDIA,
 370        ICE_FLAG_FW_LLDP_AGENT,
 371        ICE_FLAG_ETHTOOL_CTXT,          /* set when ethtool holds RTNL lock */
 372        ICE_FLAG_LEGACY_RX,
 373        ICE_FLAG_VF_TRUE_PROMISC_ENA,
 374        ICE_FLAG_MDD_AUTO_RESET_VF,
 375        ICE_FLAG_LINK_LENIENT_MODE_ENA,
 376        ICE_PF_FLAGS_NBITS              /* must be last */
 377};
 378
 379struct ice_pf {
 380        struct pci_dev *pdev;
 381
 382        struct devlink_region *nvm_region;
 383        struct devlink_region *devcaps_region;
 384
 385        /* OS reserved IRQ details */
 386        struct msix_entry *msix_entries;
 387        struct ice_res_tracker *irq_tracker;
 388        /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
 389         * number of MSIX vectors needed for all SR-IOV VFs from the number of
 390         * MSIX vectors allowed on this PF.
 391         */
 392        u16 sriov_base_vector;
 393
 394        u16 ctrl_vsi_idx;               /* control VSI index in pf->vsi array */
 395
 396        struct ice_vsi **vsi;           /* VSIs created by the driver */
 397        struct ice_sw *first_sw;        /* first switch created by firmware */
 398        /* Virtchnl/SR-IOV config info */
 399        struct ice_vf *vf;
 400        u16 num_alloc_vfs;              /* actual number of VFs allocated */
 401        u16 num_vfs_supported;          /* num VFs supported for this PF */
 402        u16 num_qps_per_vf;
 403        u16 num_msix_per_vf;
 404        /* used to ratelimit the MDD event logging */
 405        unsigned long last_printed_mdd_jiffies;
 406        DECLARE_BITMAP(state, __ICE_STATE_NBITS);
 407        DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
 408        unsigned long *avail_txqs;      /* bitmap to track PF Tx queue usage */
 409        unsigned long *avail_rxqs;      /* bitmap to track PF Rx queue usage */
 410        unsigned long serv_tmr_period;
 411        unsigned long serv_tmr_prev;
 412        struct timer_list serv_tmr;
 413        struct work_struct serv_task;
 414        struct mutex avail_q_mutex;     /* protects access to avail_[rx|tx]qs */
 415        struct mutex sw_mutex;          /* lock for protecting VSI alloc flow */
 416        struct mutex tc_mutex;          /* lock to protect TC changes */
 417        u32 msg_enable;
 418
 419        /* spinlock to protect the AdminQ wait list */
 420        spinlock_t aq_wait_lock;
 421        struct hlist_head aq_wait_list;
 422        wait_queue_head_t aq_wait_queue;
 423
 424        u32 hw_csum_rx_error;
 425        u16 oicr_idx;           /* Other interrupt cause MSIX vector index */
 426        u16 num_avail_sw_msix;  /* remaining MSIX SW vectors left unclaimed */
 427        u16 max_pf_txqs;        /* Total Tx queues PF wide */
 428        u16 max_pf_rxqs;        /* Total Rx queues PF wide */
 429        u16 num_lan_msix;       /* Total MSIX vectors for base driver */
 430        u16 num_lan_tx;         /* num LAN Tx queues setup */
 431        u16 num_lan_rx;         /* num LAN Rx queues setup */
 432        u16 next_vsi;           /* Next free slot in pf->vsi[] - 0-based! */
 433        u16 num_alloc_vsi;
 434        u16 corer_count;        /* Core reset count */
 435        u16 globr_count;        /* Global reset count */
 436        u16 empr_count;         /* EMP reset count */
 437        u16 pfr_count;          /* PF reset count */
 438
 439        u8 wol_ena : 1;         /* software state of WoL */
 440        u32 wakeup_reason;      /* last wakeup reason */
 441        struct ice_hw_port_stats stats;
 442        struct ice_hw_port_stats stats_prev;
 443        struct ice_hw hw;
 444        u8 stat_prev_loaded:1; /* has previous stats been loaded */
 445#ifdef CONFIG_DCB
 446        u16 dcbx_cap;
 447#endif /* CONFIG_DCB */
 448        u32 tx_timeout_count;
 449        unsigned long tx_timeout_last_recovery;
 450        u32 tx_timeout_recovery_level;
 451        char int_name[ICE_INT_NAME_STR_LEN];
 452        u32 sw_int_count;
 453
 454        __le64 nvm_phy_type_lo; /* NVM PHY type low */
 455        __le64 nvm_phy_type_hi; /* NVM PHY type high */
 456        struct ice_link_default_override_tlv link_dflt_override;
 457};
 458
 459struct ice_netdev_priv {
 460        struct ice_vsi *vsi;
 461};
 462
 463/**
 464 * ice_irq_dynamic_ena - Enable default interrupt generation settings
 465 * @hw: pointer to HW struct
 466 * @vsi: pointer to VSI struct, can be NULL
 467 * @q_vector: pointer to q_vector, can be NULL
 468 */
 469static inline void
 470ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
 471                    struct ice_q_vector *q_vector)
 472{
 473        u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
 474                                ((struct ice_pf *)hw->back)->oicr_idx;
 475        int itr = ICE_ITR_NONE;
 476        u32 val;
 477
 478        /* clear the PBA here, as this function is meant to clean out all
 479         * previous interrupts and enable the interrupt
 480         */
 481        val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
 482              (itr << GLINT_DYN_CTL_ITR_INDX_S);
 483        if (vsi)
 484                if (test_bit(__ICE_DOWN, vsi->state))
 485                        return;
 486        wr32(hw, GLINT_DYN_CTL(vector), val);
 487}
 488
 489/**
 490 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
 491 * @netdev: pointer to the netdev struct
 492 */
 493static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
 494{
 495        struct ice_netdev_priv *np = netdev_priv(netdev);
 496
 497        return np->vsi->back;
 498}
 499
 500static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
 501{
 502        return !!vsi->xdp_prog;
 503}
 504
 505static inline void ice_set_ring_xdp(struct ice_ring *ring)
 506{
 507        ring->flags |= ICE_TX_FLAGS_RING_XDP;
 508}
 509
 510/**
 511 * ice_xsk_pool - get XSK buffer pool bound to a ring
 512 * @ring: ring to use
 513 *
 514 * Returns a pointer to xdp_umem structure if there is a buffer pool present,
 515 * NULL otherwise.
 516 */
 517static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring)
 518{
 519        struct xsk_buff_pool **pools = ring->vsi->xsk_pools;
 520        u16 qid = ring->q_index;
 521
 522        if (ice_ring_is_xdp(ring))
 523                qid -= ring->vsi->num_xdp_txq;
 524
 525        if (qid >= ring->vsi->num_xsk_pools || !pools || !pools[qid] ||
 526            !ice_is_xdp_ena_vsi(ring->vsi))
 527                return NULL;
 528
 529        return pools[qid];
 530}
 531
 532/**
 533 * ice_get_main_vsi - Get the PF VSI
 534 * @pf: PF instance
 535 *
 536 * returns pf->vsi[0], which by definition is the PF VSI
 537 */
 538static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
 539{
 540        if (pf->vsi)
 541                return pf->vsi[0];
 542
 543        return NULL;
 544}
 545
 546/**
 547 * ice_get_ctrl_vsi - Get the control VSI
 548 * @pf: PF instance
 549 */
 550static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
 551{
 552        /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
 553        if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
 554                return NULL;
 555
 556        return pf->vsi[pf->ctrl_vsi_idx];
 557}
 558
 559#define ICE_FD_STAT_CTR_BLOCK_COUNT     256
 560#define ICE_FD_STAT_PF_IDX(base_idx) \
 561                        ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
 562#define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
 563
 564int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
 565int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
 566int ice_vsi_open_ctrl(struct ice_vsi *vsi);
 567void ice_set_ethtool_ops(struct net_device *netdev);
 568void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
 569u16 ice_get_avail_txq_count(struct ice_pf *pf);
 570u16 ice_get_avail_rxq_count(struct ice_pf *pf);
 571int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
 572void ice_update_vsi_stats(struct ice_vsi *vsi);
 573void ice_update_pf_stats(struct ice_pf *pf);
 574int ice_up(struct ice_vsi *vsi);
 575int ice_down(struct ice_vsi *vsi);
 576int ice_vsi_cfg(struct ice_vsi *vsi);
 577struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
 578int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
 579int ice_destroy_xdp_rings(struct ice_vsi *vsi);
 580int
 581ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
 582             u32 flags);
 583int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 584int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
 585void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
 586int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
 587void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
 588const char *ice_stat_str(enum ice_status stat_err);
 589const char *ice_aq_str(enum ice_aq_err aq_err);
 590bool ice_is_wol_supported(struct ice_pf *pf);
 591int
 592ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
 593                    bool is_tun);
 594void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
 595int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
 596int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
 597int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
 598int
 599ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
 600                      u32 *rule_locs);
 601void ice_fdir_release_flows(struct ice_hw *hw);
 602void ice_fdir_replay_flows(struct ice_hw *hw);
 603void ice_fdir_replay_fltrs(struct ice_pf *pf);
 604int ice_fdir_create_dflt_rules(struct ice_pf *pf);
 605int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
 606                          struct ice_rq_event_info *event);
 607int ice_open(struct net_device *netdev);
 608int ice_stop(struct net_device *netdev);
 609void ice_service_task_schedule(struct ice_pf *pf);
 610
 611#endif /* _ICE_H_ */
 612