1
2
3
4
5
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#include <generated/utsrelease.h>
9#include "ice.h"
10#include "ice_base.h"
11#include "ice_lib.h"
12#include "ice_fltr.h"
13#include "ice_dcb_lib.h"
14#include "ice_dcb_nl.h"
15#include "ice_devlink.h"
16
17#define DRV_SUMMARY "Intel(R) Ethernet Connection E800 Series Linux Driver"
18static const char ice_driver_string[] = DRV_SUMMARY;
19static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation.";
20
21
22#define ICE_DDP_PKG_PATH "intel/ice/ddp/"
23#define ICE_DDP_PKG_FILE ICE_DDP_PKG_PATH "ice.pkg"
24
25MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
26MODULE_DESCRIPTION(DRV_SUMMARY);
27MODULE_LICENSE("GPL v2");
28MODULE_FIRMWARE(ICE_DDP_PKG_FILE);
29
30static int debug = -1;
31module_param(debug, int, 0644);
32#ifndef CONFIG_DYNAMIC_DEBUG
33MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all), hw debug_mask (0x8XXXXXXX)");
34#else
35MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all)");
36#endif
37
38static struct workqueue_struct *ice_wq;
39static const struct net_device_ops ice_netdev_safe_mode_ops;
40static const struct net_device_ops ice_netdev_ops;
41static int ice_vsi_open(struct ice_vsi *vsi);
42
43static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type);
44
45static void ice_vsi_release_all(struct ice_pf *pf);
46
47
48
49
50
51static u16 ice_get_tx_pending(struct ice_ring *ring)
52{
53 u16 head, tail;
54
55 head = ring->next_to_clean;
56 tail = ring->next_to_use;
57
58 if (head != tail)
59 return (head < tail) ?
60 tail - head : (tail + ring->count - head);
61 return 0;
62}
63
64
65
66
67
68static void ice_check_for_hang_subtask(struct ice_pf *pf)
69{
70 struct ice_vsi *vsi = NULL;
71 struct ice_hw *hw;
72 unsigned int i;
73 int packets;
74 u32 v;
75
76 ice_for_each_vsi(pf, v)
77 if (pf->vsi[v] && pf->vsi[v]->type == ICE_VSI_PF) {
78 vsi = pf->vsi[v];
79 break;
80 }
81
82 if (!vsi || test_bit(__ICE_DOWN, vsi->state))
83 return;
84
85 if (!(vsi->netdev && netif_carrier_ok(vsi->netdev)))
86 return;
87
88 hw = &vsi->back->hw;
89
90 for (i = 0; i < vsi->num_txq; i++) {
91 struct ice_ring *tx_ring = vsi->tx_rings[i];
92
93 if (tx_ring && tx_ring->desc) {
94
95
96
97
98
99
100
101 packets = tx_ring->stats.pkts & INT_MAX;
102 if (tx_ring->tx_stats.prev_pkt == packets) {
103
104 ice_trigger_sw_intr(hw, tx_ring->q_vector);
105 continue;
106 }
107
108
109
110
111 smp_rmb();
112 tx_ring->tx_stats.prev_pkt =
113 ice_get_tx_pending(tx_ring) ? packets : -1;
114 }
115 }
116}
117
118
119
120
121
122
123
124
125
126static int ice_init_mac_fltr(struct ice_pf *pf)
127{
128 enum ice_status status;
129 struct ice_vsi *vsi;
130 u8 *perm_addr;
131
132 vsi = ice_get_main_vsi(pf);
133 if (!vsi)
134 return -EINVAL;
135
136 perm_addr = vsi->port_info->mac.perm_addr;
137 status = ice_fltr_add_mac_and_broadcast(vsi, perm_addr, ICE_FWD_TO_VSI);
138 if (!status)
139 return 0;
140
141
142
143
144 if (vsi->netdev->reg_state == NETREG_REGISTERED) {
145 dev_err(ice_pf_to_dev(pf), "Could not add MAC filters error %s. Unregistering device\n",
146 ice_stat_str(status));
147 unregister_netdev(vsi->netdev);
148 free_netdev(vsi->netdev);
149 vsi->netdev = NULL;
150 }
151
152 return -EIO;
153}
154
155
156
157
158
159
160
161
162
163
164
165static int ice_add_mac_to_sync_list(struct net_device *netdev, const u8 *addr)
166{
167 struct ice_netdev_priv *np = netdev_priv(netdev);
168 struct ice_vsi *vsi = np->vsi;
169
170 if (ice_fltr_add_mac_to_list(vsi, &vsi->tmp_sync_list, addr,
171 ICE_FWD_TO_VSI))
172 return -EINVAL;
173
174 return 0;
175}
176
177
178
179
180
181
182
183
184
185
186
187static int ice_add_mac_to_unsync_list(struct net_device *netdev, const u8 *addr)
188{
189 struct ice_netdev_priv *np = netdev_priv(netdev);
190 struct ice_vsi *vsi = np->vsi;
191
192 if (ice_fltr_add_mac_to_list(vsi, &vsi->tmp_unsync_list, addr,
193 ICE_FWD_TO_VSI))
194 return -EINVAL;
195
196 return 0;
197}
198
199
200
201
202
203
204
205static bool ice_vsi_fltr_changed(struct ice_vsi *vsi)
206{
207 return test_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags) ||
208 test_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags) ||
209 test_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
210}
211
212
213
214
215
216
217
218
219static int ice_cfg_promisc(struct ice_vsi *vsi, u8 promisc_m, bool set_promisc)
220{
221 struct ice_hw *hw = &vsi->back->hw;
222 enum ice_status status = 0;
223
224 if (vsi->type != ICE_VSI_PF)
225 return 0;
226
227 if (vsi->vlan_ena) {
228 status = ice_set_vlan_vsi_promisc(hw, vsi->idx, promisc_m,
229 set_promisc);
230 } else {
231 if (set_promisc)
232 status = ice_set_vsi_promisc(hw, vsi->idx, promisc_m,
233 0);
234 else
235 status = ice_clear_vsi_promisc(hw, vsi->idx, promisc_m,
236 0);
237 }
238
239 if (status)
240 return -EIO;
241
242 return 0;
243}
244
245
246
247
248
249
250
251static int ice_vsi_sync_fltr(struct ice_vsi *vsi)
252{
253 struct device *dev = ice_pf_to_dev(vsi->back);
254 struct net_device *netdev = vsi->netdev;
255 bool promisc_forced_on = false;
256 struct ice_pf *pf = vsi->back;
257 struct ice_hw *hw = &pf->hw;
258 enum ice_status status = 0;
259 u32 changed_flags = 0;
260 u8 promisc_m;
261 int err = 0;
262
263 if (!vsi->netdev)
264 return -EINVAL;
265
266 while (test_and_set_bit(__ICE_CFG_BUSY, vsi->state))
267 usleep_range(1000, 2000);
268
269 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
270 vsi->current_netdev_flags = vsi->netdev->flags;
271
272 INIT_LIST_HEAD(&vsi->tmp_sync_list);
273 INIT_LIST_HEAD(&vsi->tmp_unsync_list);
274
275 if (ice_vsi_fltr_changed(vsi)) {
276 clear_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags);
277 clear_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags);
278 clear_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
279
280
281 netif_addr_lock_bh(netdev);
282 __dev_uc_sync(netdev, ice_add_mac_to_sync_list,
283 ice_add_mac_to_unsync_list);
284 __dev_mc_sync(netdev, ice_add_mac_to_sync_list,
285 ice_add_mac_to_unsync_list);
286
287 netif_addr_unlock_bh(netdev);
288 }
289
290
291 status = ice_fltr_remove_mac_list(vsi, &vsi->tmp_unsync_list);
292 ice_fltr_free_list(dev, &vsi->tmp_unsync_list);
293 if (status) {
294 netdev_err(netdev, "Failed to delete MAC filters\n");
295
296 if (status == ICE_ERR_NO_MEMORY) {
297 err = -ENOMEM;
298 goto out;
299 }
300 }
301
302
303 status = ice_fltr_add_mac_list(vsi, &vsi->tmp_sync_list);
304 ice_fltr_free_list(dev, &vsi->tmp_sync_list);
305
306
307
308
309 if (status && status != ICE_ERR_ALREADY_EXISTS) {
310 netdev_err(netdev, "Failed to add MAC filters\n");
311
312
313
314
315 if (hw->adminq.sq_last_status == ICE_AQ_RC_ENOSPC &&
316 !test_and_set_bit(__ICE_FLTR_OVERFLOW_PROMISC,
317 vsi->state)) {
318 promisc_forced_on = true;
319 netdev_warn(netdev, "Reached MAC filter limit, forcing promisc mode on VSI %d\n",
320 vsi->vsi_num);
321 } else {
322 err = -EIO;
323 goto out;
324 }
325 }
326
327 if (changed_flags & IFF_ALLMULTI) {
328 if (vsi->current_netdev_flags & IFF_ALLMULTI) {
329 if (vsi->vlan_ena)
330 promisc_m = ICE_MCAST_VLAN_PROMISC_BITS;
331 else
332 promisc_m = ICE_MCAST_PROMISC_BITS;
333
334 err = ice_cfg_promisc(vsi, promisc_m, true);
335 if (err) {
336 netdev_err(netdev, "Error setting Multicast promiscuous mode on VSI %i\n",
337 vsi->vsi_num);
338 vsi->current_netdev_flags &= ~IFF_ALLMULTI;
339 goto out_promisc;
340 }
341 } else {
342
343 if (vsi->vlan_ena)
344 promisc_m = ICE_MCAST_VLAN_PROMISC_BITS;
345 else
346 promisc_m = ICE_MCAST_PROMISC_BITS;
347
348 err = ice_cfg_promisc(vsi, promisc_m, false);
349 if (err) {
350 netdev_err(netdev, "Error clearing Multicast promiscuous mode on VSI %i\n",
351 vsi->vsi_num);
352 vsi->current_netdev_flags |= IFF_ALLMULTI;
353 goto out_promisc;
354 }
355 }
356 }
357
358 if (((changed_flags & IFF_PROMISC) || promisc_forced_on) ||
359 test_bit(ICE_VSI_FLAG_PROMISC_CHANGED, vsi->flags)) {
360 clear_bit(ICE_VSI_FLAG_PROMISC_CHANGED, vsi->flags);
361 if (vsi->current_netdev_flags & IFF_PROMISC) {
362
363 if (!ice_is_dflt_vsi_in_use(pf->first_sw)) {
364 err = ice_set_dflt_vsi(pf->first_sw, vsi);
365 if (err && err != -EEXIST) {
366 netdev_err(netdev, "Error %d setting default VSI %i Rx rule\n",
367 err, vsi->vsi_num);
368 vsi->current_netdev_flags &=
369 ~IFF_PROMISC;
370 goto out_promisc;
371 }
372 ice_cfg_vlan_pruning(vsi, false, false);
373 }
374 } else {
375
376 if (ice_is_vsi_dflt_vsi(pf->first_sw, vsi)) {
377 err = ice_clear_dflt_vsi(pf->first_sw);
378 if (err) {
379 netdev_err(netdev, "Error %d clearing default VSI %i Rx rule\n",
380 err, vsi->vsi_num);
381 vsi->current_netdev_flags |=
382 IFF_PROMISC;
383 goto out_promisc;
384 }
385 if (vsi->num_vlan > 1)
386 ice_cfg_vlan_pruning(vsi, true, false);
387 }
388 }
389 }
390 goto exit;
391
392out_promisc:
393 set_bit(ICE_VSI_FLAG_PROMISC_CHANGED, vsi->flags);
394 goto exit;
395out:
396
397 set_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags);
398 set_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags);
399exit:
400 clear_bit(__ICE_CFG_BUSY, vsi->state);
401 return err;
402}
403
404
405
406
407
408static void ice_sync_fltr_subtask(struct ice_pf *pf)
409{
410 int v;
411
412 if (!pf || !(test_bit(ICE_FLAG_FLTR_SYNC, pf->flags)))
413 return;
414
415 clear_bit(ICE_FLAG_FLTR_SYNC, pf->flags);
416
417 ice_for_each_vsi(pf, v)
418 if (pf->vsi[v] && ice_vsi_fltr_changed(pf->vsi[v]) &&
419 ice_vsi_sync_fltr(pf->vsi[v])) {
420
421 set_bit(ICE_FLAG_FLTR_SYNC, pf->flags);
422 break;
423 }
424}
425
426
427
428
429
430
431static void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked)
432{
433 int v;
434
435 ice_for_each_vsi(pf, v)
436 if (pf->vsi[v])
437 ice_dis_vsi(pf->vsi[v], locked);
438}
439
440
441
442
443
444
445
446static void
447ice_prepare_for_reset(struct ice_pf *pf)
448{
449 struct ice_hw *hw = &pf->hw;
450 unsigned int i;
451
452
453 if (test_bit(__ICE_PREPARED_FOR_RESET, pf->state))
454 return;
455
456
457 if (ice_check_sq_alive(hw, &hw->mailboxq))
458 ice_vc_notify_reset(pf);
459
460
461 ice_for_each_vf(pf, i)
462 ice_set_vf_state_qs_dis(&pf->vf[i]);
463
464
465 ice_clear_hw_tbls(hw);
466
467 ice_pf_dis_all_vsi(pf, false);
468
469 if (hw->port_info)
470 ice_sched_clear_port(hw->port_info);
471
472 ice_shutdown_all_ctrlq(hw);
473
474 set_bit(__ICE_PREPARED_FOR_RESET, pf->state);
475}
476
477
478
479
480
481
482
483static void ice_do_reset(struct ice_pf *pf, enum ice_reset_req reset_type)
484{
485 struct device *dev = ice_pf_to_dev(pf);
486 struct ice_hw *hw = &pf->hw;
487
488 dev_dbg(dev, "reset_type 0x%x requested\n", reset_type);
489
490 ice_prepare_for_reset(pf);
491
492
493 if (ice_reset(hw, reset_type)) {
494 dev_err(dev, "reset %d failed\n", reset_type);
495 set_bit(__ICE_RESET_FAILED, pf->state);
496 clear_bit(__ICE_RESET_OICR_RECV, pf->state);
497 clear_bit(__ICE_PREPARED_FOR_RESET, pf->state);
498 clear_bit(__ICE_PFR_REQ, pf->state);
499 clear_bit(__ICE_CORER_REQ, pf->state);
500 clear_bit(__ICE_GLOBR_REQ, pf->state);
501 return;
502 }
503
504
505
506
507
508 if (reset_type == ICE_RESET_PFR) {
509 pf->pfr_count++;
510 ice_rebuild(pf, reset_type);
511 clear_bit(__ICE_PREPARED_FOR_RESET, pf->state);
512 clear_bit(__ICE_PFR_REQ, pf->state);
513 ice_reset_all_vfs(pf, true);
514 }
515}
516
517
518
519
520
521static void ice_reset_subtask(struct ice_pf *pf)
522{
523 enum ice_reset_req reset_type = ICE_RESET_INVAL;
524
525
526
527
528
529
530
531
532
533
534
535 if (test_bit(__ICE_RESET_OICR_RECV, pf->state)) {
536
537 if (test_and_clear_bit(__ICE_CORER_RECV, pf->state))
538 reset_type = ICE_RESET_CORER;
539 if (test_and_clear_bit(__ICE_GLOBR_RECV, pf->state))
540 reset_type = ICE_RESET_GLOBR;
541 if (test_and_clear_bit(__ICE_EMPR_RECV, pf->state))
542 reset_type = ICE_RESET_EMPR;
543
544 if (reset_type == ICE_RESET_INVAL)
545 return;
546 ice_prepare_for_reset(pf);
547
548
549 if (ice_check_reset(&pf->hw)) {
550 set_bit(__ICE_RESET_FAILED, pf->state);
551 } else {
552
553 pf->hw.reset_ongoing = false;
554 ice_rebuild(pf, reset_type);
555
556
557
558 clear_bit(__ICE_RESET_OICR_RECV, pf->state);
559 clear_bit(__ICE_PREPARED_FOR_RESET, pf->state);
560 clear_bit(__ICE_PFR_REQ, pf->state);
561 clear_bit(__ICE_CORER_REQ, pf->state);
562 clear_bit(__ICE_GLOBR_REQ, pf->state);
563 ice_reset_all_vfs(pf, true);
564 }
565
566 return;
567 }
568
569
570 if (test_bit(__ICE_PFR_REQ, pf->state))
571 reset_type = ICE_RESET_PFR;
572 if (test_bit(__ICE_CORER_REQ, pf->state))
573 reset_type = ICE_RESET_CORER;
574 if (test_bit(__ICE_GLOBR_REQ, pf->state))
575 reset_type = ICE_RESET_GLOBR;
576
577 if (reset_type == ICE_RESET_INVAL)
578 return;
579
580
581 if (!test_bit(__ICE_DOWN, pf->state) &&
582 !test_bit(__ICE_CFG_BUSY, pf->state)) {
583 ice_do_reset(pf, reset_type);
584 }
585}
586
587
588
589
590
591static void ice_print_topo_conflict(struct ice_vsi *vsi)
592{
593 switch (vsi->port_info->phy.link_info.topo_media_conflict) {
594 case ICE_AQ_LINK_TOPO_CONFLICT:
595 case ICE_AQ_LINK_MEDIA_CONFLICT:
596 case ICE_AQ_LINK_TOPO_UNREACH_PRT:
597 case ICE_AQ_LINK_TOPO_UNDRUTIL_PRT:
598 case ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA:
599 netdev_info(vsi->netdev, "Possible mis-configuration of the Ethernet port detected, please use the Intel(R) Ethernet Port Configuration Tool application to address the issue.\n");
600 break;
601 case ICE_AQ_LINK_TOPO_UNSUPP_MEDIA:
602 netdev_info(vsi->netdev, "Rx/Tx is disabled on this device because an unsupported module type was detected. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
603 break;
604 default:
605 break;
606 }
607}
608
609
610
611
612
613
614void ice_print_link_msg(struct ice_vsi *vsi, bool isup)
615{
616 struct ice_aqc_get_phy_caps_data *caps;
617 const char *an_advertised;
618 enum ice_status status;
619 const char *fec_req;
620 const char *speed;
621 const char *fec;
622 const char *fc;
623 const char *an;
624
625 if (!vsi)
626 return;
627
628 if (vsi->current_isup == isup)
629 return;
630
631 vsi->current_isup = isup;
632
633 if (!isup) {
634 netdev_info(vsi->netdev, "NIC Link is Down\n");
635 return;
636 }
637
638 switch (vsi->port_info->phy.link_info.link_speed) {
639 case ICE_AQ_LINK_SPEED_100GB:
640 speed = "100 G";
641 break;
642 case ICE_AQ_LINK_SPEED_50GB:
643 speed = "50 G";
644 break;
645 case ICE_AQ_LINK_SPEED_40GB:
646 speed = "40 G";
647 break;
648 case ICE_AQ_LINK_SPEED_25GB:
649 speed = "25 G";
650 break;
651 case ICE_AQ_LINK_SPEED_20GB:
652 speed = "20 G";
653 break;
654 case ICE_AQ_LINK_SPEED_10GB:
655 speed = "10 G";
656 break;
657 case ICE_AQ_LINK_SPEED_5GB:
658 speed = "5 G";
659 break;
660 case ICE_AQ_LINK_SPEED_2500MB:
661 speed = "2.5 G";
662 break;
663 case ICE_AQ_LINK_SPEED_1000MB:
664 speed = "1 G";
665 break;
666 case ICE_AQ_LINK_SPEED_100MB:
667 speed = "100 M";
668 break;
669 default:
670 speed = "Unknown";
671 break;
672 }
673
674 switch (vsi->port_info->fc.current_mode) {
675 case ICE_FC_FULL:
676 fc = "Rx/Tx";
677 break;
678 case ICE_FC_TX_PAUSE:
679 fc = "Tx";
680 break;
681 case ICE_FC_RX_PAUSE:
682 fc = "Rx";
683 break;
684 case ICE_FC_NONE:
685 fc = "None";
686 break;
687 default:
688 fc = "Unknown";
689 break;
690 }
691
692
693 switch (vsi->port_info->phy.link_info.fec_info) {
694 case ICE_AQ_LINK_25G_RS_528_FEC_EN:
695 case ICE_AQ_LINK_25G_RS_544_FEC_EN:
696 fec = "RS-FEC";
697 break;
698 case ICE_AQ_LINK_25G_KR_FEC_EN:
699 fec = "FC-FEC/BASE-R";
700 break;
701 default:
702 fec = "NONE";
703 break;
704 }
705
706
707 if (vsi->port_info->phy.link_info.an_info & ICE_AQ_AN_COMPLETED)
708 an = "True";
709 else
710 an = "False";
711
712
713 caps = kzalloc(sizeof(*caps), GFP_KERNEL);
714 if (!caps) {
715 fec_req = "Unknown";
716 an_advertised = "Unknown";
717 goto done;
718 }
719
720 status = ice_aq_get_phy_caps(vsi->port_info, false,
721 ICE_AQC_REPORT_SW_CFG, caps, NULL);
722 if (status)
723 netdev_info(vsi->netdev, "Get phy capability failed.\n");
724
725 an_advertised = ice_is_phy_caps_an_enabled(caps) ? "On" : "Off";
726
727 if (caps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_528_REQ ||
728 caps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_544_REQ)
729 fec_req = "RS-FEC";
730 else if (caps->link_fec_options & ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ ||
731 caps->link_fec_options & ICE_AQC_PHY_FEC_25G_KR_REQ)
732 fec_req = "FC-FEC/BASE-R";
733 else
734 fec_req = "NONE";
735
736 kfree(caps);
737
738done:
739 netdev_info(vsi->netdev, "NIC Link is up %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg Advertised: %s, Autoneg Negotiated: %s, Flow Control: %s\n",
740 speed, fec_req, fec, an_advertised, an, fc);
741 ice_print_topo_conflict(vsi);
742}
743
744
745
746
747
748
749static void ice_vsi_link_event(struct ice_vsi *vsi, bool link_up)
750{
751 if (!vsi)
752 return;
753
754 if (test_bit(__ICE_DOWN, vsi->state) || !vsi->netdev)
755 return;
756
757 if (vsi->type == ICE_VSI_PF) {
758 if (link_up == netif_carrier_ok(vsi->netdev))
759 return;
760
761 if (link_up) {
762 netif_carrier_on(vsi->netdev);
763 netif_tx_wake_all_queues(vsi->netdev);
764 } else {
765 netif_carrier_off(vsi->netdev);
766 netif_tx_stop_all_queues(vsi->netdev);
767 }
768 }
769}
770
771
772
773
774
775
776
777
778
779
780
781
782static void ice_set_dflt_mib(struct ice_pf *pf)
783{
784 struct device *dev = ice_pf_to_dev(pf);
785 u8 mib_type, *buf, *lldpmib = NULL;
786 u16 len, typelen, offset = 0;
787 struct ice_lldp_org_tlv *tlv;
788 struct ice_hw *hw;
789 u32 ouisubtype;
790
791 if (!pf) {
792 dev_dbg(dev, "%s NULL pf pointer\n", __func__);
793 return;
794 }
795
796 hw = &pf->hw;
797 mib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;
798 lldpmib = kzalloc(ICE_LLDPDU_SIZE, GFP_KERNEL);
799 if (!lldpmib) {
800 dev_dbg(dev, "%s Failed to allocate MIB memory\n",
801 __func__);
802 return;
803 }
804
805
806 tlv = (struct ice_lldp_org_tlv *)lldpmib;
807 typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
808 ICE_IEEE_ETS_TLV_LEN);
809 tlv->typelen = htons(typelen);
810 ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
811 ICE_IEEE_SUBTYPE_ETS_CFG);
812 tlv->ouisubtype = htonl(ouisubtype);
813
814 buf = tlv->tlvinfo;
815 buf[0] = 0;
816
817
818
819
820
821 buf[5] = 0x64;
822 len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
823 offset += len + 2;
824 tlv = (struct ice_lldp_org_tlv *)
825 ((char *)tlv + sizeof(tlv->typelen) + len);
826
827
828 buf = tlv->tlvinfo;
829 tlv->typelen = htons(typelen);
830
831 ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
832 ICE_IEEE_SUBTYPE_ETS_REC);
833 tlv->ouisubtype = htonl(ouisubtype);
834
835
836
837
838
839
840 buf[5] = 0x64;
841 offset += len + 2;
842 tlv = (struct ice_lldp_org_tlv *)
843 ((char *)tlv + sizeof(tlv->typelen) + len);
844
845
846 typelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |
847 ICE_IEEE_PFC_TLV_LEN);
848 tlv->typelen = htons(typelen);
849
850 ouisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |
851 ICE_IEEE_SUBTYPE_PFC_CFG);
852 tlv->ouisubtype = htonl(ouisubtype);
853
854
855 buf[0] = 0x08;
856 len = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;
857 offset += len + 2;
858
859 if (ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, offset, NULL))
860 dev_dbg(dev, "%s Failed to set default LLDP MIB\n", __func__);
861
862 kfree(lldpmib);
863}
864
865
866
867
868
869
870
871
872
873
874static int
875ice_link_event(struct ice_pf *pf, struct ice_port_info *pi, bool link_up,
876 u16 link_speed)
877{
878 struct device *dev = ice_pf_to_dev(pf);
879 struct ice_phy_info *phy_info;
880 struct ice_vsi *vsi;
881 u16 old_link_speed;
882 bool old_link;
883 int result;
884
885 phy_info = &pi->phy;
886 phy_info->link_info_old = phy_info->link_info;
887
888 old_link = !!(phy_info->link_info_old.link_info & ICE_AQ_LINK_UP);
889 old_link_speed = phy_info->link_info_old.link_speed;
890
891
892
893
894 result = ice_update_link_info(pi);
895 if (result)
896 dev_dbg(dev, "Failed to update link status and re-enable link events for port %d\n",
897 pi->lport);
898
899
900
901
902 if (phy_info->link_info.link_info & ICE_AQ_LINK_UP)
903 link_up = true;
904
905 vsi = ice_get_main_vsi(pf);
906 if (!vsi || !vsi->port_info)
907 return -EINVAL;
908
909
910 if (!test_bit(ICE_FLAG_NO_MEDIA, pf->flags) &&
911 !(pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE)) {
912 set_bit(ICE_FLAG_NO_MEDIA, pf->flags);
913
914 result = ice_aq_set_link_restart_an(pi, false, NULL);
915 if (result) {
916 dev_dbg(dev, "Failed to set link down, VSI %d error %d\n",
917 vsi->vsi_num, result);
918 return result;
919 }
920 }
921
922
923 if (link_up == old_link && link_speed == old_link_speed)
924 return result;
925
926 if (ice_is_dcb_active(pf)) {
927 if (test_bit(ICE_FLAG_DCB_ENA, pf->flags))
928 ice_dcb_rebuild(pf);
929 } else {
930 if (link_up)
931 ice_set_dflt_mib(pf);
932 }
933 ice_vsi_link_event(vsi, link_up);
934 ice_print_link_msg(vsi, link_up);
935
936 ice_vc_notify_link_state(pf);
937
938 return result;
939}
940
941
942
943
944
945static void ice_watchdog_subtask(struct ice_pf *pf)
946{
947 int i;
948
949
950 if (test_bit(__ICE_DOWN, pf->state) ||
951 test_bit(__ICE_CFG_BUSY, pf->state))
952 return;
953
954
955 if (time_before(jiffies,
956 pf->serv_tmr_prev + pf->serv_tmr_period))
957 return;
958
959 pf->serv_tmr_prev = jiffies;
960
961
962
963
964 ice_update_pf_stats(pf);
965 ice_for_each_vsi(pf, i)
966 if (pf->vsi[i] && pf->vsi[i]->netdev)
967 ice_update_vsi_stats(pf->vsi[i]);
968}
969
970
971
972
973
974
975
976static int ice_init_link_events(struct ice_port_info *pi)
977{
978 u16 mask;
979
980 mask = ~((u16)(ICE_AQ_LINK_EVENT_UPDOWN | ICE_AQ_LINK_EVENT_MEDIA_NA |
981 ICE_AQ_LINK_EVENT_MODULE_QUAL_FAIL));
982
983 if (ice_aq_set_event_mask(pi->hw, pi->lport, mask, NULL)) {
984 dev_dbg(ice_hw_to_dev(pi->hw), "Failed to set link event mask for port %d\n",
985 pi->lport);
986 return -EIO;
987 }
988
989 if (ice_aq_get_link_info(pi, true, NULL, NULL)) {
990 dev_dbg(ice_hw_to_dev(pi->hw), "Failed to enable link events for port %d\n",
991 pi->lport);
992 return -EIO;
993 }
994
995 return 0;
996}
997
998
999
1000
1001
1002
1003static int
1004ice_handle_link_event(struct ice_pf *pf, struct ice_rq_event_info *event)
1005{
1006 struct ice_aqc_get_link_status_data *link_data;
1007 struct ice_port_info *port_info;
1008 int status;
1009
1010 link_data = (struct ice_aqc_get_link_status_data *)event->msg_buf;
1011 port_info = pf->hw.port_info;
1012 if (!port_info)
1013 return -EINVAL;
1014
1015 status = ice_link_event(pf, port_info,
1016 !!(link_data->link_info & ICE_AQ_LINK_UP),
1017 le16_to_cpu(link_data->link_speed));
1018 if (status)
1019 dev_dbg(ice_pf_to_dev(pf), "Could not process link event, error %d\n",
1020 status);
1021
1022 return status;
1023}
1024
1025enum ice_aq_task_state {
1026 ICE_AQ_TASK_WAITING = 0,
1027 ICE_AQ_TASK_COMPLETE,
1028 ICE_AQ_TASK_CANCELED,
1029};
1030
1031struct ice_aq_task {
1032 struct hlist_node entry;
1033
1034 u16 opcode;
1035 struct ice_rq_event_info *event;
1036 enum ice_aq_task_state state;
1037};
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
1057 struct ice_rq_event_info *event)
1058{
1059 struct device *dev = ice_pf_to_dev(pf);
1060 struct ice_aq_task *task;
1061 unsigned long start;
1062 long ret;
1063 int err;
1064
1065 task = kzalloc(sizeof(*task), GFP_KERNEL);
1066 if (!task)
1067 return -ENOMEM;
1068
1069 INIT_HLIST_NODE(&task->entry);
1070 task->opcode = opcode;
1071 task->event = event;
1072 task->state = ICE_AQ_TASK_WAITING;
1073
1074 spin_lock_bh(&pf->aq_wait_lock);
1075 hlist_add_head(&task->entry, &pf->aq_wait_list);
1076 spin_unlock_bh(&pf->aq_wait_lock);
1077
1078 start = jiffies;
1079
1080 ret = wait_event_interruptible_timeout(pf->aq_wait_queue, task->state,
1081 timeout);
1082 switch (task->state) {
1083 case ICE_AQ_TASK_WAITING:
1084 err = ret < 0 ? ret : -ETIMEDOUT;
1085 break;
1086 case ICE_AQ_TASK_CANCELED:
1087 err = ret < 0 ? ret : -ECANCELED;
1088 break;
1089 case ICE_AQ_TASK_COMPLETE:
1090 err = ret < 0 ? ret : 0;
1091 break;
1092 default:
1093 WARN(1, "Unexpected AdminQ wait task state %u", task->state);
1094 err = -EINVAL;
1095 break;
1096 }
1097
1098 dev_dbg(dev, "Waited %u msecs (max %u msecs) for firmware response to op 0x%04x\n",
1099 jiffies_to_msecs(jiffies - start),
1100 jiffies_to_msecs(timeout),
1101 opcode);
1102
1103 spin_lock_bh(&pf->aq_wait_lock);
1104 hlist_del(&task->entry);
1105 spin_unlock_bh(&pf->aq_wait_lock);
1106 kfree(task);
1107
1108 return err;
1109}
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129static void ice_aq_check_events(struct ice_pf *pf, u16 opcode,
1130 struct ice_rq_event_info *event)
1131{
1132 struct ice_aq_task *task;
1133 bool found = false;
1134
1135 spin_lock_bh(&pf->aq_wait_lock);
1136 hlist_for_each_entry(task, &pf->aq_wait_list, entry) {
1137 if (task->state || task->opcode != opcode)
1138 continue;
1139
1140 memcpy(&task->event->desc, &event->desc, sizeof(event->desc));
1141 task->event->msg_len = event->msg_len;
1142
1143
1144 if (task->event->msg_buf &&
1145 task->event->buf_len > event->buf_len) {
1146 memcpy(task->event->msg_buf, event->msg_buf,
1147 event->buf_len);
1148 task->event->buf_len = event->buf_len;
1149 }
1150
1151 task->state = ICE_AQ_TASK_COMPLETE;
1152 found = true;
1153 }
1154 spin_unlock_bh(&pf->aq_wait_lock);
1155
1156 if (found)
1157 wake_up(&pf->aq_wait_queue);
1158}
1159
1160
1161
1162
1163
1164
1165
1166
1167static void ice_aq_cancel_waiting_tasks(struct ice_pf *pf)
1168{
1169 struct ice_aq_task *task;
1170
1171 spin_lock_bh(&pf->aq_wait_lock);
1172 hlist_for_each_entry(task, &pf->aq_wait_list, entry)
1173 task->state = ICE_AQ_TASK_CANCELED;
1174 spin_unlock_bh(&pf->aq_wait_lock);
1175
1176 wake_up(&pf->aq_wait_queue);
1177}
1178
1179
1180
1181
1182
1183
1184static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type)
1185{
1186 struct device *dev = ice_pf_to_dev(pf);
1187 struct ice_rq_event_info event;
1188 struct ice_hw *hw = &pf->hw;
1189 struct ice_ctl_q_info *cq;
1190 u16 pending, i = 0;
1191 const char *qtype;
1192 u32 oldval, val;
1193
1194
1195 if (test_bit(__ICE_RESET_FAILED, pf->state))
1196 return 0;
1197
1198 switch (q_type) {
1199 case ICE_CTL_Q_ADMIN:
1200 cq = &hw->adminq;
1201 qtype = "Admin";
1202 break;
1203 case ICE_CTL_Q_MAILBOX:
1204 cq = &hw->mailboxq;
1205 qtype = "Mailbox";
1206 break;
1207 default:
1208 dev_warn(dev, "Unknown control queue type 0x%x\n", q_type);
1209 return 0;
1210 }
1211
1212
1213
1214
1215 val = rd32(hw, cq->rq.len);
1216 if (val & (PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
1217 PF_FW_ARQLEN_ARQCRIT_M)) {
1218 oldval = val;
1219 if (val & PF_FW_ARQLEN_ARQVFE_M)
1220 dev_dbg(dev, "%s Receive Queue VF Error detected\n",
1221 qtype);
1222 if (val & PF_FW_ARQLEN_ARQOVFL_M) {
1223 dev_dbg(dev, "%s Receive Queue Overflow Error detected\n",
1224 qtype);
1225 }
1226 if (val & PF_FW_ARQLEN_ARQCRIT_M)
1227 dev_dbg(dev, "%s Receive Queue Critical Error detected\n",
1228 qtype);
1229 val &= ~(PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
1230 PF_FW_ARQLEN_ARQCRIT_M);
1231 if (oldval != val)
1232 wr32(hw, cq->rq.len, val);
1233 }
1234
1235 val = rd32(hw, cq->sq.len);
1236 if (val & (PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
1237 PF_FW_ATQLEN_ATQCRIT_M)) {
1238 oldval = val;
1239 if (val & PF_FW_ATQLEN_ATQVFE_M)
1240 dev_dbg(dev, "%s Send Queue VF Error detected\n",
1241 qtype);
1242 if (val & PF_FW_ATQLEN_ATQOVFL_M) {
1243 dev_dbg(dev, "%s Send Queue Overflow Error detected\n",
1244 qtype);
1245 }
1246 if (val & PF_FW_ATQLEN_ATQCRIT_M)
1247 dev_dbg(dev, "%s Send Queue Critical Error detected\n",
1248 qtype);
1249 val &= ~(PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
1250 PF_FW_ATQLEN_ATQCRIT_M);
1251 if (oldval != val)
1252 wr32(hw, cq->sq.len, val);
1253 }
1254
1255 event.buf_len = cq->rq_buf_size;
1256 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
1257 if (!event.msg_buf)
1258 return 0;
1259
1260 do {
1261 enum ice_status ret;
1262 u16 opcode;
1263
1264 ret = ice_clean_rq_elem(hw, cq, &event, &pending);
1265 if (ret == ICE_ERR_AQ_NO_WORK)
1266 break;
1267 if (ret) {
1268 dev_err(dev, "%s Receive Queue event error %s\n", qtype,
1269 ice_stat_str(ret));
1270 break;
1271 }
1272
1273 opcode = le16_to_cpu(event.desc.opcode);
1274
1275
1276 ice_aq_check_events(pf, opcode, &event);
1277
1278 switch (opcode) {
1279 case ice_aqc_opc_get_link_status:
1280 if (ice_handle_link_event(pf, &event))
1281 dev_err(dev, "Could not handle link event\n");
1282 break;
1283 case ice_aqc_opc_event_lan_overflow:
1284 ice_vf_lan_overflow_event(pf, &event);
1285 break;
1286 case ice_mbx_opc_send_msg_to_pf:
1287 ice_vc_process_vf_msg(pf, &event);
1288 break;
1289 case ice_aqc_opc_fw_logging:
1290 ice_output_fw_log(hw, &event.desc, event.msg_buf);
1291 break;
1292 case ice_aqc_opc_lldp_set_mib_change:
1293 ice_dcb_process_lldp_set_mib_change(pf, &event);
1294 break;
1295 default:
1296 dev_dbg(dev, "%s Receive Queue unknown event 0x%04x ignored\n",
1297 qtype, opcode);
1298 break;
1299 }
1300 } while (pending && (i++ < ICE_DFLT_IRQ_WORK));
1301
1302 kfree(event.msg_buf);
1303
1304 return pending && (i == ICE_DFLT_IRQ_WORK);
1305}
1306
1307
1308
1309
1310
1311
1312
1313
1314static bool ice_ctrlq_pending(struct ice_hw *hw, struct ice_ctl_q_info *cq)
1315{
1316 u16 ntu;
1317
1318 ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);
1319 return cq->rq.next_to_clean != ntu;
1320}
1321
1322
1323
1324
1325
1326static void ice_clean_adminq_subtask(struct ice_pf *pf)
1327{
1328 struct ice_hw *hw = &pf->hw;
1329
1330 if (!test_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state))
1331 return;
1332
1333 if (__ice_clean_ctrlq(pf, ICE_CTL_Q_ADMIN))
1334 return;
1335
1336 clear_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state);
1337
1338
1339
1340
1341
1342
1343 if (ice_ctrlq_pending(hw, &hw->adminq))
1344 __ice_clean_ctrlq(pf, ICE_CTL_Q_ADMIN);
1345
1346 ice_flush(hw);
1347}
1348
1349
1350
1351
1352
1353static void ice_clean_mailboxq_subtask(struct ice_pf *pf)
1354{
1355 struct ice_hw *hw = &pf->hw;
1356
1357 if (!test_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state))
1358 return;
1359
1360 if (__ice_clean_ctrlq(pf, ICE_CTL_Q_MAILBOX))
1361 return;
1362
1363 clear_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state);
1364
1365 if (ice_ctrlq_pending(hw, &hw->mailboxq))
1366 __ice_clean_ctrlq(pf, ICE_CTL_Q_MAILBOX);
1367
1368 ice_flush(hw);
1369}
1370
1371
1372
1373
1374
1375
1376
1377void ice_service_task_schedule(struct ice_pf *pf)
1378{
1379 if (!test_bit(__ICE_SERVICE_DIS, pf->state) &&
1380 !test_and_set_bit(__ICE_SERVICE_SCHED, pf->state) &&
1381 !test_bit(__ICE_NEEDS_RESTART, pf->state))
1382 queue_work(ice_wq, &pf->serv_task);
1383}
1384
1385
1386
1387
1388
1389static void ice_service_task_complete(struct ice_pf *pf)
1390{
1391 WARN_ON(!test_bit(__ICE_SERVICE_SCHED, pf->state));
1392
1393
1394 smp_mb__before_atomic();
1395 clear_bit(__ICE_SERVICE_SCHED, pf->state);
1396}
1397
1398
1399
1400
1401
1402
1403
1404
1405static int ice_service_task_stop(struct ice_pf *pf)
1406{
1407 int ret;
1408
1409 ret = test_and_set_bit(__ICE_SERVICE_DIS, pf->state);
1410
1411 if (pf->serv_tmr.function)
1412 del_timer_sync(&pf->serv_tmr);
1413 if (pf->serv_task.func)
1414 cancel_work_sync(&pf->serv_task);
1415
1416 clear_bit(__ICE_SERVICE_SCHED, pf->state);
1417 return ret;
1418}
1419
1420
1421
1422
1423
1424
1425
1426static void ice_service_task_restart(struct ice_pf *pf)
1427{
1428 clear_bit(__ICE_SERVICE_DIS, pf->state);
1429 ice_service_task_schedule(pf);
1430}
1431
1432
1433
1434
1435
1436static void ice_service_timer(struct timer_list *t)
1437{
1438 struct ice_pf *pf = from_timer(pf, t, serv_tmr);
1439
1440 mod_timer(&pf->serv_tmr, round_jiffies(pf->serv_tmr_period + jiffies));
1441 ice_service_task_schedule(pf);
1442}
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454static void ice_handle_mdd_event(struct ice_pf *pf)
1455{
1456 struct device *dev = ice_pf_to_dev(pf);
1457 struct ice_hw *hw = &pf->hw;
1458 unsigned int i;
1459 u32 reg;
1460
1461 if (!test_and_clear_bit(__ICE_MDD_EVENT_PENDING, pf->state)) {
1462
1463
1464
1465 ice_print_vfs_mdd_events(pf);
1466 return;
1467 }
1468
1469
1470 reg = rd32(hw, GL_MDET_TX_PQM);
1471 if (reg & GL_MDET_TX_PQM_VALID_M) {
1472 u8 pf_num = (reg & GL_MDET_TX_PQM_PF_NUM_M) >>
1473 GL_MDET_TX_PQM_PF_NUM_S;
1474 u16 vf_num = (reg & GL_MDET_TX_PQM_VF_NUM_M) >>
1475 GL_MDET_TX_PQM_VF_NUM_S;
1476 u8 event = (reg & GL_MDET_TX_PQM_MAL_TYPE_M) >>
1477 GL_MDET_TX_PQM_MAL_TYPE_S;
1478 u16 queue = ((reg & GL_MDET_TX_PQM_QNUM_M) >>
1479 GL_MDET_TX_PQM_QNUM_S);
1480
1481 if (netif_msg_tx_err(pf))
1482 dev_info(dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",
1483 event, queue, pf_num, vf_num);
1484 wr32(hw, GL_MDET_TX_PQM, 0xffffffff);
1485 }
1486
1487 reg = rd32(hw, GL_MDET_TX_TCLAN);
1488 if (reg & GL_MDET_TX_TCLAN_VALID_M) {
1489 u8 pf_num = (reg & GL_MDET_TX_TCLAN_PF_NUM_M) >>
1490 GL_MDET_TX_TCLAN_PF_NUM_S;
1491 u16 vf_num = (reg & GL_MDET_TX_TCLAN_VF_NUM_M) >>
1492 GL_MDET_TX_TCLAN_VF_NUM_S;
1493 u8 event = (reg & GL_MDET_TX_TCLAN_MAL_TYPE_M) >>
1494 GL_MDET_TX_TCLAN_MAL_TYPE_S;
1495 u16 queue = ((reg & GL_MDET_TX_TCLAN_QNUM_M) >>
1496 GL_MDET_TX_TCLAN_QNUM_S);
1497
1498 if (netif_msg_tx_err(pf))
1499 dev_info(dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",
1500 event, queue, pf_num, vf_num);
1501 wr32(hw, GL_MDET_TX_TCLAN, 0xffffffff);
1502 }
1503
1504 reg = rd32(hw, GL_MDET_RX);
1505 if (reg & GL_MDET_RX_VALID_M) {
1506 u8 pf_num = (reg & GL_MDET_RX_PF_NUM_M) >>
1507 GL_MDET_RX_PF_NUM_S;
1508 u16 vf_num = (reg & GL_MDET_RX_VF_NUM_M) >>
1509 GL_MDET_RX_VF_NUM_S;
1510 u8 event = (reg & GL_MDET_RX_MAL_TYPE_M) >>
1511 GL_MDET_RX_MAL_TYPE_S;
1512 u16 queue = ((reg & GL_MDET_RX_QNUM_M) >>
1513 GL_MDET_RX_QNUM_S);
1514
1515 if (netif_msg_rx_err(pf))
1516 dev_info(dev, "Malicious Driver Detection event %d on RX queue %d PF# %d VF# %d\n",
1517 event, queue, pf_num, vf_num);
1518 wr32(hw, GL_MDET_RX, 0xffffffff);
1519 }
1520
1521
1522 reg = rd32(hw, PF_MDET_TX_PQM);
1523 if (reg & PF_MDET_TX_PQM_VALID_M) {
1524 wr32(hw, PF_MDET_TX_PQM, 0xFFFF);
1525 if (netif_msg_tx_err(pf))
1526 dev_info(dev, "Malicious Driver Detection event TX_PQM detected on PF\n");
1527 }
1528
1529 reg = rd32(hw, PF_MDET_TX_TCLAN);
1530 if (reg & PF_MDET_TX_TCLAN_VALID_M) {
1531 wr32(hw, PF_MDET_TX_TCLAN, 0xFFFF);
1532 if (netif_msg_tx_err(pf))
1533 dev_info(dev, "Malicious Driver Detection event TX_TCLAN detected on PF\n");
1534 }
1535
1536 reg = rd32(hw, PF_MDET_RX);
1537 if (reg & PF_MDET_RX_VALID_M) {
1538 wr32(hw, PF_MDET_RX, 0xFFFF);
1539 if (netif_msg_rx_err(pf))
1540 dev_info(dev, "Malicious Driver Detection event RX detected on PF\n");
1541 }
1542
1543
1544
1545
1546 ice_for_each_vf(pf, i) {
1547 struct ice_vf *vf = &pf->vf[i];
1548
1549 reg = rd32(hw, VP_MDET_TX_PQM(i));
1550 if (reg & VP_MDET_TX_PQM_VALID_M) {
1551 wr32(hw, VP_MDET_TX_PQM(i), 0xFFFF);
1552 vf->mdd_tx_events.count++;
1553 set_bit(__ICE_MDD_VF_PRINT_PENDING, pf->state);
1554 if (netif_msg_tx_err(pf))
1555 dev_info(dev, "Malicious Driver Detection event TX_PQM detected on VF %d\n",
1556 i);
1557 }
1558
1559 reg = rd32(hw, VP_MDET_TX_TCLAN(i));
1560 if (reg & VP_MDET_TX_TCLAN_VALID_M) {
1561 wr32(hw, VP_MDET_TX_TCLAN(i), 0xFFFF);
1562 vf->mdd_tx_events.count++;
1563 set_bit(__ICE_MDD_VF_PRINT_PENDING, pf->state);
1564 if (netif_msg_tx_err(pf))
1565 dev_info(dev, "Malicious Driver Detection event TX_TCLAN detected on VF %d\n",
1566 i);
1567 }
1568
1569 reg = rd32(hw, VP_MDET_TX_TDPU(i));
1570 if (reg & VP_MDET_TX_TDPU_VALID_M) {
1571 wr32(hw, VP_MDET_TX_TDPU(i), 0xFFFF);
1572 vf->mdd_tx_events.count++;
1573 set_bit(__ICE_MDD_VF_PRINT_PENDING, pf->state);
1574 if (netif_msg_tx_err(pf))
1575 dev_info(dev, "Malicious Driver Detection event TX_TDPU detected on VF %d\n",
1576 i);
1577 }
1578
1579 reg = rd32(hw, VP_MDET_RX(i));
1580 if (reg & VP_MDET_RX_VALID_M) {
1581 wr32(hw, VP_MDET_RX(i), 0xFFFF);
1582 vf->mdd_rx_events.count++;
1583 set_bit(__ICE_MDD_VF_PRINT_PENDING, pf->state);
1584 if (netif_msg_rx_err(pf))
1585 dev_info(dev, "Malicious Driver Detection event RX detected on VF %d\n",
1586 i);
1587
1588
1589
1590
1591
1592 if (test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags)) {
1593
1594
1595
1596 ice_print_vf_rx_mdd_event(vf);
1597 ice_reset_vf(&pf->vf[i], false);
1598 }
1599 }
1600 }
1601
1602 ice_print_vfs_mdd_events(pf);
1603}
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617static int ice_force_phys_link_state(struct ice_vsi *vsi, bool link_up)
1618{
1619 struct ice_aqc_get_phy_caps_data *pcaps;
1620 struct ice_aqc_set_phy_cfg_data *cfg;
1621 struct ice_port_info *pi;
1622 struct device *dev;
1623 int retcode;
1624
1625 if (!vsi || !vsi->port_info || !vsi->back)
1626 return -EINVAL;
1627 if (vsi->type != ICE_VSI_PF)
1628 return 0;
1629
1630 dev = ice_pf_to_dev(vsi->back);
1631
1632 pi = vsi->port_info;
1633
1634 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1635 if (!pcaps)
1636 return -ENOMEM;
1637
1638 retcode = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
1639 NULL);
1640 if (retcode) {
1641 dev_err(dev, "Failed to get phy capabilities, VSI %d error %d\n",
1642 vsi->vsi_num, retcode);
1643 retcode = -EIO;
1644 goto out;
1645 }
1646
1647
1648 if (link_up == !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) &&
1649 link_up == !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP))
1650 goto out;
1651
1652
1653
1654
1655
1656 cfg = kmemdup(&pi->phy.curr_user_phy_cfg, sizeof(*cfg), GFP_KERNEL);
1657 if (!cfg) {
1658 retcode = -ENOMEM;
1659 goto out;
1660 }
1661
1662 cfg->caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;
1663 if (link_up)
1664 cfg->caps |= ICE_AQ_PHY_ENA_LINK;
1665 else
1666 cfg->caps &= ~ICE_AQ_PHY_ENA_LINK;
1667
1668 retcode = ice_aq_set_phy_cfg(&vsi->back->hw, pi, cfg, NULL);
1669 if (retcode) {
1670 dev_err(dev, "Failed to set phy config, VSI %d error %d\n",
1671 vsi->vsi_num, retcode);
1672 retcode = -EIO;
1673 }
1674
1675 kfree(cfg);
1676out:
1677 kfree(pcaps);
1678 return retcode;
1679}
1680
1681
1682
1683
1684
1685
1686
1687static int ice_init_nvm_phy_type(struct ice_port_info *pi)
1688{
1689 struct ice_aqc_get_phy_caps_data *pcaps;
1690 struct ice_pf *pf = pi->hw->back;
1691 enum ice_status status;
1692 int err = 0;
1693
1694 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1695 if (!pcaps)
1696 return -ENOMEM;
1697
1698 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_NVM_CAP, pcaps,
1699 NULL);
1700
1701 if (status) {
1702 dev_err(ice_pf_to_dev(pf), "Get PHY capability failed.\n");
1703 err = -EIO;
1704 goto out;
1705 }
1706
1707 pf->nvm_phy_type_hi = pcaps->phy_type_high;
1708 pf->nvm_phy_type_lo = pcaps->phy_type_low;
1709
1710out:
1711 kfree(pcaps);
1712 return err;
1713}
1714
1715
1716
1717
1718
1719
1720
1721static void ice_init_link_dflt_override(struct ice_port_info *pi)
1722{
1723 struct ice_link_default_override_tlv *ldo;
1724 struct ice_pf *pf = pi->hw->back;
1725
1726 ldo = &pf->link_dflt_override;
1727 if (ice_get_link_default_override(ldo, pi))
1728 return;
1729
1730 if (!(ldo->options & ICE_LINK_OVERRIDE_PORT_DIS))
1731 return;
1732
1733
1734
1735
1736 set_bit(ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags);
1737 set_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags);
1738}
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754static void ice_init_phy_cfg_dflt_override(struct ice_port_info *pi)
1755{
1756 struct ice_link_default_override_tlv *ldo;
1757 struct ice_aqc_set_phy_cfg_data *cfg;
1758 struct ice_phy_info *phy = &pi->phy;
1759 struct ice_pf *pf = pi->hw->back;
1760
1761 ldo = &pf->link_dflt_override;
1762
1763
1764
1765
1766 cfg = &phy->curr_user_phy_cfg;
1767
1768 if (ldo->phy_type_low || ldo->phy_type_high) {
1769 cfg->phy_type_low = pf->nvm_phy_type_lo &
1770 cpu_to_le64(ldo->phy_type_low);
1771 cfg->phy_type_high = pf->nvm_phy_type_hi &
1772 cpu_to_le64(ldo->phy_type_high);
1773 }
1774 cfg->link_fec_opt = ldo->fec_options;
1775 phy->curr_user_fec_req = ICE_FEC_AUTO;
1776
1777 set_bit(__ICE_LINK_DEFAULT_OVERRIDE_PENDING, pf->state);
1778}
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794static int ice_init_phy_user_cfg(struct ice_port_info *pi)
1795{
1796 struct ice_aqc_get_phy_caps_data *pcaps;
1797 struct ice_phy_info *phy = &pi->phy;
1798 struct ice_pf *pf = pi->hw->back;
1799 enum ice_status status;
1800 struct ice_vsi *vsi;
1801 int err = 0;
1802
1803 if (!(phy->link_info.link_info & ICE_AQ_MEDIA_AVAILABLE))
1804 return -EIO;
1805
1806 vsi = ice_get_main_vsi(pf);
1807 if (!vsi)
1808 return -EINVAL;
1809
1810 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1811 if (!pcaps)
1812 return -ENOMEM;
1813
1814 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP, pcaps,
1815 NULL);
1816 if (status) {
1817 dev_err(ice_pf_to_dev(pf), "Get PHY capability failed.\n");
1818 err = -EIO;
1819 goto err_out;
1820 }
1821
1822 ice_copy_phy_caps_to_cfg(pi, pcaps, &pi->phy.curr_user_phy_cfg);
1823
1824
1825 if (ice_fw_supports_link_override(&vsi->back->hw) &&
1826 !(pcaps->module_compliance_enforcement &
1827 ICE_AQC_MOD_ENFORCE_STRICT_MODE)) {
1828 set_bit(ICE_FLAG_LINK_LENIENT_MODE_ENA, pf->flags);
1829
1830
1831
1832
1833 if (pf->link_dflt_override.options & ICE_LINK_OVERRIDE_EN) {
1834 ice_init_phy_cfg_dflt_override(pi);
1835 goto out;
1836 }
1837 }
1838
1839
1840
1841
1842 phy->curr_user_fec_req = ice_caps_to_fec_mode(pcaps->caps,
1843 pcaps->link_fec_options);
1844 phy->curr_user_fc_req = ice_caps_to_fc_mode(pcaps->caps);
1845
1846out:
1847 phy->curr_user_speed_req = ICE_AQ_LINK_SPEED_M;
1848 set_bit(__ICE_PHY_INIT_COMPLETE, pf->state);
1849err_out:
1850 kfree(pcaps);
1851 return err;
1852}
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862static int ice_configure_phy(struct ice_vsi *vsi)
1863{
1864 struct device *dev = ice_pf_to_dev(vsi->back);
1865 struct ice_aqc_get_phy_caps_data *pcaps;
1866 struct ice_aqc_set_phy_cfg_data *cfg;
1867 struct ice_port_info *pi;
1868 enum ice_status status;
1869 int err = 0;
1870
1871 pi = vsi->port_info;
1872 if (!pi)
1873 return -EINVAL;
1874
1875
1876 if (!(pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE))
1877 return -EPERM;
1878
1879 ice_print_topo_conflict(vsi);
1880
1881 if (vsi->port_info->phy.link_info.topo_media_conflict ==
1882 ICE_AQ_LINK_TOPO_UNSUPP_MEDIA)
1883 return -EPERM;
1884
1885 if (test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags))
1886 return ice_force_phys_link_state(vsi, true);
1887
1888 pcaps = kzalloc(sizeof(*pcaps), GFP_KERNEL);
1889 if (!pcaps)
1890 return -ENOMEM;
1891
1892
1893 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
1894 NULL);
1895 if (status) {
1896 dev_err(dev, "Failed to get PHY configuration, VSI %d error %s\n",
1897 vsi->vsi_num, ice_stat_str(status));
1898 err = -EIO;
1899 goto done;
1900 }
1901
1902
1903
1904
1905 if (pcaps->caps & ICE_AQC_PHY_EN_LINK &&
1906 ice_phy_caps_equals_cfg(pcaps, &pi->phy.curr_user_phy_cfg))
1907 goto done;
1908
1909
1910 memset(pcaps, 0, sizeof(*pcaps));
1911 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP, pcaps,
1912 NULL);
1913 if (status) {
1914 dev_err(dev, "Failed to get PHY topology, VSI %d error %s\n",
1915 vsi->vsi_num, ice_stat_str(status));
1916 err = -EIO;
1917 goto done;
1918 }
1919
1920 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
1921 if (!cfg) {
1922 err = -ENOMEM;
1923 goto done;
1924 }
1925
1926 ice_copy_phy_caps_to_cfg(pi, pcaps, cfg);
1927
1928
1929
1930
1931 if (test_and_clear_bit(__ICE_LINK_DEFAULT_OVERRIDE_PENDING,
1932 vsi->back->state)) {
1933 cfg->phy_type_low = pi->phy.curr_user_phy_cfg.phy_type_low;
1934 cfg->phy_type_high = pi->phy.curr_user_phy_cfg.phy_type_high;
1935 } else {
1936 u64 phy_low = 0, phy_high = 0;
1937
1938 ice_update_phy_type(&phy_low, &phy_high,
1939 pi->phy.curr_user_speed_req);
1940 cfg->phy_type_low = pcaps->phy_type_low & cpu_to_le64(phy_low);
1941 cfg->phy_type_high = pcaps->phy_type_high &
1942 cpu_to_le64(phy_high);
1943 }
1944
1945
1946 if (!cfg->phy_type_low && !cfg->phy_type_high) {
1947 cfg->phy_type_low = pcaps->phy_type_low;
1948 cfg->phy_type_high = pcaps->phy_type_high;
1949 }
1950
1951
1952 ice_cfg_phy_fec(pi, cfg, pi->phy.curr_user_fec_req);
1953
1954
1955 if (cfg->link_fec_opt !=
1956 (cfg->link_fec_opt & pcaps->link_fec_options)) {
1957 cfg->caps |= pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC;
1958 cfg->link_fec_opt = pcaps->link_fec_options;
1959 }
1960
1961
1962
1963
1964 ice_cfg_phy_fc(pi, cfg, pi->phy.curr_user_fc_req);
1965
1966
1967 cfg->caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT | ICE_AQ_PHY_ENA_LINK;
1968
1969 status = ice_aq_set_phy_cfg(&vsi->back->hw, pi, cfg, NULL);
1970 if (status) {
1971 dev_err(dev, "Failed to set phy config, VSI %d error %s\n",
1972 vsi->vsi_num, ice_stat_str(status));
1973 err = -EIO;
1974 }
1975
1976 kfree(cfg);
1977done:
1978 kfree(pcaps);
1979 return err;
1980}
1981
1982
1983
1984
1985
1986
1987
1988
1989static void ice_check_media_subtask(struct ice_pf *pf)
1990{
1991 struct ice_port_info *pi;
1992 struct ice_vsi *vsi;
1993 int err;
1994
1995
1996 if (!test_bit(ICE_FLAG_NO_MEDIA, pf->flags))
1997 return;
1998
1999 vsi = ice_get_main_vsi(pf);
2000 if (!vsi)
2001 return;
2002
2003
2004 pi = vsi->port_info;
2005 err = ice_update_link_info(pi);
2006 if (err)
2007 return;
2008
2009 if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {
2010 if (!test_bit(__ICE_PHY_INIT_COMPLETE, pf->state))
2011 ice_init_phy_user_cfg(pi);
2012
2013
2014
2015
2016 if (test_bit(__ICE_DOWN, vsi->state) &&
2017 test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags))
2018 return;
2019
2020 err = ice_configure_phy(vsi);
2021 if (!err)
2022 clear_bit(ICE_FLAG_NO_MEDIA, pf->flags);
2023
2024
2025
2026
2027 }
2028}
2029
2030
2031
2032
2033
2034static void ice_service_task(struct work_struct *work)
2035{
2036 struct ice_pf *pf = container_of(work, struct ice_pf, serv_task);
2037 unsigned long start_time = jiffies;
2038
2039
2040
2041
2042 ice_reset_subtask(pf);
2043
2044
2045 if (ice_is_reset_in_progress(pf->state) ||
2046 test_bit(__ICE_SUSPENDED, pf->state) ||
2047 test_bit(__ICE_NEEDS_RESTART, pf->state)) {
2048 ice_service_task_complete(pf);
2049 return;
2050 }
2051
2052 ice_clean_adminq_subtask(pf);
2053 ice_check_media_subtask(pf);
2054 ice_check_for_hang_subtask(pf);
2055 ice_sync_fltr_subtask(pf);
2056 ice_handle_mdd_event(pf);
2057 ice_watchdog_subtask(pf);
2058
2059 if (ice_is_safe_mode(pf)) {
2060 ice_service_task_complete(pf);
2061 return;
2062 }
2063
2064 ice_process_vflr_event(pf);
2065 ice_clean_mailboxq_subtask(pf);
2066 ice_sync_arfs_fltrs(pf);
2067
2068 ice_service_task_complete(pf);
2069
2070
2071
2072
2073
2074 if (time_after(jiffies, (start_time + pf->serv_tmr_period)) ||
2075 test_bit(__ICE_MDD_EVENT_PENDING, pf->state) ||
2076 test_bit(__ICE_VFLR_EVENT_PENDING, pf->state) ||
2077 test_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state) ||
2078 test_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state))
2079 mod_timer(&pf->serv_tmr, jiffies);
2080}
2081
2082
2083
2084
2085
2086static void ice_set_ctrlq_len(struct ice_hw *hw)
2087{
2088 hw->adminq.num_rq_entries = ICE_AQ_LEN;
2089 hw->adminq.num_sq_entries = ICE_AQ_LEN;
2090 hw->adminq.rq_buf_size = ICE_AQ_MAX_BUF_LEN;
2091 hw->adminq.sq_buf_size = ICE_AQ_MAX_BUF_LEN;
2092 hw->mailboxq.num_rq_entries = PF_MBX_ARQLEN_ARQLEN_M;
2093 hw->mailboxq.num_sq_entries = ICE_MBXSQ_LEN;
2094 hw->mailboxq.rq_buf_size = ICE_MBXQ_MAX_BUF_LEN;
2095 hw->mailboxq.sq_buf_size = ICE_MBXQ_MAX_BUF_LEN;
2096}
2097
2098
2099
2100
2101
2102
2103int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset)
2104{
2105 struct device *dev = ice_pf_to_dev(pf);
2106
2107
2108 if (test_bit(__ICE_RESET_FAILED, pf->state)) {
2109 dev_dbg(dev, "earlier reset has failed\n");
2110 return -EIO;
2111 }
2112
2113 if (ice_is_reset_in_progress(pf->state)) {
2114 dev_dbg(dev, "Reset already in progress\n");
2115 return -EBUSY;
2116 }
2117
2118 switch (reset) {
2119 case ICE_RESET_PFR:
2120 set_bit(__ICE_PFR_REQ, pf->state);
2121 break;
2122 case ICE_RESET_CORER:
2123 set_bit(__ICE_CORER_REQ, pf->state);
2124 break;
2125 case ICE_RESET_GLOBR:
2126 set_bit(__ICE_GLOBR_REQ, pf->state);
2127 break;
2128 default:
2129 return -EINVAL;
2130 }
2131
2132 ice_service_task_schedule(pf);
2133 return 0;
2134}
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144static void
2145ice_irq_affinity_notify(struct irq_affinity_notify *notify,
2146 const cpumask_t *mask)
2147{
2148 struct ice_q_vector *q_vector =
2149 container_of(notify, struct ice_q_vector, affinity_notify);
2150
2151 cpumask_copy(&q_vector->affinity_mask, mask);
2152}
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162static void ice_irq_affinity_release(struct kref __always_unused *ref) {}
2163
2164
2165
2166
2167
2168static int ice_vsi_ena_irq(struct ice_vsi *vsi)
2169{
2170 struct ice_hw *hw = &vsi->back->hw;
2171 int i;
2172
2173 ice_for_each_q_vector(vsi, i)
2174 ice_irq_dynamic_ena(hw, vsi, vsi->q_vectors[i]);
2175
2176 ice_flush(hw);
2177 return 0;
2178}
2179
2180
2181
2182
2183
2184
2185static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename)
2186{
2187 int q_vectors = vsi->num_q_vectors;
2188 struct ice_pf *pf = vsi->back;
2189 int base = vsi->base_vector;
2190 struct device *dev;
2191 int rx_int_idx = 0;
2192 int tx_int_idx = 0;
2193 int vector, err;
2194 int irq_num;
2195
2196 dev = ice_pf_to_dev(pf);
2197 for (vector = 0; vector < q_vectors; vector++) {
2198 struct ice_q_vector *q_vector = vsi->q_vectors[vector];
2199
2200 irq_num = pf->msix_entries[base + vector].vector;
2201
2202 if (q_vector->tx.ring && q_vector->rx.ring) {
2203 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2204 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2205 tx_int_idx++;
2206 } else if (q_vector->rx.ring) {
2207 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2208 "%s-%s-%d", basename, "rx", rx_int_idx++);
2209 } else if (q_vector->tx.ring) {
2210 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2211 "%s-%s-%d", basename, "tx", tx_int_idx++);
2212 } else {
2213
2214 continue;
2215 }
2216 err = devm_request_irq(dev, irq_num, vsi->irq_handler, 0,
2217 q_vector->name, q_vector);
2218 if (err) {
2219 netdev_err(vsi->netdev, "MSIX request_irq failed, error: %d\n",
2220 err);
2221 goto free_q_irqs;
2222 }
2223
2224
2225 if (!IS_ENABLED(CONFIG_RFS_ACCEL)) {
2226 struct irq_affinity_notify *affinity_notify;
2227
2228 affinity_notify = &q_vector->affinity_notify;
2229 affinity_notify->notify = ice_irq_affinity_notify;
2230 affinity_notify->release = ice_irq_affinity_release;
2231 irq_set_affinity_notifier(irq_num, affinity_notify);
2232 }
2233
2234
2235 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
2236 }
2237
2238 vsi->irqs_ready = true;
2239 return 0;
2240
2241free_q_irqs:
2242 while (vector) {
2243 vector--;
2244 irq_num = pf->msix_entries[base + vector].vector;
2245 if (!IS_ENABLED(CONFIG_RFS_ACCEL))
2246 irq_set_affinity_notifier(irq_num, NULL);
2247 irq_set_affinity_hint(irq_num, NULL);
2248 devm_free_irq(dev, irq_num, &vsi->q_vectors[vector]);
2249 }
2250 return err;
2251}
2252
2253
2254
2255
2256
2257
2258
2259static int ice_xdp_alloc_setup_rings(struct ice_vsi *vsi)
2260{
2261 struct device *dev = ice_pf_to_dev(vsi->back);
2262 int i;
2263
2264 for (i = 0; i < vsi->num_xdp_txq; i++) {
2265 u16 xdp_q_idx = vsi->alloc_txq + i;
2266 struct ice_ring *xdp_ring;
2267
2268 xdp_ring = kzalloc(sizeof(*xdp_ring), GFP_KERNEL);
2269
2270 if (!xdp_ring)
2271 goto free_xdp_rings;
2272
2273 xdp_ring->q_index = xdp_q_idx;
2274 xdp_ring->reg_idx = vsi->txq_map[xdp_q_idx];
2275 xdp_ring->ring_active = false;
2276 xdp_ring->vsi = vsi;
2277 xdp_ring->netdev = NULL;
2278 xdp_ring->dev = dev;
2279 xdp_ring->count = vsi->num_tx_desc;
2280 WRITE_ONCE(vsi->xdp_rings[i], xdp_ring);
2281 if (ice_setup_tx_ring(xdp_ring))
2282 goto free_xdp_rings;
2283 ice_set_ring_xdp(xdp_ring);
2284 xdp_ring->xsk_pool = ice_xsk_pool(xdp_ring);
2285 }
2286
2287 return 0;
2288
2289free_xdp_rings:
2290 for (; i >= 0; i--)
2291 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
2292 ice_free_tx_ring(vsi->xdp_rings[i]);
2293 return -ENOMEM;
2294}
2295
2296
2297
2298
2299
2300
2301static void ice_vsi_assign_bpf_prog(struct ice_vsi *vsi, struct bpf_prog *prog)
2302{
2303 struct bpf_prog *old_prog;
2304 int i;
2305
2306 old_prog = xchg(&vsi->xdp_prog, prog);
2307 if (old_prog)
2308 bpf_prog_put(old_prog);
2309
2310 ice_for_each_rxq(vsi, i)
2311 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
2312}
2313
2314
2315
2316
2317
2318
2319
2320
2321int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog)
2322{
2323 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2324 int xdp_rings_rem = vsi->num_xdp_txq;
2325 struct ice_pf *pf = vsi->back;
2326 struct ice_qs_cfg xdp_qs_cfg = {
2327 .qs_mutex = &pf->avail_q_mutex,
2328 .pf_map = pf->avail_txqs,
2329 .pf_map_size = pf->max_pf_txqs,
2330 .q_count = vsi->num_xdp_txq,
2331 .scatter_count = ICE_MAX_SCATTER_TXQS,
2332 .vsi_map = vsi->txq_map,
2333 .vsi_map_offset = vsi->alloc_txq,
2334 .mapping_mode = ICE_VSI_MAP_CONTIG
2335 };
2336 enum ice_status status;
2337 struct device *dev;
2338 int i, v_idx;
2339
2340 dev = ice_pf_to_dev(pf);
2341 vsi->xdp_rings = devm_kcalloc(dev, vsi->num_xdp_txq,
2342 sizeof(*vsi->xdp_rings), GFP_KERNEL);
2343 if (!vsi->xdp_rings)
2344 return -ENOMEM;
2345
2346 vsi->xdp_mapping_mode = xdp_qs_cfg.mapping_mode;
2347 if (__ice_vsi_get_qs(&xdp_qs_cfg))
2348 goto err_map_xdp;
2349
2350 if (ice_xdp_alloc_setup_rings(vsi))
2351 goto clear_xdp_rings;
2352
2353
2354 ice_for_each_q_vector(vsi, v_idx) {
2355 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
2356 int xdp_rings_per_v, q_id, q_base;
2357
2358 xdp_rings_per_v = DIV_ROUND_UP(xdp_rings_rem,
2359 vsi->num_q_vectors - v_idx);
2360 q_base = vsi->num_xdp_txq - xdp_rings_rem;
2361
2362 for (q_id = q_base; q_id < (q_base + xdp_rings_per_v); q_id++) {
2363 struct ice_ring *xdp_ring = vsi->xdp_rings[q_id];
2364
2365 xdp_ring->q_vector = q_vector;
2366 xdp_ring->next = q_vector->tx.ring;
2367 q_vector->tx.ring = xdp_ring;
2368 }
2369 xdp_rings_rem -= xdp_rings_per_v;
2370 }
2371
2372
2373
2374
2375
2376 if (ice_is_reset_in_progress(pf->state))
2377 return 0;
2378
2379
2380
2381
2382 for (i = 0; i < vsi->tc_cfg.numtc; i++)
2383 max_txqs[i] = vsi->num_txq + vsi->num_xdp_txq;
2384
2385 status = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2386 max_txqs);
2387 if (status) {
2388 dev_err(dev, "Failed VSI LAN queue config for XDP, error: %s\n",
2389 ice_stat_str(status));
2390 goto clear_xdp_rings;
2391 }
2392 ice_vsi_assign_bpf_prog(vsi, prog);
2393
2394 return 0;
2395clear_xdp_rings:
2396 for (i = 0; i < vsi->num_xdp_txq; i++)
2397 if (vsi->xdp_rings[i]) {
2398 kfree_rcu(vsi->xdp_rings[i], rcu);
2399 vsi->xdp_rings[i] = NULL;
2400 }
2401
2402err_map_xdp:
2403 mutex_lock(&pf->avail_q_mutex);
2404 for (i = 0; i < vsi->num_xdp_txq; i++) {
2405 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs);
2406 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX;
2407 }
2408 mutex_unlock(&pf->avail_q_mutex);
2409
2410 devm_kfree(dev, vsi->xdp_rings);
2411 return -ENOMEM;
2412}
2413
2414
2415
2416
2417
2418
2419
2420
2421int ice_destroy_xdp_rings(struct ice_vsi *vsi)
2422{
2423 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2424 struct ice_pf *pf = vsi->back;
2425 int i, v_idx;
2426
2427
2428
2429
2430
2431
2432 if (ice_is_reset_in_progress(pf->state) || !vsi->q_vectors[0])
2433 goto free_qmap;
2434
2435 ice_for_each_q_vector(vsi, v_idx) {
2436 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
2437 struct ice_ring *ring;
2438
2439 ice_for_each_ring(ring, q_vector->tx)
2440 if (!ring->tx_buf || !ice_ring_is_xdp(ring))
2441 break;
2442
2443
2444 q_vector->tx.ring = ring;
2445 }
2446
2447free_qmap:
2448 mutex_lock(&pf->avail_q_mutex);
2449 for (i = 0; i < vsi->num_xdp_txq; i++) {
2450 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs);
2451 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX;
2452 }
2453 mutex_unlock(&pf->avail_q_mutex);
2454
2455 for (i = 0; i < vsi->num_xdp_txq; i++)
2456 if (vsi->xdp_rings[i]) {
2457 if (vsi->xdp_rings[i]->desc)
2458 ice_free_tx_ring(vsi->xdp_rings[i]);
2459 kfree_rcu(vsi->xdp_rings[i], rcu);
2460 vsi->xdp_rings[i] = NULL;
2461 }
2462
2463 devm_kfree(ice_pf_to_dev(pf), vsi->xdp_rings);
2464 vsi->xdp_rings = NULL;
2465
2466 if (ice_is_reset_in_progress(pf->state) || !vsi->q_vectors[0])
2467 return 0;
2468
2469 ice_vsi_assign_bpf_prog(vsi, NULL);
2470
2471
2472
2473
2474 for (i = 0; i < vsi->tc_cfg.numtc; i++)
2475 max_txqs[i] = vsi->num_txq;
2476
2477
2478 vsi->num_xdp_txq = 0;
2479
2480 return ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2481 max_txqs);
2482}
2483
2484
2485
2486
2487
2488
2489
2490static int
2491ice_xdp_setup_prog(struct ice_vsi *vsi, struct bpf_prog *prog,
2492 struct netlink_ext_ack *extack)
2493{
2494 int frame_size = vsi->netdev->mtu + ICE_ETH_PKT_HDR_PAD;
2495 bool if_running = netif_running(vsi->netdev);
2496 int ret = 0, xdp_ring_err = 0;
2497
2498 if (frame_size > vsi->rx_buf_len) {
2499 NL_SET_ERR_MSG_MOD(extack, "MTU too large for loading XDP");
2500 return -EOPNOTSUPP;
2501 }
2502
2503
2504 if (if_running && !test_and_set_bit(__ICE_DOWN, vsi->state)) {
2505 ret = ice_down(vsi);
2506 if (ret) {
2507 NL_SET_ERR_MSG_MOD(extack, "Preparing device for XDP attach failed");
2508 return ret;
2509 }
2510 }
2511
2512 if (!ice_is_xdp_ena_vsi(vsi) && prog) {
2513 vsi->num_xdp_txq = vsi->alloc_rxq;
2514 xdp_ring_err = ice_prepare_xdp_rings(vsi, prog);
2515 if (xdp_ring_err)
2516 NL_SET_ERR_MSG_MOD(extack, "Setting up XDP Tx resources failed");
2517 } else if (ice_is_xdp_ena_vsi(vsi) && !prog) {
2518 xdp_ring_err = ice_destroy_xdp_rings(vsi);
2519 if (xdp_ring_err)
2520 NL_SET_ERR_MSG_MOD(extack, "Freeing XDP Tx resources failed");
2521 } else {
2522 ice_vsi_assign_bpf_prog(vsi, prog);
2523 }
2524
2525 if (if_running)
2526 ret = ice_up(vsi);
2527
2528 if (!ret && prog && vsi->xsk_pools) {
2529 int i;
2530
2531 ice_for_each_rxq(vsi, i) {
2532 struct ice_ring *rx_ring = vsi->rx_rings[i];
2533
2534 if (rx_ring->xsk_pool)
2535 napi_schedule(&rx_ring->q_vector->napi);
2536 }
2537 }
2538
2539 return (ret || xdp_ring_err) ? -ENOMEM : 0;
2540}
2541
2542
2543
2544
2545
2546
2547static int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2548{
2549 struct ice_netdev_priv *np = netdev_priv(dev);
2550 struct ice_vsi *vsi = np->vsi;
2551
2552 if (vsi->type != ICE_VSI_PF) {
2553 NL_SET_ERR_MSG_MOD(xdp->extack, "XDP can be loaded only on PF VSI");
2554 return -EINVAL;
2555 }
2556
2557 switch (xdp->command) {
2558 case XDP_SETUP_PROG:
2559 return ice_xdp_setup_prog(vsi, xdp->prog, xdp->extack);
2560 case XDP_SETUP_XSK_POOL:
2561 return ice_xsk_pool_setup(vsi, xdp->xsk.pool,
2562 xdp->xsk.queue_id);
2563 default:
2564 return -EINVAL;
2565 }
2566}
2567
2568
2569
2570
2571
2572static void ice_ena_misc_vector(struct ice_pf *pf)
2573{
2574 struct ice_hw *hw = &pf->hw;
2575 u32 val;
2576
2577
2578
2579
2580
2581 val = rd32(hw, GL_MDCK_TX_TDPU);
2582 val |= GL_MDCK_TX_TDPU_RCU_ANTISPOOF_ITR_DIS_M;
2583 wr32(hw, GL_MDCK_TX_TDPU, val);
2584
2585
2586 wr32(hw, PFINT_OICR_ENA, 0);
2587 rd32(hw, PFINT_OICR);
2588
2589 val = (PFINT_OICR_ECC_ERR_M |
2590 PFINT_OICR_MAL_DETECT_M |
2591 PFINT_OICR_GRST_M |
2592 PFINT_OICR_PCI_EXCEPTION_M |
2593 PFINT_OICR_VFLR_M |
2594 PFINT_OICR_HMC_ERR_M |
2595 PFINT_OICR_PE_CRITERR_M);
2596
2597 wr32(hw, PFINT_OICR_ENA, val);
2598
2599
2600 wr32(hw, GLINT_DYN_CTL(pf->oicr_idx),
2601 GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M);
2602}
2603
2604
2605
2606
2607
2608
2609static irqreturn_t ice_misc_intr(int __always_unused irq, void *data)
2610{
2611 struct ice_pf *pf = (struct ice_pf *)data;
2612 struct ice_hw *hw = &pf->hw;
2613 irqreturn_t ret = IRQ_NONE;
2614 struct device *dev;
2615 u32 oicr, ena_mask;
2616
2617 dev = ice_pf_to_dev(pf);
2618 set_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state);
2619 set_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state);
2620
2621 oicr = rd32(hw, PFINT_OICR);
2622 ena_mask = rd32(hw, PFINT_OICR_ENA);
2623
2624 if (oicr & PFINT_OICR_SWINT_M) {
2625 ena_mask &= ~PFINT_OICR_SWINT_M;
2626 pf->sw_int_count++;
2627 }
2628
2629 if (oicr & PFINT_OICR_MAL_DETECT_M) {
2630 ena_mask &= ~PFINT_OICR_MAL_DETECT_M;
2631 set_bit(__ICE_MDD_EVENT_PENDING, pf->state);
2632 }
2633 if (oicr & PFINT_OICR_VFLR_M) {
2634
2635 if (test_bit(__ICE_VF_RESETS_DISABLED, pf->state)) {
2636 u32 reg = rd32(hw, PFINT_OICR_ENA);
2637
2638 reg &= ~PFINT_OICR_VFLR_M;
2639 wr32(hw, PFINT_OICR_ENA, reg);
2640 } else {
2641 ena_mask &= ~PFINT_OICR_VFLR_M;
2642 set_bit(__ICE_VFLR_EVENT_PENDING, pf->state);
2643 }
2644 }
2645
2646 if (oicr & PFINT_OICR_GRST_M) {
2647 u32 reset;
2648
2649
2650 ena_mask &= ~PFINT_OICR_GRST_M;
2651 reset = (rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>
2652 GLGEN_RSTAT_RESET_TYPE_S;
2653
2654 if (reset == ICE_RESET_CORER)
2655 pf->corer_count++;
2656 else if (reset == ICE_RESET_GLOBR)
2657 pf->globr_count++;
2658 else if (reset == ICE_RESET_EMPR)
2659 pf->empr_count++;
2660 else
2661 dev_dbg(dev, "Invalid reset type %d\n", reset);
2662
2663
2664
2665
2666
2667
2668 if (!test_and_set_bit(__ICE_RESET_OICR_RECV, pf->state)) {
2669 if (reset == ICE_RESET_CORER)
2670 set_bit(__ICE_CORER_RECV, pf->state);
2671 else if (reset == ICE_RESET_GLOBR)
2672 set_bit(__ICE_GLOBR_RECV, pf->state);
2673 else
2674 set_bit(__ICE_EMPR_RECV, pf->state);
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689 hw->reset_ongoing = true;
2690 }
2691 }
2692
2693 if (oicr & PFINT_OICR_HMC_ERR_M) {
2694 ena_mask &= ~PFINT_OICR_HMC_ERR_M;
2695 dev_dbg(dev, "HMC Error interrupt - info 0x%x, data 0x%x\n",
2696 rd32(hw, PFHMC_ERRORINFO),
2697 rd32(hw, PFHMC_ERRORDATA));
2698 }
2699
2700
2701 oicr &= ena_mask;
2702 if (oicr) {
2703 dev_dbg(dev, "unhandled interrupt oicr=0x%08x\n", oicr);
2704
2705
2706
2707 if (oicr & (PFINT_OICR_PE_CRITERR_M |
2708 PFINT_OICR_PCI_EXCEPTION_M |
2709 PFINT_OICR_ECC_ERR_M)) {
2710 set_bit(__ICE_PFR_REQ, pf->state);
2711 ice_service_task_schedule(pf);
2712 }
2713 }
2714 ret = IRQ_HANDLED;
2715
2716 ice_service_task_schedule(pf);
2717 ice_irq_dynamic_ena(hw, NULL, NULL);
2718
2719 return ret;
2720}
2721
2722
2723
2724
2725
2726static void ice_dis_ctrlq_interrupts(struct ice_hw *hw)
2727{
2728
2729 wr32(hw, PFINT_FW_CTL,
2730 rd32(hw, PFINT_FW_CTL) & ~PFINT_FW_CTL_CAUSE_ENA_M);
2731
2732
2733 wr32(hw, PFINT_MBX_CTL,
2734 rd32(hw, PFINT_MBX_CTL) & ~PFINT_MBX_CTL_CAUSE_ENA_M);
2735
2736
2737 wr32(hw, PFINT_OICR_CTL,
2738 rd32(hw, PFINT_OICR_CTL) & ~PFINT_OICR_CTL_CAUSE_ENA_M);
2739
2740 ice_flush(hw);
2741}
2742
2743
2744
2745
2746
2747static void ice_free_irq_msix_misc(struct ice_pf *pf)
2748{
2749 struct ice_hw *hw = &pf->hw;
2750
2751 ice_dis_ctrlq_interrupts(hw);
2752
2753
2754 wr32(hw, PFINT_OICR_ENA, 0);
2755 ice_flush(hw);
2756
2757 if (pf->msix_entries) {
2758 synchronize_irq(pf->msix_entries[pf->oicr_idx].vector);
2759 devm_free_irq(ice_pf_to_dev(pf),
2760 pf->msix_entries[pf->oicr_idx].vector, pf);
2761 }
2762
2763 pf->num_avail_sw_msix += 1;
2764 ice_free_res(pf->irq_tracker, pf->oicr_idx, ICE_RES_MISC_VEC_ID);
2765}
2766
2767
2768
2769
2770
2771
2772static void ice_ena_ctrlq_interrupts(struct ice_hw *hw, u16 reg_idx)
2773{
2774 u32 val;
2775
2776 val = ((reg_idx & PFINT_OICR_CTL_MSIX_INDX_M) |
2777 PFINT_OICR_CTL_CAUSE_ENA_M);
2778 wr32(hw, PFINT_OICR_CTL, val);
2779
2780
2781 val = ((reg_idx & PFINT_FW_CTL_MSIX_INDX_M) |
2782 PFINT_FW_CTL_CAUSE_ENA_M);
2783 wr32(hw, PFINT_FW_CTL, val);
2784
2785
2786 val = ((reg_idx & PFINT_MBX_CTL_MSIX_INDX_M) |
2787 PFINT_MBX_CTL_CAUSE_ENA_M);
2788 wr32(hw, PFINT_MBX_CTL, val);
2789
2790 ice_flush(hw);
2791}
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801static int ice_req_irq_msix_misc(struct ice_pf *pf)
2802{
2803 struct device *dev = ice_pf_to_dev(pf);
2804 struct ice_hw *hw = &pf->hw;
2805 int oicr_idx, err = 0;
2806
2807 if (!pf->int_name[0])
2808 snprintf(pf->int_name, sizeof(pf->int_name) - 1, "%s-%s:misc",
2809 dev_driver_string(dev), dev_name(dev));
2810
2811
2812
2813
2814
2815 if (ice_is_reset_in_progress(pf->state))
2816 goto skip_req_irq;
2817
2818
2819 oicr_idx = ice_get_res(pf, pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
2820 if (oicr_idx < 0)
2821 return oicr_idx;
2822
2823 pf->num_avail_sw_msix -= 1;
2824 pf->oicr_idx = (u16)oicr_idx;
2825
2826 err = devm_request_irq(dev, pf->msix_entries[pf->oicr_idx].vector,
2827 ice_misc_intr, 0, pf->int_name, pf);
2828 if (err) {
2829 dev_err(dev, "devm_request_irq for %s failed: %d\n",
2830 pf->int_name, err);
2831 ice_free_res(pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
2832 pf->num_avail_sw_msix += 1;
2833 return err;
2834 }
2835
2836skip_req_irq:
2837 ice_ena_misc_vector(pf);
2838
2839 ice_ena_ctrlq_interrupts(hw, pf->oicr_idx);
2840 wr32(hw, GLINT_ITR(ICE_RX_ITR, pf->oicr_idx),
2841 ITR_REG_ALIGN(ICE_ITR_8K) >> ICE_ITR_GRAN_S);
2842
2843 ice_flush(hw);
2844 ice_irq_dynamic_ena(hw, NULL, NULL);
2845
2846 return 0;
2847}
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857static void ice_napi_add(struct ice_vsi *vsi)
2858{
2859 int v_idx;
2860
2861 if (!vsi->netdev)
2862 return;
2863
2864 ice_for_each_q_vector(vsi, v_idx)
2865 netif_napi_add(vsi->netdev, &vsi->q_vectors[v_idx]->napi,
2866 ice_napi_poll, NAPI_POLL_WEIGHT);
2867}
2868
2869
2870
2871
2872
2873static void ice_set_ops(struct net_device *netdev)
2874{
2875 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2876
2877 if (ice_is_safe_mode(pf)) {
2878 netdev->netdev_ops = &ice_netdev_safe_mode_ops;
2879 ice_set_ethtool_safe_mode_ops(netdev);
2880 return;
2881 }
2882
2883 netdev->netdev_ops = &ice_netdev_ops;
2884 netdev->udp_tunnel_nic_info = &pf->hw.udp_tunnel_nic;
2885 ice_set_ethtool_ops(netdev);
2886}
2887
2888
2889
2890
2891
2892static void ice_set_netdev_features(struct net_device *netdev)
2893{
2894 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2895 netdev_features_t csumo_features;
2896 netdev_features_t vlano_features;
2897 netdev_features_t dflt_features;
2898 netdev_features_t tso_features;
2899
2900 if (ice_is_safe_mode(pf)) {
2901
2902 netdev->features = NETIF_F_SG | NETIF_F_HIGHDMA;
2903 netdev->hw_features = netdev->features;
2904 return;
2905 }
2906
2907 dflt_features = NETIF_F_SG |
2908 NETIF_F_HIGHDMA |
2909 NETIF_F_NTUPLE |
2910 NETIF_F_RXHASH;
2911
2912 csumo_features = NETIF_F_RXCSUM |
2913 NETIF_F_IP_CSUM |
2914 NETIF_F_SCTP_CRC |
2915 NETIF_F_IPV6_CSUM;
2916
2917 vlano_features = NETIF_F_HW_VLAN_CTAG_FILTER |
2918 NETIF_F_HW_VLAN_CTAG_TX |
2919 NETIF_F_HW_VLAN_CTAG_RX;
2920
2921 tso_features = NETIF_F_TSO |
2922 NETIF_F_TSO_ECN |
2923 NETIF_F_TSO6 |
2924 NETIF_F_GSO_GRE |
2925 NETIF_F_GSO_UDP_TUNNEL |
2926 NETIF_F_GSO_GRE_CSUM |
2927 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2928 NETIF_F_GSO_PARTIAL |
2929 NETIF_F_GSO_IPXIP4 |
2930 NETIF_F_GSO_IPXIP6 |
2931 NETIF_F_GSO_UDP_L4;
2932
2933 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM |
2934 NETIF_F_GSO_GRE_CSUM;
2935
2936 netdev->hw_features = dflt_features | csumo_features |
2937 vlano_features | tso_features;
2938
2939
2940 netdev->mpls_features = NETIF_F_HW_CSUM;
2941
2942
2943 netdev->features |= netdev->hw_features;
2944
2945 netdev->hw_enc_features |= dflt_features | csumo_features |
2946 tso_features;
2947 netdev->vlan_features |= dflt_features | csumo_features |
2948 tso_features;
2949}
2950
2951
2952
2953
2954
2955
2956
2957static int ice_cfg_netdev(struct ice_vsi *vsi)
2958{
2959 struct ice_pf *pf = vsi->back;
2960 struct ice_netdev_priv *np;
2961 struct net_device *netdev;
2962 u8 mac_addr[ETH_ALEN];
2963 int err;
2964
2965 err = ice_devlink_create_port(vsi);
2966 if (err)
2967 return err;
2968
2969 netdev = alloc_etherdev_mqs(sizeof(*np), vsi->alloc_txq,
2970 vsi->alloc_rxq);
2971 if (!netdev) {
2972 err = -ENOMEM;
2973 goto err_destroy_devlink_port;
2974 }
2975
2976 vsi->netdev = netdev;
2977 np = netdev_priv(netdev);
2978 np->vsi = vsi;
2979
2980 ice_set_netdev_features(netdev);
2981
2982 ice_set_ops(netdev);
2983
2984 if (vsi->type == ICE_VSI_PF) {
2985 SET_NETDEV_DEV(netdev, ice_pf_to_dev(pf));
2986 ether_addr_copy(mac_addr, vsi->port_info->mac.perm_addr);
2987 ether_addr_copy(netdev->dev_addr, mac_addr);
2988 ether_addr_copy(netdev->perm_addr, mac_addr);
2989 }
2990
2991 netdev->priv_flags |= IFF_UNICAST_FLT;
2992
2993
2994 ice_vsi_cfg_netdev_tc(vsi, vsi->tc_cfg.ena_tc);
2995
2996
2997 netdev->watchdog_timeo = 5 * HZ;
2998
2999 netdev->min_mtu = ETH_MIN_MTU;
3000 netdev->max_mtu = ICE_MAX_MTU;
3001
3002 err = register_netdev(vsi->netdev);
3003 if (err)
3004 goto err_free_netdev;
3005
3006 devlink_port_type_eth_set(&vsi->devlink_port, vsi->netdev);
3007
3008 netif_carrier_off(vsi->netdev);
3009
3010
3011 netif_tx_stop_all_queues(vsi->netdev);
3012
3013 return 0;
3014
3015err_free_netdev:
3016 free_netdev(vsi->netdev);
3017 vsi->netdev = NULL;
3018err_destroy_devlink_port:
3019 ice_devlink_destroy_port(vsi);
3020 return err;
3021}
3022
3023
3024
3025
3026
3027
3028
3029void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size)
3030{
3031 u16 i;
3032
3033 for (i = 0; i < rss_table_size; i++)
3034 lut[i] = i % rss_size;
3035}
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045static struct ice_vsi *
3046ice_pf_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
3047{
3048 return ice_vsi_setup(pf, pi, ICE_VSI_PF, ICE_INVAL_VFID);
3049}
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059static struct ice_vsi *
3060ice_ctrl_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
3061{
3062 return ice_vsi_setup(pf, pi, ICE_VSI_CTRL, ICE_INVAL_VFID);
3063}
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073struct ice_vsi *
3074ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
3075{
3076 return ice_vsi_setup(pf, pi, ICE_VSI_LB, ICE_INVAL_VFID);
3077}
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087static int
3088ice_vlan_rx_add_vid(struct net_device *netdev, __always_unused __be16 proto,
3089 u16 vid)
3090{
3091 struct ice_netdev_priv *np = netdev_priv(netdev);
3092 struct ice_vsi *vsi = np->vsi;
3093 int ret;
3094
3095 if (vid >= VLAN_N_VID) {
3096 netdev_err(netdev, "VLAN id requested %d is out of range %d\n",
3097 vid, VLAN_N_VID);
3098 return -EINVAL;
3099 }
3100
3101 if (vsi->info.pvid)
3102 return -EINVAL;
3103
3104
3105 if (!vid)
3106 return 0;
3107
3108
3109 if (!ice_vsi_is_vlan_pruning_ena(vsi)) {
3110 ret = ice_cfg_vlan_pruning(vsi, true, false);
3111 if (ret)
3112 return ret;
3113 }
3114
3115
3116
3117
3118 ret = ice_vsi_add_vlan(vsi, vid, ICE_FWD_TO_VSI);
3119 if (!ret) {
3120 vsi->vlan_ena = true;
3121 set_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
3122 }
3123
3124 return ret;
3125}
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135static int
3136ice_vlan_rx_kill_vid(struct net_device *netdev, __always_unused __be16 proto,
3137 u16 vid)
3138{
3139 struct ice_netdev_priv *np = netdev_priv(netdev);
3140 struct ice_vsi *vsi = np->vsi;
3141 int ret;
3142
3143 if (vsi->info.pvid)
3144 return -EINVAL;
3145
3146
3147 if (!vid)
3148 return 0;
3149
3150
3151
3152
3153 ret = ice_vsi_kill_vlan(vsi, vid);
3154 if (ret)
3155 return ret;
3156
3157
3158 if (vsi->num_vlan == 1 && ice_vsi_is_vlan_pruning_ena(vsi))
3159 ret = ice_cfg_vlan_pruning(vsi, false, false);
3160
3161 vsi->vlan_ena = false;
3162 set_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
3163 return ret;
3164}
3165
3166
3167
3168
3169
3170
3171
3172static int ice_setup_pf_sw(struct ice_pf *pf)
3173{
3174 struct ice_vsi *vsi;
3175 int status = 0;
3176
3177 if (ice_is_reset_in_progress(pf->state))
3178 return -EBUSY;
3179
3180 vsi = ice_pf_vsi_setup(pf, pf->hw.port_info);
3181 if (!vsi)
3182 return -ENOMEM;
3183
3184 status = ice_cfg_netdev(vsi);
3185 if (status) {
3186 status = -ENODEV;
3187 goto unroll_vsi_setup;
3188 }
3189
3190 ice_vsi_cfg_frame_size(vsi);
3191
3192
3193 ice_dcbnl_setup(vsi);
3194
3195
3196
3197
3198
3199 ice_napi_add(vsi);
3200
3201 status = ice_set_cpu_rx_rmap(vsi);
3202 if (status) {
3203 dev_err(ice_pf_to_dev(pf), "Failed to set CPU Rx map VSI %d error %d\n",
3204 vsi->vsi_num, status);
3205 status = -EINVAL;
3206 goto unroll_napi_add;
3207 }
3208 status = ice_init_mac_fltr(pf);
3209 if (status)
3210 goto free_cpu_rx_map;
3211
3212 return status;
3213
3214free_cpu_rx_map:
3215 ice_free_cpu_rx_rmap(vsi);
3216
3217unroll_napi_add:
3218 if (vsi) {
3219 ice_napi_del(vsi);
3220 if (vsi->netdev) {
3221 if (vsi->netdev->reg_state == NETREG_REGISTERED)
3222 unregister_netdev(vsi->netdev);
3223 free_netdev(vsi->netdev);
3224 vsi->netdev = NULL;
3225 }
3226 }
3227
3228unroll_vsi_setup:
3229 ice_vsi_release(vsi);
3230 return status;
3231}
3232
3233
3234
3235
3236
3237
3238
3239static u16
3240ice_get_avail_q_count(unsigned long *pf_qmap, struct mutex *lock, u16 size)
3241{
3242 unsigned long bit;
3243 u16 count = 0;
3244
3245 mutex_lock(lock);
3246 for_each_clear_bit(bit, pf_qmap, size)
3247 count++;
3248 mutex_unlock(lock);
3249
3250 return count;
3251}
3252
3253
3254
3255
3256
3257u16 ice_get_avail_txq_count(struct ice_pf *pf)
3258{
3259 return ice_get_avail_q_count(pf->avail_txqs, &pf->avail_q_mutex,
3260 pf->max_pf_txqs);
3261}
3262
3263
3264
3265
3266
3267u16 ice_get_avail_rxq_count(struct ice_pf *pf)
3268{
3269 return ice_get_avail_q_count(pf->avail_rxqs, &pf->avail_q_mutex,
3270 pf->max_pf_rxqs);
3271}
3272
3273
3274
3275
3276
3277static void ice_deinit_pf(struct ice_pf *pf)
3278{
3279 ice_service_task_stop(pf);
3280 mutex_destroy(&pf->sw_mutex);
3281 mutex_destroy(&pf->tc_mutex);
3282 mutex_destroy(&pf->avail_q_mutex);
3283
3284 if (pf->avail_txqs) {
3285 bitmap_free(pf->avail_txqs);
3286 pf->avail_txqs = NULL;
3287 }
3288
3289 if (pf->avail_rxqs) {
3290 bitmap_free(pf->avail_rxqs);
3291 pf->avail_rxqs = NULL;
3292 }
3293}
3294
3295
3296
3297
3298
3299static void ice_set_pf_caps(struct ice_pf *pf)
3300{
3301 struct ice_hw_func_caps *func_caps = &pf->hw.func_caps;
3302
3303 clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
3304 if (func_caps->common_cap.dcb)
3305 set_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
3306 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
3307 if (func_caps->common_cap.sr_iov_1_1) {
3308 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
3309 pf->num_vfs_supported = min_t(int, func_caps->num_allocd_vfs,
3310 ICE_MAX_VF_COUNT);
3311 }
3312 clear_bit(ICE_FLAG_RSS_ENA, pf->flags);
3313 if (func_caps->common_cap.rss_table_size)
3314 set_bit(ICE_FLAG_RSS_ENA, pf->flags);
3315
3316 clear_bit(ICE_FLAG_FD_ENA, pf->flags);
3317 if (func_caps->fd_fltr_guar > 0 || func_caps->fd_fltr_best_effort > 0) {
3318 u16 unused;
3319
3320
3321
3322
3323 pf->ctrl_vsi_idx = ICE_NO_VSI;
3324 set_bit(ICE_FLAG_FD_ENA, pf->flags);
3325
3326 ice_alloc_fd_guar_item(&pf->hw, &unused,
3327 func_caps->fd_fltr_guar);
3328
3329 ice_alloc_fd_shrd_item(&pf->hw, &unused,
3330 func_caps->fd_fltr_best_effort);
3331 }
3332
3333 pf->max_pf_txqs = func_caps->common_cap.num_txq;
3334 pf->max_pf_rxqs = func_caps->common_cap.num_rxq;
3335}
3336
3337
3338
3339
3340
3341static int ice_init_pf(struct ice_pf *pf)
3342{
3343 ice_set_pf_caps(pf);
3344
3345 mutex_init(&pf->sw_mutex);
3346 mutex_init(&pf->tc_mutex);
3347
3348 INIT_HLIST_HEAD(&pf->aq_wait_list);
3349 spin_lock_init(&pf->aq_wait_lock);
3350 init_waitqueue_head(&pf->aq_wait_queue);
3351
3352
3353 timer_setup(&pf->serv_tmr, ice_service_timer, 0);
3354 pf->serv_tmr_period = HZ;
3355 INIT_WORK(&pf->serv_task, ice_service_task);
3356 clear_bit(__ICE_SERVICE_SCHED, pf->state);
3357
3358 mutex_init(&pf->avail_q_mutex);
3359 pf->avail_txqs = bitmap_zalloc(pf->max_pf_txqs, GFP_KERNEL);
3360 if (!pf->avail_txqs)
3361 return -ENOMEM;
3362
3363 pf->avail_rxqs = bitmap_zalloc(pf->max_pf_rxqs, GFP_KERNEL);
3364 if (!pf->avail_rxqs) {
3365 devm_kfree(ice_pf_to_dev(pf), pf->avail_txqs);
3366 pf->avail_txqs = NULL;
3367 return -ENOMEM;
3368 }
3369
3370 return 0;
3371}
3372
3373
3374
3375
3376
3377
3378
3379
3380static int ice_ena_msix_range(struct ice_pf *pf)
3381{
3382 struct device *dev = ice_pf_to_dev(pf);
3383 int v_left, v_actual, v_budget = 0;
3384 int needed, err, i;
3385
3386 v_left = pf->hw.func_caps.common_cap.num_msix_vectors;
3387
3388
3389 needed = 1;
3390 if (v_left < needed)
3391 goto no_hw_vecs_left_err;
3392 v_budget += needed;
3393 v_left -= needed;
3394
3395
3396 needed = min_t(int, num_online_cpus(), v_left);
3397 if (v_left < needed)
3398 goto no_hw_vecs_left_err;
3399 pf->num_lan_msix = needed;
3400 v_budget += needed;
3401 v_left -= needed;
3402
3403
3404 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) {
3405 needed = ICE_FDIR_MSIX;
3406 if (v_left < needed)
3407 goto no_hw_vecs_left_err;
3408 v_budget += needed;
3409 v_left -= needed;
3410 }
3411
3412 pf->msix_entries = devm_kcalloc(dev, v_budget,
3413 sizeof(*pf->msix_entries), GFP_KERNEL);
3414
3415 if (!pf->msix_entries) {
3416 err = -ENOMEM;
3417 goto exit_err;
3418 }
3419
3420 for (i = 0; i < v_budget; i++)
3421 pf->msix_entries[i].entry = i;
3422
3423
3424 v_actual = pci_enable_msix_range(pf->pdev, pf->msix_entries,
3425 ICE_MIN_MSIX, v_budget);
3426
3427 if (v_actual < 0) {
3428 dev_err(dev, "unable to reserve MSI-X vectors\n");
3429 err = v_actual;
3430 goto msix_err;
3431 }
3432
3433 if (v_actual < v_budget) {
3434 dev_warn(dev, "not enough OS MSI-X vectors. requested = %d, obtained = %d\n",
3435 v_budget, v_actual);
3436
3437#define ICE_MIN_LAN_VECS 2
3438#define ICE_MIN_RDMA_VECS 2
3439#define ICE_MIN_VECS (ICE_MIN_LAN_VECS + ICE_MIN_RDMA_VECS + 1)
3440
3441 if (v_actual < ICE_MIN_LAN_VECS) {
3442
3443 pci_disable_msix(pf->pdev);
3444 err = -ERANGE;
3445 goto msix_err;
3446 } else {
3447 pf->num_lan_msix = ICE_MIN_LAN_VECS;
3448 }
3449 }
3450
3451 return v_actual;
3452
3453msix_err:
3454 devm_kfree(dev, pf->msix_entries);
3455 goto exit_err;
3456
3457no_hw_vecs_left_err:
3458 dev_err(dev, "not enough device MSI-X vectors. requested = %d, available = %d\n",
3459 needed, v_left);
3460 err = -ERANGE;
3461exit_err:
3462 pf->num_lan_msix = 0;
3463 return err;
3464}
3465
3466
3467
3468
3469
3470static void ice_dis_msix(struct ice_pf *pf)
3471{
3472 pci_disable_msix(pf->pdev);
3473 devm_kfree(ice_pf_to_dev(pf), pf->msix_entries);
3474 pf->msix_entries = NULL;
3475}
3476
3477
3478
3479
3480
3481static void ice_clear_interrupt_scheme(struct ice_pf *pf)
3482{
3483 ice_dis_msix(pf);
3484
3485 if (pf->irq_tracker) {
3486 devm_kfree(ice_pf_to_dev(pf), pf->irq_tracker);
3487 pf->irq_tracker = NULL;
3488 }
3489}
3490
3491
3492
3493
3494
3495static int ice_init_interrupt_scheme(struct ice_pf *pf)
3496{
3497 int vectors;
3498
3499 vectors = ice_ena_msix_range(pf);
3500
3501 if (vectors < 0)
3502 return vectors;
3503
3504
3505 pf->irq_tracker =
3506 devm_kzalloc(ice_pf_to_dev(pf), sizeof(*pf->irq_tracker) +
3507 (sizeof(u16) * vectors), GFP_KERNEL);
3508 if (!pf->irq_tracker) {
3509 ice_dis_msix(pf);
3510 return -ENOMEM;
3511 }
3512
3513
3514 pf->num_avail_sw_msix = (u16)vectors;
3515 pf->irq_tracker->num_entries = (u16)vectors;
3516 pf->irq_tracker->end = pf->irq_tracker->num_entries;
3517
3518 return 0;
3519}
3520
3521
3522
3523
3524
3525
3526
3527
3528bool ice_is_wol_supported(struct ice_pf *pf)
3529{
3530 struct ice_hw *hw = &pf->hw;
3531 u16 wol_ctrl;
3532
3533
3534
3535
3536 if (ice_read_sr_word(hw, ICE_SR_NVM_WOL_CFG, &wol_ctrl))
3537 return false;
3538
3539 return !(BIT(hw->pf_id) & wol_ctrl);
3540}
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx)
3553{
3554 struct ice_pf *pf = vsi->back;
3555 int err = 0, timeout = 50;
3556
3557 if (!new_rx && !new_tx)
3558 return -EINVAL;
3559
3560 while (test_and_set_bit(__ICE_CFG_BUSY, pf->state)) {
3561 timeout--;
3562 if (!timeout)
3563 return -EBUSY;
3564 usleep_range(1000, 2000);
3565 }
3566
3567 if (new_tx)
3568 vsi->req_txq = (u16)new_tx;
3569 if (new_rx)
3570 vsi->req_rxq = (u16)new_rx;
3571
3572
3573 if (!netif_running(vsi->netdev)) {
3574 ice_vsi_rebuild(vsi, false);
3575 dev_dbg(ice_pf_to_dev(pf), "Link is down, queue count change happens when link is brought up\n");
3576 goto done;
3577 }
3578
3579 ice_vsi_close(vsi);
3580 ice_vsi_rebuild(vsi, false);
3581 ice_pf_dcb_recfg(pf);
3582 ice_vsi_open(vsi);
3583done:
3584 clear_bit(__ICE_CFG_BUSY, pf->state);
3585 return err;
3586}
3587
3588
3589
3590
3591
3592
3593
3594
3595static void ice_set_safe_mode_vlan_cfg(struct ice_pf *pf)
3596{
3597 struct ice_vsi *vsi = ice_get_main_vsi(pf);
3598 struct ice_vsi_ctx *ctxt;
3599 enum ice_status status;
3600 struct ice_hw *hw;
3601
3602 if (!vsi)
3603 return;
3604
3605 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
3606 if (!ctxt)
3607 return;
3608
3609 hw = &pf->hw;
3610 ctxt->info = vsi->info;
3611
3612 ctxt->info.valid_sections =
3613 cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID |
3614 ICE_AQ_VSI_PROP_SECURITY_VALID |
3615 ICE_AQ_VSI_PROP_SW_VALID);
3616
3617
3618 ctxt->info.sec_flags &= ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
3619 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
3620
3621
3622 ctxt->info.sw_flags2 &= ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
3623
3624
3625 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL |
3626 ICE_AQ_VSI_VLAN_EMOD_NOTHING;
3627
3628 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
3629 if (status) {
3630 dev_err(ice_pf_to_dev(vsi->back), "Failed to update VSI for safe mode VLANs, err %s aq_err %s\n",
3631 ice_stat_str(status),
3632 ice_aq_str(hw->adminq.sq_last_status));
3633 } else {
3634 vsi->info.sec_flags = ctxt->info.sec_flags;
3635 vsi->info.sw_flags2 = ctxt->info.sw_flags2;
3636 vsi->info.vlan_flags = ctxt->info.vlan_flags;
3637 }
3638
3639 kfree(ctxt);
3640}
3641
3642
3643
3644
3645
3646
3647static void
3648ice_log_pkg_init(struct ice_hw *hw, enum ice_status *status)
3649{
3650 struct ice_pf *pf = (struct ice_pf *)hw->back;
3651 struct device *dev = ice_pf_to_dev(pf);
3652
3653 switch (*status) {
3654 case ICE_SUCCESS:
3655
3656
3657
3658
3659 if (hw->pkg_ver.major == hw->active_pkg_ver.major &&
3660 hw->pkg_ver.minor == hw->active_pkg_ver.minor &&
3661 hw->pkg_ver.update == hw->active_pkg_ver.update &&
3662 hw->pkg_ver.draft == hw->active_pkg_ver.draft &&
3663 !memcmp(hw->pkg_name, hw->active_pkg_name,
3664 sizeof(hw->pkg_name))) {
3665 if (hw->pkg_dwnld_status == ICE_AQ_RC_EEXIST)
3666 dev_info(dev, "DDP package already present on device: %s version %d.%d.%d.%d\n",
3667 hw->active_pkg_name,
3668 hw->active_pkg_ver.major,
3669 hw->active_pkg_ver.minor,
3670 hw->active_pkg_ver.update,
3671 hw->active_pkg_ver.draft);
3672 else
3673 dev_info(dev, "The DDP package was successfully loaded: %s version %d.%d.%d.%d\n",
3674 hw->active_pkg_name,
3675 hw->active_pkg_ver.major,
3676 hw->active_pkg_ver.minor,
3677 hw->active_pkg_ver.update,
3678 hw->active_pkg_ver.draft);
3679 } else if (hw->active_pkg_ver.major != ICE_PKG_SUPP_VER_MAJ ||
3680 hw->active_pkg_ver.minor != ICE_PKG_SUPP_VER_MNR) {
3681 dev_err(dev, "The device has a DDP package that is not supported by the driver. The device has package '%s' version %d.%d.x.x. The driver requires version %d.%d.x.x. Entering Safe Mode.\n",
3682 hw->active_pkg_name,
3683 hw->active_pkg_ver.major,
3684 hw->active_pkg_ver.minor,
3685 ICE_PKG_SUPP_VER_MAJ, ICE_PKG_SUPP_VER_MNR);
3686 *status = ICE_ERR_NOT_SUPPORTED;
3687 } else if (hw->active_pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
3688 hw->active_pkg_ver.minor == ICE_PKG_SUPP_VER_MNR) {
3689 dev_info(dev, "The driver could not load the DDP package file because a compatible DDP package is already present on the device. The device has package '%s' version %d.%d.%d.%d. The package file found by the driver: '%s' version %d.%d.%d.%d.\n",
3690 hw->active_pkg_name,
3691 hw->active_pkg_ver.major,
3692 hw->active_pkg_ver.minor,
3693 hw->active_pkg_ver.update,
3694 hw->active_pkg_ver.draft,
3695 hw->pkg_name,
3696 hw->pkg_ver.major,
3697 hw->pkg_ver.minor,
3698 hw->pkg_ver.update,
3699 hw->pkg_ver.draft);
3700 } else {
3701 dev_err(dev, "An unknown error occurred when loading the DDP package, please reboot the system. If the problem persists, update the NVM. Entering Safe Mode.\n");
3702 *status = ICE_ERR_NOT_SUPPORTED;
3703 }
3704 break;
3705 case ICE_ERR_FW_DDP_MISMATCH:
3706 dev_err(dev, "The firmware loaded on the device is not compatible with the DDP package. Please update the device's NVM. Entering safe mode.\n");
3707 break;
3708 case ICE_ERR_BUF_TOO_SHORT:
3709 case ICE_ERR_CFG:
3710 dev_err(dev, "The DDP package file is invalid. Entering Safe Mode.\n");
3711 break;
3712 case ICE_ERR_NOT_SUPPORTED:
3713
3714 if (hw->pkg_ver.major > ICE_PKG_SUPP_VER_MAJ ||
3715 (hw->pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
3716 hw->pkg_ver.minor > ICE_PKG_SUPP_VER_MNR))
3717 dev_err(dev, "The DDP package file version is higher than the driver supports. Please use an updated driver. Entering Safe Mode.\n");
3718 else if (hw->pkg_ver.major < ICE_PKG_SUPP_VER_MAJ ||
3719 (hw->pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
3720 hw->pkg_ver.minor < ICE_PKG_SUPP_VER_MNR))
3721 dev_err(dev, "The DDP package file version is lower than the driver supports. The driver requires version %d.%d.x.x. Please use an updated DDP Package file. Entering Safe Mode.\n",
3722 ICE_PKG_SUPP_VER_MAJ, ICE_PKG_SUPP_VER_MNR);
3723 break;
3724 case ICE_ERR_AQ_ERROR:
3725 switch (hw->pkg_dwnld_status) {
3726 case ICE_AQ_RC_ENOSEC:
3727 case ICE_AQ_RC_EBADSIG:
3728 dev_err(dev, "The DDP package could not be loaded because its signature is not valid. Please use a valid DDP Package. Entering Safe Mode.\n");
3729 return;
3730 case ICE_AQ_RC_ESVN:
3731 dev_err(dev, "The DDP Package could not be loaded because its security revision is too low. Please use an updated DDP Package. Entering Safe Mode.\n");
3732 return;
3733 case ICE_AQ_RC_EBADMAN:
3734 case ICE_AQ_RC_EBADBUF:
3735 dev_err(dev, "An error occurred on the device while loading the DDP package. The device will be reset.\n");
3736
3737 if (ice_check_reset(hw))
3738 dev_err(dev, "Error resetting device. Please reload the driver\n");
3739 return;
3740 default:
3741 break;
3742 }
3743 fallthrough;
3744 default:
3745 dev_err(dev, "An unknown error (%d) occurred when loading the DDP package. Entering Safe Mode.\n",
3746 *status);
3747 break;
3748 }
3749}
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759static void
3760ice_load_pkg(const struct firmware *firmware, struct ice_pf *pf)
3761{
3762 enum ice_status status = ICE_ERR_PARAM;
3763 struct device *dev = ice_pf_to_dev(pf);
3764 struct ice_hw *hw = &pf->hw;
3765
3766
3767 if (firmware && !hw->pkg_copy) {
3768 status = ice_copy_and_init_pkg(hw, firmware->data,
3769 firmware->size);
3770 ice_log_pkg_init(hw, &status);
3771 } else if (!firmware && hw->pkg_copy) {
3772
3773 status = ice_init_pkg(hw, hw->pkg_copy, hw->pkg_size);
3774 ice_log_pkg_init(hw, &status);
3775 } else {
3776 dev_err(dev, "The DDP package file failed to load. Entering Safe Mode.\n");
3777 }
3778
3779 if (status) {
3780
3781 clear_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
3782 return;
3783 }
3784
3785
3786
3787
3788 set_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
3789}
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799static void ice_verify_cacheline_size(struct ice_pf *pf)
3800{
3801 if (rd32(&pf->hw, GLPCI_CNF2) & GLPCI_CNF2_CACHELINE_SIZE_M)
3802 dev_warn(ice_pf_to_dev(pf), "%d Byte cache line assumption is invalid, driver may have Tx timeouts!\n",
3803 ICE_CACHE_LINE_BYTES);
3804}
3805
3806
3807
3808
3809
3810
3811
3812static enum ice_status ice_send_version(struct ice_pf *pf)
3813{
3814 struct ice_driver_ver dv;
3815
3816 dv.major_ver = 0xff;
3817 dv.minor_ver = 0xff;
3818 dv.build_ver = 0xff;
3819 dv.subbuild_ver = 0;
3820 strscpy((char *)dv.driver_string, UTS_RELEASE,
3821 sizeof(dv.driver_string));
3822 return ice_aq_send_driver_ver(&pf->hw, &dv, NULL);
3823}
3824
3825
3826
3827
3828
3829
3830
3831static int ice_init_fdir(struct ice_pf *pf)
3832{
3833 struct device *dev = ice_pf_to_dev(pf);
3834 struct ice_vsi *ctrl_vsi;
3835 int err;
3836
3837
3838
3839
3840 ctrl_vsi = ice_ctrl_vsi_setup(pf, pf->hw.port_info);
3841 if (!ctrl_vsi) {
3842 dev_dbg(dev, "could not create control VSI\n");
3843 return -ENOMEM;
3844 }
3845
3846 err = ice_vsi_open_ctrl(ctrl_vsi);
3847 if (err) {
3848 dev_dbg(dev, "could not open control VSI\n");
3849 goto err_vsi_open;
3850 }
3851
3852 mutex_init(&pf->hw.fdir_fltr_lock);
3853
3854 err = ice_fdir_create_dflt_rules(pf);
3855 if (err)
3856 goto err_fdir_rule;
3857
3858 return 0;
3859
3860err_fdir_rule:
3861 ice_fdir_release_flows(&pf->hw);
3862 ice_vsi_close(ctrl_vsi);
3863err_vsi_open:
3864 ice_vsi_release(ctrl_vsi);
3865 if (pf->ctrl_vsi_idx != ICE_NO_VSI) {
3866 pf->vsi[pf->ctrl_vsi_idx] = NULL;
3867 pf->ctrl_vsi_idx = ICE_NO_VSI;
3868 }
3869 return err;
3870}
3871
3872
3873
3874
3875
3876static char *ice_get_opt_fw_name(struct ice_pf *pf)
3877{
3878
3879
3880
3881 struct pci_dev *pdev = pf->pdev;
3882 char *opt_fw_filename;
3883 u64 dsn;
3884
3885
3886
3887
3888 dsn = pci_get_dsn(pdev);
3889 if (!dsn)
3890 return NULL;
3891
3892 opt_fw_filename = kzalloc(NAME_MAX, GFP_KERNEL);
3893 if (!opt_fw_filename)
3894 return NULL;
3895
3896 snprintf(opt_fw_filename, NAME_MAX, "%sice-%016llx.pkg",
3897 ICE_DDP_PKG_PATH, dsn);
3898
3899 return opt_fw_filename;
3900}
3901
3902
3903
3904
3905
3906static void ice_request_fw(struct ice_pf *pf)
3907{
3908 char *opt_fw_filename = ice_get_opt_fw_name(pf);
3909 const struct firmware *firmware = NULL;
3910 struct device *dev = ice_pf_to_dev(pf);
3911 int err = 0;
3912
3913
3914
3915
3916
3917 if (opt_fw_filename) {
3918 err = firmware_request_nowarn(&firmware, opt_fw_filename, dev);
3919 if (err) {
3920 kfree(opt_fw_filename);
3921 goto dflt_pkg_load;
3922 }
3923
3924
3925 ice_load_pkg(firmware, pf);
3926 kfree(opt_fw_filename);
3927 release_firmware(firmware);
3928 return;
3929 }
3930
3931dflt_pkg_load:
3932 err = request_firmware(&firmware, ICE_DDP_PKG_FILE, dev);
3933 if (err) {
3934 dev_err(dev, "The DDP package file was not found or could not be read. Entering Safe Mode\n");
3935 return;
3936 }
3937
3938
3939 ice_load_pkg(firmware, pf);
3940 release_firmware(firmware);
3941}
3942
3943
3944
3945
3946
3947static void ice_print_wake_reason(struct ice_pf *pf)
3948{
3949 u32 wus = pf->wakeup_reason;
3950 const char *wake_str;
3951
3952
3953 if (!wus)
3954 return;
3955
3956 if (wus & PFPM_WUS_LNKC_M)
3957 wake_str = "Link\n";
3958 else if (wus & PFPM_WUS_MAG_M)
3959 wake_str = "Magic Packet\n";
3960 else if (wus & PFPM_WUS_MNG_M)
3961 wake_str = "Management\n";
3962 else if (wus & PFPM_WUS_FW_RST_WK_M)
3963 wake_str = "Firmware Reset\n";
3964 else
3965 wake_str = "Unknown\n";
3966
3967 dev_info(ice_pf_to_dev(pf), "Wake reason: %s", wake_str);
3968}
3969
3970
3971
3972
3973
3974
3975
3976
3977static int
3978ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent)
3979{
3980 struct device *dev = &pdev->dev;
3981 struct ice_pf *pf;
3982 struct ice_hw *hw;
3983 int i, err;
3984
3985
3986
3987
3988 err = pcim_enable_device(pdev);
3989 if (err)
3990 return err;
3991
3992 err = pcim_iomap_regions(pdev, BIT(ICE_BAR0), pci_name(pdev));
3993 if (err) {
3994 dev_err(dev, "BAR0 I/O map error %d\n", err);
3995 return err;
3996 }
3997
3998 pf = ice_allocate_pf(dev);
3999 if (!pf)
4000 return -ENOMEM;
4001
4002
4003 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
4004 if (err)
4005 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
4006 if (err) {
4007 dev_err(dev, "DMA configuration failed: 0x%x\n", err);
4008 return err;
4009 }
4010
4011 pci_enable_pcie_error_reporting(pdev);
4012 pci_set_master(pdev);
4013
4014 pf->pdev = pdev;
4015 pci_set_drvdata(pdev, pf);
4016 set_bit(__ICE_DOWN, pf->state);
4017
4018 set_bit(__ICE_SERVICE_DIS, pf->state);
4019
4020 hw = &pf->hw;
4021 hw->hw_addr = pcim_iomap_table(pdev)[ICE_BAR0];
4022 pci_save_state(pdev);
4023
4024 hw->back = pf;
4025 hw->vendor_id = pdev->vendor;
4026 hw->device_id = pdev->device;
4027 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
4028 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4029 hw->subsystem_device_id = pdev->subsystem_device;
4030 hw->bus.device = PCI_SLOT(pdev->devfn);
4031 hw->bus.func = PCI_FUNC(pdev->devfn);
4032 ice_set_ctrlq_len(hw);
4033
4034 pf->msg_enable = netif_msg_init(debug, ICE_DFLT_NETIF_M);
4035
4036 err = ice_devlink_register(pf);
4037 if (err) {
4038 dev_err(dev, "ice_devlink_register failed: %d\n", err);
4039 goto err_exit_unroll;
4040 }
4041
4042#ifndef CONFIG_DYNAMIC_DEBUG
4043 if (debug < -1)
4044 hw->debug_mask = debug;
4045#endif
4046
4047 err = ice_init_hw(hw);
4048 if (err) {
4049 dev_err(dev, "ice_init_hw failed: %d\n", err);
4050 err = -EIO;
4051 goto err_exit_unroll;
4052 }
4053
4054 ice_request_fw(pf);
4055
4056
4057
4058
4059
4060 if (ice_is_safe_mode(pf)) {
4061 dev_err(dev, "Package download failed. Advanced features disabled - Device now in Safe Mode\n");
4062
4063
4064
4065
4066
4067 ice_set_safe_mode_caps(hw);
4068 }
4069
4070 err = ice_init_pf(pf);
4071 if (err) {
4072 dev_err(dev, "ice_init_pf failed: %d\n", err);
4073 goto err_init_pf_unroll;
4074 }
4075
4076 ice_devlink_init_regions(pf);
4077
4078 pf->hw.udp_tunnel_nic.set_port = ice_udp_tunnel_set_port;
4079 pf->hw.udp_tunnel_nic.unset_port = ice_udp_tunnel_unset_port;
4080 pf->hw.udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
4081 pf->hw.udp_tunnel_nic.shared = &pf->hw.udp_tunnel_shared;
4082 i = 0;
4083 if (pf->hw.tnl.valid_count[TNL_VXLAN]) {
4084 pf->hw.udp_tunnel_nic.tables[i].n_entries =
4085 pf->hw.tnl.valid_count[TNL_VXLAN];
4086 pf->hw.udp_tunnel_nic.tables[i].tunnel_types =
4087 UDP_TUNNEL_TYPE_VXLAN;
4088 i++;
4089 }
4090 if (pf->hw.tnl.valid_count[TNL_GENEVE]) {
4091 pf->hw.udp_tunnel_nic.tables[i].n_entries =
4092 pf->hw.tnl.valid_count[TNL_GENEVE];
4093 pf->hw.udp_tunnel_nic.tables[i].tunnel_types =
4094 UDP_TUNNEL_TYPE_GENEVE;
4095 i++;
4096 }
4097
4098 pf->num_alloc_vsi = hw->func_caps.guar_num_vsi;
4099 if (!pf->num_alloc_vsi) {
4100 err = -EIO;
4101 goto err_init_pf_unroll;
4102 }
4103 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
4104 dev_warn(&pf->pdev->dev,
4105 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
4106 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
4107 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
4108 }
4109
4110 pf->vsi = devm_kcalloc(dev, pf->num_alloc_vsi, sizeof(*pf->vsi),
4111 GFP_KERNEL);
4112 if (!pf->vsi) {
4113 err = -ENOMEM;
4114 goto err_init_pf_unroll;
4115 }
4116
4117 err = ice_init_interrupt_scheme(pf);
4118 if (err) {
4119 dev_err(dev, "ice_init_interrupt_scheme failed: %d\n", err);
4120 err = -EIO;
4121 goto err_init_vsi_unroll;
4122 }
4123
4124
4125
4126
4127
4128
4129 err = ice_req_irq_msix_misc(pf);
4130 if (err) {
4131 dev_err(dev, "setup of misc vector failed: %d\n", err);
4132 goto err_init_interrupt_unroll;
4133 }
4134
4135
4136 pf->first_sw = devm_kzalloc(dev, sizeof(*pf->first_sw), GFP_KERNEL);
4137 if (!pf->first_sw) {
4138 err = -ENOMEM;
4139 goto err_msix_misc_unroll;
4140 }
4141
4142 if (hw->evb_veb)
4143 pf->first_sw->bridge_mode = BRIDGE_MODE_VEB;
4144 else
4145 pf->first_sw->bridge_mode = BRIDGE_MODE_VEPA;
4146
4147 pf->first_sw->pf = pf;
4148
4149
4150 pf->first_sw->sw_id = hw->port_info->sw_id;
4151
4152 err = ice_setup_pf_sw(pf);
4153 if (err) {
4154 dev_err(dev, "probe failed due to setup PF switch: %d\n", err);
4155 goto err_alloc_sw_unroll;
4156 }
4157
4158 clear_bit(__ICE_SERVICE_DIS, pf->state);
4159
4160
4161 err = ice_send_version(pf);
4162 if (err) {
4163 dev_err(dev, "probe failed sending driver version %s. error: %d\n",
4164 UTS_RELEASE, err);
4165 goto err_send_version_unroll;
4166 }
4167
4168
4169 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
4170
4171 err = ice_init_link_events(pf->hw.port_info);
4172 if (err) {
4173 dev_err(dev, "ice_init_link_events failed: %d\n", err);
4174 goto err_send_version_unroll;
4175 }
4176
4177 err = ice_init_nvm_phy_type(pf->hw.port_info);
4178 if (err) {
4179 dev_err(dev, "ice_init_nvm_phy_type failed: %d\n", err);
4180 goto err_send_version_unroll;
4181 }
4182
4183 err = ice_update_link_info(pf->hw.port_info);
4184 if (err) {
4185 dev_err(dev, "ice_update_link_info failed: %d\n", err);
4186 goto err_send_version_unroll;
4187 }
4188
4189 ice_init_link_dflt_override(pf->hw.port_info);
4190
4191
4192 if (pf->hw.port_info->phy.link_info.link_info &
4193 ICE_AQ_MEDIA_AVAILABLE) {
4194 err = ice_init_phy_user_cfg(pf->hw.port_info);
4195 if (err) {
4196 dev_err(dev, "ice_init_phy_user_cfg failed: %d\n", err);
4197 goto err_send_version_unroll;
4198 }
4199
4200 if (!test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags)) {
4201 struct ice_vsi *vsi = ice_get_main_vsi(pf);
4202
4203 if (vsi)
4204 ice_configure_phy(vsi);
4205 }
4206 } else {
4207 set_bit(ICE_FLAG_NO_MEDIA, pf->flags);
4208 }
4209
4210 ice_verify_cacheline_size(pf);
4211
4212
4213 pf->wakeup_reason = rd32(hw, PFPM_WUS);
4214
4215
4216 ice_print_wake_reason(pf);
4217
4218
4219 wr32(hw, PFPM_WUS, U32_MAX);
4220
4221
4222 device_set_wakeup_enable(dev, false);
4223
4224 if (ice_is_safe_mode(pf)) {
4225 ice_set_safe_mode_vlan_cfg(pf);
4226 goto probe_done;
4227 }
4228
4229
4230
4231
4232 if (ice_init_fdir(pf))
4233 dev_err(dev, "could not initialize flow director\n");
4234
4235
4236 if (ice_init_pf_dcb(pf, false)) {
4237 clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
4238 clear_bit(ICE_FLAG_DCB_ENA, pf->flags);
4239 } else {
4240 ice_cfg_lldp_mib_change(&pf->hw, true);
4241 }
4242
4243
4244 pcie_print_link_status(pf->pdev);
4245
4246probe_done:
4247
4248 clear_bit(__ICE_DOWN, pf->state);
4249 return 0;
4250
4251err_send_version_unroll:
4252 ice_vsi_release_all(pf);
4253err_alloc_sw_unroll:
4254 set_bit(__ICE_SERVICE_DIS, pf->state);
4255 set_bit(__ICE_DOWN, pf->state);
4256 devm_kfree(dev, pf->first_sw);
4257err_msix_misc_unroll:
4258 ice_free_irq_msix_misc(pf);
4259err_init_interrupt_unroll:
4260 ice_clear_interrupt_scheme(pf);
4261err_init_vsi_unroll:
4262 devm_kfree(dev, pf->vsi);
4263err_init_pf_unroll:
4264 ice_deinit_pf(pf);
4265 ice_devlink_destroy_regions(pf);
4266 ice_deinit_hw(hw);
4267err_exit_unroll:
4268 ice_devlink_unregister(pf);
4269 pci_disable_pcie_error_reporting(pdev);
4270 pci_disable_device(pdev);
4271 return err;
4272}
4273
4274
4275
4276
4277
4278
4279
4280static void ice_set_wake(struct ice_pf *pf)
4281{
4282 struct ice_hw *hw = &pf->hw;
4283 bool wol = pf->wol_ena;
4284
4285
4286 wr32(hw, PFPM_WUS, U32_MAX);
4287
4288
4289 wr32(hw, PFPM_APM, wol ? PFPM_APM_APME_M : 0);
4290
4291
4292 wr32(hw, PFPM_WUFC, wol ? PFPM_WUFC_MAG_M : 0);
4293}
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303static void ice_setup_mc_magic_wake(struct ice_pf *pf)
4304{
4305 struct device *dev = ice_pf_to_dev(pf);
4306 struct ice_hw *hw = &pf->hw;
4307 enum ice_status status;
4308 u8 mac_addr[ETH_ALEN];
4309 struct ice_vsi *vsi;
4310 u8 flags;
4311
4312 if (!pf->wol_ena)
4313 return;
4314
4315 vsi = ice_get_main_vsi(pf);
4316 if (!vsi)
4317 return;
4318
4319
4320 if (vsi->netdev)
4321 ether_addr_copy(mac_addr, vsi->netdev->dev_addr);
4322 else
4323 ether_addr_copy(mac_addr, vsi->port_info->mac.perm_addr);
4324
4325 flags = ICE_AQC_MAN_MAC_WR_MC_MAG_EN |
4326 ICE_AQC_MAN_MAC_UPDATE_LAA_WOL |
4327 ICE_AQC_MAN_MAC_WR_WOL_LAA_PFR_KEEP;
4328
4329 status = ice_aq_manage_mac_write(hw, mac_addr, flags, NULL);
4330 if (status)
4331 dev_err(dev, "Failed to enable Multicast Magic Packet wake, err %s aq_err %s\n",
4332 ice_stat_str(status),
4333 ice_aq_str(hw->adminq.sq_last_status));
4334}
4335
4336
4337
4338
4339
4340static void ice_remove(struct pci_dev *pdev)
4341{
4342 struct ice_pf *pf = pci_get_drvdata(pdev);
4343 int i;
4344
4345 if (!pf)
4346 return;
4347
4348 for (i = 0; i < ICE_MAX_RESET_WAIT; i++) {
4349 if (!ice_is_reset_in_progress(pf->state))
4350 break;
4351 msleep(100);
4352 }
4353
4354 if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) {
4355 set_bit(__ICE_VF_RESETS_DISABLED, pf->state);
4356 ice_free_vfs(pf);
4357 }
4358
4359 set_bit(__ICE_DOWN, pf->state);
4360 ice_service_task_stop(pf);
4361
4362 ice_aq_cancel_waiting_tasks(pf);
4363
4364 mutex_destroy(&(&pf->hw)->fdir_fltr_lock);
4365 if (!ice_is_safe_mode(pf))
4366 ice_remove_arfs(pf);
4367 ice_setup_mc_magic_wake(pf);
4368 ice_vsi_release_all(pf);
4369 ice_set_wake(pf);
4370 ice_free_irq_msix_misc(pf);
4371 ice_for_each_vsi(pf, i) {
4372 if (!pf->vsi[i])
4373 continue;
4374 ice_vsi_free_q_vectors(pf->vsi[i]);
4375 }
4376 ice_deinit_pf(pf);
4377 ice_devlink_destroy_regions(pf);
4378 ice_deinit_hw(&pf->hw);
4379 ice_devlink_unregister(pf);
4380
4381
4382
4383
4384
4385 ice_reset(&pf->hw, ICE_RESET_PFR);
4386 pci_wait_for_pending_transaction(pdev);
4387 ice_clear_interrupt_scheme(pf);
4388 pci_disable_pcie_error_reporting(pdev);
4389 pci_disable_device(pdev);
4390}
4391
4392
4393
4394
4395
4396static void ice_shutdown(struct pci_dev *pdev)
4397{
4398 struct ice_pf *pf = pci_get_drvdata(pdev);
4399
4400 ice_remove(pdev);
4401
4402 if (system_state == SYSTEM_POWER_OFF) {
4403 pci_wake_from_d3(pdev, pf->wol_ena);
4404 pci_set_power_state(pdev, PCI_D3hot);
4405 }
4406}
4407
4408#ifdef CONFIG_PM
4409
4410
4411
4412
4413
4414
4415static void ice_prepare_for_shutdown(struct ice_pf *pf)
4416{
4417 struct ice_hw *hw = &pf->hw;
4418 u32 v;
4419
4420
4421 if (ice_check_sq_alive(hw, &hw->mailboxq))
4422 ice_vc_notify_reset(pf);
4423
4424 dev_dbg(ice_pf_to_dev(pf), "Tearing down internal switch for shutdown\n");
4425
4426
4427 ice_pf_dis_all_vsi(pf, false);
4428
4429 ice_for_each_vsi(pf, v)
4430 if (pf->vsi[v])
4431 pf->vsi[v]->vsi_num = 0;
4432
4433 ice_shutdown_all_ctrlq(hw);
4434}
4435
4436
4437
4438
4439
4440
4441
4442
4443
4444
4445
4446static int ice_reinit_interrupt_scheme(struct ice_pf *pf)
4447{
4448 struct device *dev = ice_pf_to_dev(pf);
4449 int ret, v;
4450
4451
4452
4453
4454
4455 ret = ice_init_interrupt_scheme(pf);
4456 if (ret) {
4457 dev_err(dev, "Failed to re-initialize interrupt %d\n", ret);
4458 return ret;
4459 }
4460
4461
4462 ice_for_each_vsi(pf, v) {
4463 if (!pf->vsi[v])
4464 continue;
4465
4466 ret = ice_vsi_alloc_q_vectors(pf->vsi[v]);
4467 if (ret)
4468 goto err_reinit;
4469 ice_vsi_map_rings_to_vectors(pf->vsi[v]);
4470 }
4471
4472 ret = ice_req_irq_msix_misc(pf);
4473 if (ret) {
4474 dev_err(dev, "Setting up misc vector failed after device suspend %d\n",
4475 ret);
4476 goto err_reinit;
4477 }
4478
4479 return 0;
4480
4481err_reinit:
4482 while (v--)
4483 if (pf->vsi[v])
4484 ice_vsi_free_q_vectors(pf->vsi[v]);
4485
4486 return ret;
4487}
4488
4489
4490
4491
4492
4493
4494
4495
4496static int __maybe_unused ice_suspend(struct device *dev)
4497{
4498 struct pci_dev *pdev = to_pci_dev(dev);
4499 struct ice_pf *pf;
4500 int disabled, v;
4501
4502 pf = pci_get_drvdata(pdev);
4503
4504 if (!ice_pf_state_is_nominal(pf)) {
4505 dev_err(dev, "Device is not ready, no need to suspend it\n");
4506 return -EBUSY;
4507 }
4508
4509
4510
4511
4512
4513
4514
4515 disabled = ice_service_task_stop(pf);
4516
4517
4518 if (test_and_set_bit(__ICE_SUSPENDED, pf->state)) {
4519 if (!disabled)
4520 ice_service_task_restart(pf);
4521 return 0;
4522 }
4523
4524 if (test_bit(__ICE_DOWN, pf->state) ||
4525 ice_is_reset_in_progress(pf->state)) {
4526 dev_err(dev, "can't suspend device in reset or already down\n");
4527 if (!disabled)
4528 ice_service_task_restart(pf);
4529 return 0;
4530 }
4531
4532 ice_setup_mc_magic_wake(pf);
4533
4534 ice_prepare_for_shutdown(pf);
4535
4536 ice_set_wake(pf);
4537
4538
4539
4540
4541
4542
4543 ice_free_irq_msix_misc(pf);
4544 ice_for_each_vsi(pf, v) {
4545 if (!pf->vsi[v])
4546 continue;
4547 ice_vsi_free_q_vectors(pf->vsi[v]);
4548 }
4549 ice_clear_interrupt_scheme(pf);
4550
4551 pci_save_state(pdev);
4552 pci_wake_from_d3(pdev, pf->wol_ena);
4553 pci_set_power_state(pdev, PCI_D3hot);
4554 return 0;
4555}
4556
4557
4558
4559
4560
4561static int __maybe_unused ice_resume(struct device *dev)
4562{
4563 struct pci_dev *pdev = to_pci_dev(dev);
4564 enum ice_reset_req reset_type;
4565 struct ice_pf *pf;
4566 struct ice_hw *hw;
4567 int ret;
4568
4569 pci_set_power_state(pdev, PCI_D0);
4570 pci_restore_state(pdev);
4571 pci_save_state(pdev);
4572
4573 if (!pci_device_is_present(pdev))
4574 return -ENODEV;
4575
4576 ret = pci_enable_device_mem(pdev);
4577 if (ret) {
4578 dev_err(dev, "Cannot enable device after suspend\n");
4579 return ret;
4580 }
4581
4582 pf = pci_get_drvdata(pdev);
4583 hw = &pf->hw;
4584
4585 pf->wakeup_reason = rd32(hw, PFPM_WUS);
4586 ice_print_wake_reason(pf);
4587
4588
4589
4590
4591 ret = ice_reinit_interrupt_scheme(pf);
4592 if (ret)
4593 dev_err(dev, "Cannot restore interrupt scheme: %d\n", ret);
4594
4595 clear_bit(__ICE_DOWN, pf->state);
4596
4597 reset_type = ICE_RESET_PFR;
4598
4599 clear_bit(__ICE_SERVICE_DIS, pf->state);
4600
4601 if (ice_schedule_reset(pf, reset_type))
4602 dev_err(dev, "Reset during resume failed.\n");
4603
4604 clear_bit(__ICE_SUSPENDED, pf->state);
4605 ice_service_task_restart(pf);
4606
4607
4608 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
4609
4610 return 0;
4611}
4612#endif
4613
4614
4615
4616
4617
4618
4619
4620
4621
4622static pci_ers_result_t
4623ice_pci_err_detected(struct pci_dev *pdev, pci_channel_state_t err)
4624{
4625 struct ice_pf *pf = pci_get_drvdata(pdev);
4626
4627 if (!pf) {
4628 dev_err(&pdev->dev, "%s: unrecoverable device error %d\n",
4629 __func__, err);
4630 return PCI_ERS_RESULT_DISCONNECT;
4631 }
4632
4633 if (!test_bit(__ICE_SUSPENDED, pf->state)) {
4634 ice_service_task_stop(pf);
4635
4636 if (!test_bit(__ICE_PREPARED_FOR_RESET, pf->state)) {
4637 set_bit(__ICE_PFR_REQ, pf->state);
4638 ice_prepare_for_reset(pf);
4639 }
4640 }
4641
4642 return PCI_ERS_RESULT_NEED_RESET;
4643}
4644
4645
4646
4647
4648
4649
4650
4651
4652static pci_ers_result_t ice_pci_err_slot_reset(struct pci_dev *pdev)
4653{
4654 struct ice_pf *pf = pci_get_drvdata(pdev);
4655 pci_ers_result_t result;
4656 int err;
4657 u32 reg;
4658
4659 err = pci_enable_device_mem(pdev);
4660 if (err) {
4661 dev_err(&pdev->dev, "Cannot re-enable PCI device after reset, error %d\n",
4662 err);
4663 result = PCI_ERS_RESULT_DISCONNECT;
4664 } else {
4665 pci_set_master(pdev);
4666 pci_restore_state(pdev);
4667 pci_save_state(pdev);
4668 pci_wake_from_d3(pdev, false);
4669
4670
4671 reg = rd32(&pf->hw, GLGEN_RTRIG);
4672 if (!reg)
4673 result = PCI_ERS_RESULT_RECOVERED;
4674 else
4675 result = PCI_ERS_RESULT_DISCONNECT;
4676 }
4677
4678 err = pci_aer_clear_nonfatal_status(pdev);
4679 if (err)
4680 dev_dbg(&pdev->dev, "pci_aer_clear_nonfatal_status() failed, error %d\n",
4681 err);
4682
4683
4684 return result;
4685}
4686
4687
4688
4689
4690
4691
4692
4693
4694static void ice_pci_err_resume(struct pci_dev *pdev)
4695{
4696 struct ice_pf *pf = pci_get_drvdata(pdev);
4697
4698 if (!pf) {
4699 dev_err(&pdev->dev, "%s failed, device is unrecoverable\n",
4700 __func__);
4701 return;
4702 }
4703
4704 if (test_bit(__ICE_SUSPENDED, pf->state)) {
4705 dev_dbg(&pdev->dev, "%s failed to resume normal operations!\n",
4706 __func__);
4707 return;
4708 }
4709
4710 ice_restore_all_vfs_msi_state(pdev);
4711
4712 ice_do_reset(pf, ICE_RESET_PFR);
4713 ice_service_task_restart(pf);
4714 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
4715}
4716
4717
4718
4719
4720
4721static void ice_pci_err_reset_prepare(struct pci_dev *pdev)
4722{
4723 struct ice_pf *pf = pci_get_drvdata(pdev);
4724
4725 if (!test_bit(__ICE_SUSPENDED, pf->state)) {
4726 ice_service_task_stop(pf);
4727
4728 if (!test_bit(__ICE_PREPARED_FOR_RESET, pf->state)) {
4729 set_bit(__ICE_PFR_REQ, pf->state);
4730 ice_prepare_for_reset(pf);
4731 }
4732 }
4733}
4734
4735
4736
4737
4738
4739static void ice_pci_err_reset_done(struct pci_dev *pdev)
4740{
4741 ice_pci_err_resume(pdev);
4742}
4743
4744
4745
4746
4747
4748
4749
4750
4751
4752static const struct pci_device_id ice_pci_tbl[] = {
4753 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_BACKPLANE), 0 },
4754 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_QSFP), 0 },
4755 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_SFP), 0 },
4756 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810_XXV_SFP), 0 },
4757 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_BACKPLANE), 0 },
4758 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_QSFP), 0 },
4759 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SFP), 0 },
4760 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_10G_BASE_T), 0 },
4761 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823C_SGMII), 0 },
4762 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_BACKPLANE), 0 },
4763 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_QSFP), 0 },
4764 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SFP), 0 },
4765 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_10G_BASE_T), 0 },
4766 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822C_SGMII), 0 },
4767 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_BACKPLANE), 0 },
4768 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SFP), 0 },
4769 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_10G_BASE_T), 0 },
4770 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E822L_SGMII), 0 },
4771 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_BACKPLANE), 0 },
4772 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_SFP), 0 },
4773 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_10G_BASE_T), 0 },
4774 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_1GBE), 0 },
4775 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E823L_QSFP), 0 },
4776
4777 { 0, }
4778};
4779MODULE_DEVICE_TABLE(pci, ice_pci_tbl);
4780
4781static __maybe_unused SIMPLE_DEV_PM_OPS(ice_pm_ops, ice_suspend, ice_resume);
4782
4783static const struct pci_error_handlers ice_pci_err_handler = {
4784 .error_detected = ice_pci_err_detected,
4785 .slot_reset = ice_pci_err_slot_reset,
4786 .reset_prepare = ice_pci_err_reset_prepare,
4787 .reset_done = ice_pci_err_reset_done,
4788 .resume = ice_pci_err_resume
4789};
4790
4791static struct pci_driver ice_driver = {
4792 .name = KBUILD_MODNAME,
4793 .id_table = ice_pci_tbl,
4794 .probe = ice_probe,
4795 .remove = ice_remove,
4796#ifdef CONFIG_PM
4797 .driver.pm = &ice_pm_ops,
4798#endif
4799 .shutdown = ice_shutdown,
4800 .sriov_configure = ice_sriov_configure,
4801 .err_handler = &ice_pci_err_handler
4802};
4803
4804
4805
4806
4807
4808
4809
4810static int __init ice_module_init(void)
4811{
4812 int status;
4813
4814 pr_info("%s\n", ice_driver_string);
4815 pr_info("%s\n", ice_copyright);
4816
4817 ice_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, KBUILD_MODNAME);
4818 if (!ice_wq) {
4819 pr_err("Failed to create workqueue\n");
4820 return -ENOMEM;
4821 }
4822
4823 status = pci_register_driver(&ice_driver);
4824 if (status) {
4825 pr_err("failed to register PCI driver, err %d\n", status);
4826 destroy_workqueue(ice_wq);
4827 }
4828
4829 return status;
4830}
4831module_init(ice_module_init);
4832
4833
4834
4835
4836
4837
4838
4839static void __exit ice_module_exit(void)
4840{
4841 pci_unregister_driver(&ice_driver);
4842 destroy_workqueue(ice_wq);
4843 pr_info("module unloaded\n");
4844}
4845module_exit(ice_module_exit);
4846
4847
4848
4849
4850
4851
4852
4853
4854static int ice_set_mac_address(struct net_device *netdev, void *pi)
4855{
4856 struct ice_netdev_priv *np = netdev_priv(netdev);
4857 struct ice_vsi *vsi = np->vsi;
4858 struct ice_pf *pf = vsi->back;
4859 struct ice_hw *hw = &pf->hw;
4860 struct sockaddr *addr = pi;
4861 enum ice_status status;
4862 u8 flags = 0;
4863 int err = 0;
4864 u8 *mac;
4865
4866 mac = (u8 *)addr->sa_data;
4867
4868 if (!is_valid_ether_addr(mac))
4869 return -EADDRNOTAVAIL;
4870
4871 if (ether_addr_equal(netdev->dev_addr, mac)) {
4872 netdev_warn(netdev, "already using mac %pM\n", mac);
4873 return 0;
4874 }
4875
4876 if (test_bit(__ICE_DOWN, pf->state) ||
4877 ice_is_reset_in_progress(pf->state)) {
4878 netdev_err(netdev, "can't set mac %pM. device not ready\n",
4879 mac);
4880 return -EBUSY;
4881 }
4882
4883
4884 status = ice_fltr_remove_mac(vsi, netdev->dev_addr, ICE_FWD_TO_VSI);
4885 if (status && status != ICE_ERR_DOES_NOT_EXIST) {
4886 err = -EADDRNOTAVAIL;
4887 goto err_update_filters;
4888 }
4889
4890
4891 status = ice_fltr_add_mac(vsi, mac, ICE_FWD_TO_VSI);
4892 if (status == ICE_ERR_ALREADY_EXISTS) {
4893 netdev_dbg(netdev, "filter for MAC %pM already exists\n", mac);
4894 return 0;
4895 }
4896
4897
4898 if (status)
4899 err = -EADDRNOTAVAIL;
4900
4901err_update_filters:
4902 if (err) {
4903 netdev_err(netdev, "can't set MAC %pM. filter update failed\n",
4904 mac);
4905 return err;
4906 }
4907
4908
4909 memcpy(netdev->dev_addr, mac, netdev->addr_len);
4910 netdev_dbg(vsi->netdev, "updated MAC address to %pM\n",
4911 netdev->dev_addr);
4912
4913
4914 flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL;
4915 status = ice_aq_manage_mac_write(hw, mac, flags, NULL);
4916 if (status) {
4917 netdev_err(netdev, "can't set MAC %pM. write to firmware failed error %s\n",
4918 mac, ice_stat_str(status));
4919 }
4920 return 0;
4921}
4922
4923
4924
4925
4926
4927static void ice_set_rx_mode(struct net_device *netdev)
4928{
4929 struct ice_netdev_priv *np = netdev_priv(netdev);
4930 struct ice_vsi *vsi = np->vsi;
4931
4932 if (!vsi)
4933 return;
4934
4935
4936
4937
4938
4939 set_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags);
4940 set_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags);
4941 set_bit(ICE_FLAG_FLTR_SYNC, vsi->back->flags);
4942
4943
4944
4945
4946 ice_service_task_schedule(vsi->back);
4947}
4948
4949
4950
4951
4952
4953
4954
4955static int
4956ice_set_tx_maxrate(struct net_device *netdev, int queue_index, u32 maxrate)
4957{
4958 struct ice_netdev_priv *np = netdev_priv(netdev);
4959 struct ice_vsi *vsi = np->vsi;
4960 enum ice_status status;
4961 u16 q_handle;
4962 u8 tc;
4963
4964
4965 if (maxrate && (maxrate > (ICE_SCHED_MAX_BW / 1000))) {
4966 netdev_err(netdev, "Invalid max rate %d specified for the queue %d\n",
4967 maxrate, queue_index);
4968 return -EINVAL;
4969 }
4970
4971 q_handle = vsi->tx_rings[queue_index]->q_handle;
4972 tc = ice_dcb_get_tc(vsi, queue_index);
4973
4974
4975 if (!maxrate)
4976 status = ice_cfg_q_bw_dflt_lmt(vsi->port_info, vsi->idx, tc,
4977 q_handle, ICE_MAX_BW);
4978 else
4979 status = ice_cfg_q_bw_lmt(vsi->port_info, vsi->idx, tc,
4980 q_handle, ICE_MAX_BW, maxrate * 1000);
4981 if (status) {
4982 netdev_err(netdev, "Unable to set Tx max rate, error %s\n",
4983 ice_stat_str(status));
4984 return -EIO;
4985 }
4986
4987 return 0;
4988}
4989
4990
4991
4992
4993
4994
4995
4996
4997
4998
4999
5000static int
5001ice_fdb_add(struct ndmsg *ndm, struct nlattr __always_unused *tb[],
5002 struct net_device *dev, const unsigned char *addr, u16 vid,
5003 u16 flags, struct netlink_ext_ack __always_unused *extack)
5004{
5005 int err;
5006
5007 if (vid) {
5008 netdev_err(dev, "VLANs aren't supported yet for dev_uc|mc_add()\n");
5009 return -EINVAL;
5010 }
5011 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
5012 netdev_err(dev, "FDB only supports static addresses\n");
5013 return -EINVAL;
5014 }
5015
5016 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
5017 err = dev_uc_add_excl(dev, addr);
5018 else if (is_multicast_ether_addr(addr))
5019 err = dev_mc_add_excl(dev, addr);
5020 else
5021 err = -EINVAL;
5022
5023
5024 if (err == -EEXIST && !(flags & NLM_F_EXCL))
5025 err = 0;
5026
5027 return err;
5028}
5029
5030
5031
5032
5033
5034
5035
5036
5037
5038static int
5039ice_fdb_del(struct ndmsg *ndm, __always_unused struct nlattr *tb[],
5040 struct net_device *dev, const unsigned char *addr,
5041 __always_unused u16 vid)
5042{
5043 int err;
5044
5045 if (ndm->ndm_state & NUD_PERMANENT) {
5046 netdev_err(dev, "FDB only supports static addresses\n");
5047 return -EINVAL;
5048 }
5049
5050 if (is_unicast_ether_addr(addr))
5051 err = dev_uc_del(dev, addr);
5052 else if (is_multicast_ether_addr(addr))
5053 err = dev_mc_del(dev, addr);
5054 else
5055 err = -EINVAL;
5056
5057 return err;
5058}
5059
5060
5061
5062
5063
5064
5065static int
5066ice_set_features(struct net_device *netdev, netdev_features_t features)
5067{
5068 struct ice_netdev_priv *np = netdev_priv(netdev);
5069 struct ice_vsi *vsi = np->vsi;
5070 struct ice_pf *pf = vsi->back;
5071 int ret = 0;
5072
5073
5074 if (ice_is_safe_mode(vsi->back)) {
5075 dev_err(ice_pf_to_dev(vsi->back), "Device is in Safe Mode - not enabling advanced netdev features\n");
5076 return ret;
5077 }
5078
5079
5080 if (ice_is_reset_in_progress(pf->state)) {
5081 dev_err(ice_pf_to_dev(vsi->back), "Device is resetting, changing advanced netdev features temporarily unavailable.\n");
5082 return -EBUSY;
5083 }
5084
5085
5086
5087
5088 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
5089 ret = ice_vsi_manage_rss_lut(vsi, true);
5090 else if (!(features & NETIF_F_RXHASH) &&
5091 netdev->features & NETIF_F_RXHASH)
5092 ret = ice_vsi_manage_rss_lut(vsi, false);
5093
5094 if ((features & NETIF_F_HW_VLAN_CTAG_RX) &&
5095 !(netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
5096 ret = ice_vsi_manage_vlan_stripping(vsi, true);
5097 else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) &&
5098 (netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
5099 ret = ice_vsi_manage_vlan_stripping(vsi, false);
5100
5101 if ((features & NETIF_F_HW_VLAN_CTAG_TX) &&
5102 !(netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
5103 ret = ice_vsi_manage_vlan_insertion(vsi);
5104 else if (!(features & NETIF_F_HW_VLAN_CTAG_TX) &&
5105 (netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
5106 ret = ice_vsi_manage_vlan_insertion(vsi);
5107
5108 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) &&
5109 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER))
5110 ret = ice_cfg_vlan_pruning(vsi, true, false);
5111 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) &&
5112 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER))
5113 ret = ice_cfg_vlan_pruning(vsi, false, false);
5114
5115 if ((features & NETIF_F_NTUPLE) &&
5116 !(netdev->features & NETIF_F_NTUPLE)) {
5117 ice_vsi_manage_fdir(vsi, true);
5118 ice_init_arfs(vsi);
5119 } else if (!(features & NETIF_F_NTUPLE) &&
5120 (netdev->features & NETIF_F_NTUPLE)) {
5121 ice_vsi_manage_fdir(vsi, false);
5122 ice_clear_arfs(vsi);
5123 }
5124
5125 return ret;
5126}
5127
5128
5129
5130
5131
5132static int ice_vsi_vlan_setup(struct ice_vsi *vsi)
5133{
5134 int ret = 0;
5135
5136 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
5137 ret = ice_vsi_manage_vlan_stripping(vsi, true);
5138 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_TX)
5139 ret = ice_vsi_manage_vlan_insertion(vsi);
5140
5141 return ret;
5142}
5143
5144
5145
5146
5147
5148
5149
5150int ice_vsi_cfg(struct ice_vsi *vsi)
5151{
5152 int err;
5153
5154 if (vsi->netdev) {
5155 ice_set_rx_mode(vsi->netdev);
5156
5157 err = ice_vsi_vlan_setup(vsi);
5158
5159 if (err)
5160 return err;
5161 }
5162 ice_vsi_cfg_dcb_rings(vsi);
5163
5164 err = ice_vsi_cfg_lan_txqs(vsi);
5165 if (!err && ice_is_xdp_ena_vsi(vsi))
5166 err = ice_vsi_cfg_xdp_txqs(vsi);
5167 if (!err)
5168 err = ice_vsi_cfg_rxqs(vsi);
5169
5170 return err;
5171}
5172
5173
5174
5175
5176
5177static void ice_napi_enable_all(struct ice_vsi *vsi)
5178{
5179 int q_idx;
5180
5181 if (!vsi->netdev)
5182 return;
5183
5184 ice_for_each_q_vector(vsi, q_idx) {
5185 struct ice_q_vector *q_vector = vsi->q_vectors[q_idx];
5186
5187 if (q_vector->rx.ring || q_vector->tx.ring)
5188 napi_enable(&q_vector->napi);
5189 }
5190}
5191
5192
5193
5194
5195
5196
5197
5198static int ice_up_complete(struct ice_vsi *vsi)
5199{
5200 struct ice_pf *pf = vsi->back;
5201 int err;
5202
5203 ice_vsi_cfg_msix(vsi);
5204
5205
5206
5207
5208
5209 err = ice_vsi_start_all_rx_rings(vsi);
5210 if (err)
5211 return err;
5212
5213 clear_bit(__ICE_DOWN, vsi->state);
5214 ice_napi_enable_all(vsi);
5215 ice_vsi_ena_irq(vsi);
5216
5217 if (vsi->port_info &&
5218 (vsi->port_info->phy.link_info.link_info & ICE_AQ_LINK_UP) &&
5219 vsi->netdev) {
5220 ice_print_link_msg(vsi, true);
5221 netif_tx_start_all_queues(vsi->netdev);
5222 netif_carrier_on(vsi->netdev);
5223 }
5224
5225 ice_service_task_schedule(pf);
5226
5227 return 0;
5228}
5229
5230
5231
5232
5233
5234int ice_up(struct ice_vsi *vsi)
5235{
5236 int err;
5237
5238 err = ice_vsi_cfg(vsi);
5239 if (!err)
5240 err = ice_up_complete(vsi);
5241
5242 return err;
5243}
5244
5245
5246
5247
5248
5249
5250
5251
5252
5253
5254static void
5255ice_fetch_u64_stats_per_ring(struct ice_ring *ring, u64 *pkts, u64 *bytes)
5256{
5257 unsigned int start;
5258 *pkts = 0;
5259 *bytes = 0;
5260
5261 if (!ring)
5262 return;
5263 do {
5264 start = u64_stats_fetch_begin_irq(&ring->syncp);
5265 *pkts = ring->stats.pkts;
5266 *bytes = ring->stats.bytes;
5267 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
5268}
5269
5270
5271
5272
5273
5274
5275
5276static void
5277ice_update_vsi_tx_ring_stats(struct ice_vsi *vsi, struct ice_ring **rings,
5278 u16 count)
5279{
5280 struct rtnl_link_stats64 *vsi_stats = &vsi->net_stats;
5281 u16 i;
5282
5283 for (i = 0; i < count; i++) {
5284 struct ice_ring *ring;
5285 u64 pkts, bytes;
5286
5287 ring = READ_ONCE(rings[i]);
5288 ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
5289 vsi_stats->tx_packets += pkts;
5290 vsi_stats->tx_bytes += bytes;
5291 vsi->tx_restart += ring->tx_stats.restart_q;
5292 vsi->tx_busy += ring->tx_stats.tx_busy;
5293 vsi->tx_linearize += ring->tx_stats.tx_linearize;
5294 }
5295}
5296
5297
5298
5299
5300
5301static void ice_update_vsi_ring_stats(struct ice_vsi *vsi)
5302{
5303 struct rtnl_link_stats64 *vsi_stats = &vsi->net_stats;
5304 struct ice_ring *ring;
5305 u64 pkts, bytes;
5306 int i;
5307
5308
5309 vsi_stats->tx_packets = 0;
5310 vsi_stats->tx_bytes = 0;
5311 vsi_stats->rx_packets = 0;
5312 vsi_stats->rx_bytes = 0;
5313
5314
5315 vsi->tx_restart = 0;
5316 vsi->tx_busy = 0;
5317 vsi->tx_linearize = 0;
5318 vsi->rx_buf_failed = 0;
5319 vsi->rx_page_failed = 0;
5320 vsi->rx_gro_dropped = 0;
5321
5322 rcu_read_lock();
5323
5324
5325 ice_update_vsi_tx_ring_stats(vsi, vsi->tx_rings, vsi->num_txq);
5326
5327
5328 ice_for_each_rxq(vsi, i) {
5329 ring = READ_ONCE(vsi->rx_rings[i]);
5330 ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
5331 vsi_stats->rx_packets += pkts;
5332 vsi_stats->rx_bytes += bytes;
5333 vsi->rx_buf_failed += ring->rx_stats.alloc_buf_failed;
5334 vsi->rx_page_failed += ring->rx_stats.alloc_page_failed;
5335 vsi->rx_gro_dropped += ring->rx_stats.gro_dropped;
5336 }
5337
5338
5339 if (ice_is_xdp_ena_vsi(vsi))
5340 ice_update_vsi_tx_ring_stats(vsi, vsi->xdp_rings,
5341 vsi->num_xdp_txq);
5342
5343 rcu_read_unlock();
5344}
5345
5346
5347
5348
5349
5350void ice_update_vsi_stats(struct ice_vsi *vsi)
5351{
5352 struct rtnl_link_stats64 *cur_ns = &vsi->net_stats;
5353 struct ice_eth_stats *cur_es = &vsi->eth_stats;
5354 struct ice_pf *pf = vsi->back;
5355
5356 if (test_bit(__ICE_DOWN, vsi->state) ||
5357 test_bit(__ICE_CFG_BUSY, pf->state))
5358 return;
5359
5360
5361 ice_update_vsi_ring_stats(vsi);
5362
5363
5364 ice_update_eth_stats(vsi);
5365
5366 cur_ns->tx_errors = cur_es->tx_errors;
5367 cur_ns->rx_dropped = cur_es->rx_discards + vsi->rx_gro_dropped;
5368 cur_ns->tx_dropped = cur_es->tx_discards;
5369 cur_ns->multicast = cur_es->rx_multicast;
5370
5371
5372 if (vsi->type == ICE_VSI_PF) {
5373 cur_ns->rx_crc_errors = pf->stats.crc_errors;
5374 cur_ns->rx_errors = pf->stats.crc_errors +
5375 pf->stats.illegal_bytes +
5376 pf->stats.rx_len_errors +
5377 pf->stats.rx_undersize +
5378 pf->hw_csum_rx_error +
5379 pf->stats.rx_jabber +
5380 pf->stats.rx_fragments +
5381 pf->stats.rx_oversize;
5382 cur_ns->rx_length_errors = pf->stats.rx_len_errors;
5383
5384 cur_ns->rx_missed_errors = pf->stats.eth.rx_discards;
5385 }
5386}
5387
5388
5389
5390
5391
5392void ice_update_pf_stats(struct ice_pf *pf)
5393{
5394 struct ice_hw_port_stats *prev_ps, *cur_ps;
5395 struct ice_hw *hw = &pf->hw;
5396 u16 fd_ctr_base;
5397 u8 port;
5398
5399 port = hw->port_info->lport;
5400 prev_ps = &pf->stats_prev;
5401 cur_ps = &pf->stats;
5402
5403 ice_stat_update40(hw, GLPRT_GORCL(port), pf->stat_prev_loaded,
5404 &prev_ps->eth.rx_bytes,
5405 &cur_ps->eth.rx_bytes);
5406
5407 ice_stat_update40(hw, GLPRT_UPRCL(port), pf->stat_prev_loaded,
5408 &prev_ps->eth.rx_unicast,
5409 &cur_ps->eth.rx_unicast);
5410
5411 ice_stat_update40(hw, GLPRT_MPRCL(port), pf->stat_prev_loaded,
5412 &prev_ps->eth.rx_multicast,
5413 &cur_ps->eth.rx_multicast);
5414
5415 ice_stat_update40(hw, GLPRT_BPRCL(port), pf->stat_prev_loaded,
5416 &prev_ps->eth.rx_broadcast,
5417 &cur_ps->eth.rx_broadcast);
5418
5419 ice_stat_update32(hw, PRTRPB_RDPC, pf->stat_prev_loaded,
5420 &prev_ps->eth.rx_discards,
5421 &cur_ps->eth.rx_discards);
5422
5423 ice_stat_update40(hw, GLPRT_GOTCL(port), pf->stat_prev_loaded,
5424 &prev_ps->eth.tx_bytes,
5425 &cur_ps->eth.tx_bytes);
5426
5427 ice_stat_update40(hw, GLPRT_UPTCL(port), pf->stat_prev_loaded,
5428 &prev_ps->eth.tx_unicast,
5429 &cur_ps->eth.tx_unicast);
5430
5431 ice_stat_update40(hw, GLPRT_MPTCL(port), pf->stat_prev_loaded,
5432 &prev_ps->eth.tx_multicast,
5433 &cur_ps->eth.tx_multicast);
5434
5435 ice_stat_update40(hw, GLPRT_BPTCL(port), pf->stat_prev_loaded,
5436 &prev_ps->eth.tx_broadcast,
5437 &cur_ps->eth.tx_broadcast);
5438
5439 ice_stat_update32(hw, GLPRT_TDOLD(port), pf->stat_prev_loaded,
5440 &prev_ps->tx_dropped_link_down,
5441 &cur_ps->tx_dropped_link_down);
5442
5443 ice_stat_update40(hw, GLPRT_PRC64L(port), pf->stat_prev_loaded,
5444 &prev_ps->rx_size_64, &cur_ps->rx_size_64);
5445
5446 ice_stat_update40(hw, GLPRT_PRC127L(port), pf->stat_prev_loaded,
5447 &prev_ps->rx_size_127, &cur_ps->rx_size_127);
5448
5449 ice_stat_update40(hw, GLPRT_PRC255L(port), pf->stat_prev_loaded,
5450 &prev_ps->rx_size_255, &cur_ps->rx_size_255);
5451
5452 ice_stat_update40(hw, GLPRT_PRC511L(port), pf->stat_prev_loaded,
5453 &prev_ps->rx_size_511, &cur_ps->rx_size_511);
5454
5455 ice_stat_update40(hw, GLPRT_PRC1023L(port), pf->stat_prev_loaded,
5456 &prev_ps->rx_size_1023, &cur_ps->rx_size_1023);
5457
5458 ice_stat_update40(hw, GLPRT_PRC1522L(port), pf->stat_prev_loaded,
5459 &prev_ps->rx_size_1522, &cur_ps->rx_size_1522);
5460
5461 ice_stat_update40(hw, GLPRT_PRC9522L(port), pf->stat_prev_loaded,
5462 &prev_ps->rx_size_big, &cur_ps->rx_size_big);
5463
5464 ice_stat_update40(hw, GLPRT_PTC64L(port), pf->stat_prev_loaded,
5465 &prev_ps->tx_size_64, &cur_ps->tx_size_64);
5466
5467 ice_stat_update40(hw, GLPRT_PTC127L(port), pf->stat_prev_loaded,
5468 &prev_ps->tx_size_127, &cur_ps->tx_size_127);
5469
5470 ice_stat_update40(hw, GLPRT_PTC255L(port), pf->stat_prev_loaded,
5471 &prev_ps->tx_size_255, &cur_ps->tx_size_255);
5472
5473 ice_stat_update40(hw, GLPRT_PTC511L(port), pf->stat_prev_loaded,
5474 &prev_ps->tx_size_511, &cur_ps->tx_size_511);
5475
5476 ice_stat_update40(hw, GLPRT_PTC1023L(port), pf->stat_prev_loaded,
5477 &prev_ps->tx_size_1023, &cur_ps->tx_size_1023);
5478
5479 ice_stat_update40(hw, GLPRT_PTC1522L(port), pf->stat_prev_loaded,
5480 &prev_ps->tx_size_1522, &cur_ps->tx_size_1522);
5481
5482 ice_stat_update40(hw, GLPRT_PTC9522L(port), pf->stat_prev_loaded,
5483 &prev_ps->tx_size_big, &cur_ps->tx_size_big);
5484
5485 fd_ctr_base = hw->fd_ctr_base;
5486
5487 ice_stat_update40(hw,
5488 GLSTAT_FD_CNT0L(ICE_FD_SB_STAT_IDX(fd_ctr_base)),
5489 pf->stat_prev_loaded, &prev_ps->fd_sb_match,
5490 &cur_ps->fd_sb_match);
5491 ice_stat_update32(hw, GLPRT_LXONRXC(port), pf->stat_prev_loaded,
5492 &prev_ps->link_xon_rx, &cur_ps->link_xon_rx);
5493
5494 ice_stat_update32(hw, GLPRT_LXOFFRXC(port), pf->stat_prev_loaded,
5495 &prev_ps->link_xoff_rx, &cur_ps->link_xoff_rx);
5496
5497 ice_stat_update32(hw, GLPRT_LXONTXC(port), pf->stat_prev_loaded,
5498 &prev_ps->link_xon_tx, &cur_ps->link_xon_tx);
5499
5500 ice_stat_update32(hw, GLPRT_LXOFFTXC(port), pf->stat_prev_loaded,
5501 &prev_ps->link_xoff_tx, &cur_ps->link_xoff_tx);
5502
5503 ice_update_dcb_stats(pf);
5504
5505 ice_stat_update32(hw, GLPRT_CRCERRS(port), pf->stat_prev_loaded,
5506 &prev_ps->crc_errors, &cur_ps->crc_errors);
5507
5508 ice_stat_update32(hw, GLPRT_ILLERRC(port), pf->stat_prev_loaded,
5509 &prev_ps->illegal_bytes, &cur_ps->illegal_bytes);
5510
5511 ice_stat_update32(hw, GLPRT_MLFC(port), pf->stat_prev_loaded,
5512 &prev_ps->mac_local_faults,
5513 &cur_ps->mac_local_faults);
5514
5515 ice_stat_update32(hw, GLPRT_MRFC(port), pf->stat_prev_loaded,
5516 &prev_ps->mac_remote_faults,
5517 &cur_ps->mac_remote_faults);
5518
5519 ice_stat_update32(hw, GLPRT_RLEC(port), pf->stat_prev_loaded,
5520 &prev_ps->rx_len_errors, &cur_ps->rx_len_errors);
5521
5522 ice_stat_update32(hw, GLPRT_RUC(port), pf->stat_prev_loaded,
5523 &prev_ps->rx_undersize, &cur_ps->rx_undersize);
5524
5525 ice_stat_update32(hw, GLPRT_RFC(port), pf->stat_prev_loaded,
5526 &prev_ps->rx_fragments, &cur_ps->rx_fragments);
5527
5528 ice_stat_update32(hw, GLPRT_ROC(port), pf->stat_prev_loaded,
5529 &prev_ps->rx_oversize, &cur_ps->rx_oversize);
5530
5531 ice_stat_update32(hw, GLPRT_RJC(port), pf->stat_prev_loaded,
5532 &prev_ps->rx_jabber, &cur_ps->rx_jabber);
5533
5534 cur_ps->fd_sb_status = test_bit(ICE_FLAG_FD_ENA, pf->flags) ? 1 : 0;
5535
5536 pf->stat_prev_loaded = true;
5537}
5538
5539
5540
5541
5542
5543
5544static
5545void ice_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
5546{
5547 struct ice_netdev_priv *np = netdev_priv(netdev);
5548 struct rtnl_link_stats64 *vsi_stats;
5549 struct ice_vsi *vsi = np->vsi;
5550
5551 vsi_stats = &vsi->net_stats;
5552
5553 if (!vsi->num_txq || !vsi->num_rxq)
5554 return;
5555
5556
5557
5558
5559
5560
5561 if (!test_bit(__ICE_DOWN, vsi->state))
5562 ice_update_vsi_ring_stats(vsi);
5563 stats->tx_packets = vsi_stats->tx_packets;
5564 stats->tx_bytes = vsi_stats->tx_bytes;
5565 stats->rx_packets = vsi_stats->rx_packets;
5566 stats->rx_bytes = vsi_stats->rx_bytes;
5567
5568
5569
5570
5571
5572 stats->multicast = vsi_stats->multicast;
5573 stats->tx_errors = vsi_stats->tx_errors;
5574 stats->tx_dropped = vsi_stats->tx_dropped;
5575 stats->rx_errors = vsi_stats->rx_errors;
5576 stats->rx_dropped = vsi_stats->rx_dropped;
5577 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
5578 stats->rx_length_errors = vsi_stats->rx_length_errors;
5579}
5580
5581
5582
5583
5584
5585static void ice_napi_disable_all(struct ice_vsi *vsi)
5586{
5587 int q_idx;
5588
5589 if (!vsi->netdev)
5590 return;
5591
5592 ice_for_each_q_vector(vsi, q_idx) {
5593 struct ice_q_vector *q_vector = vsi->q_vectors[q_idx];
5594
5595 if (q_vector->rx.ring || q_vector->tx.ring)
5596 napi_disable(&q_vector->napi);
5597 }
5598}
5599
5600
5601
5602
5603
5604int ice_down(struct ice_vsi *vsi)
5605{
5606 int i, tx_err, rx_err, link_err = 0;
5607
5608
5609
5610
5611 if (vsi->netdev) {
5612 netif_carrier_off(vsi->netdev);
5613 netif_tx_disable(vsi->netdev);
5614 }
5615
5616 ice_vsi_dis_irq(vsi);
5617
5618 tx_err = ice_vsi_stop_lan_tx_rings(vsi, ICE_NO_RESET, 0);
5619 if (tx_err)
5620 netdev_err(vsi->netdev, "Failed stop Tx rings, VSI %d error %d\n",
5621 vsi->vsi_num, tx_err);
5622 if (!tx_err && ice_is_xdp_ena_vsi(vsi)) {
5623 tx_err = ice_vsi_stop_xdp_tx_rings(vsi);
5624 if (tx_err)
5625 netdev_err(vsi->netdev, "Failed stop XDP rings, VSI %d error %d\n",
5626 vsi->vsi_num, tx_err);
5627 }
5628
5629 rx_err = ice_vsi_stop_all_rx_rings(vsi);
5630 if (rx_err)
5631 netdev_err(vsi->netdev, "Failed stop Rx rings, VSI %d error %d\n",
5632 vsi->vsi_num, rx_err);
5633
5634 ice_napi_disable_all(vsi);
5635
5636 if (test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags)) {
5637 link_err = ice_force_phys_link_state(vsi, false);
5638 if (link_err)
5639 netdev_err(vsi->netdev, "Failed to set physical link down, VSI %d error %d\n",
5640 vsi->vsi_num, link_err);
5641 }
5642
5643 ice_for_each_txq(vsi, i)
5644 ice_clean_tx_ring(vsi->tx_rings[i]);
5645
5646 ice_for_each_rxq(vsi, i)
5647 ice_clean_rx_ring(vsi->rx_rings[i]);
5648
5649 if (tx_err || rx_err || link_err) {
5650 netdev_err(vsi->netdev, "Failed to close VSI 0x%04X on switch 0x%04X\n",
5651 vsi->vsi_num, vsi->vsw->sw_id);
5652 return -EIO;
5653 }
5654
5655 return 0;
5656}
5657
5658
5659
5660
5661
5662
5663
5664int ice_vsi_setup_tx_rings(struct ice_vsi *vsi)
5665{
5666 int i, err = 0;
5667
5668 if (!vsi->num_txq) {
5669 dev_err(ice_pf_to_dev(vsi->back), "VSI %d has 0 Tx queues\n",
5670 vsi->vsi_num);
5671 return -EINVAL;
5672 }
5673
5674 ice_for_each_txq(vsi, i) {
5675 struct ice_ring *ring = vsi->tx_rings[i];
5676
5677 if (!ring)
5678 return -EINVAL;
5679
5680 ring->netdev = vsi->netdev;
5681 err = ice_setup_tx_ring(ring);
5682 if (err)
5683 break;
5684 }
5685
5686 return err;
5687}
5688
5689
5690
5691
5692
5693
5694
5695int ice_vsi_setup_rx_rings(struct ice_vsi *vsi)
5696{
5697 int i, err = 0;
5698
5699 if (!vsi->num_rxq) {
5700 dev_err(ice_pf_to_dev(vsi->back), "VSI %d has 0 Rx queues\n",
5701 vsi->vsi_num);
5702 return -EINVAL;
5703 }
5704
5705 ice_for_each_rxq(vsi, i) {
5706 struct ice_ring *ring = vsi->rx_rings[i];
5707
5708 if (!ring)
5709 return -EINVAL;
5710
5711 ring->netdev = vsi->netdev;
5712 err = ice_setup_rx_ring(ring);
5713 if (err)
5714 break;
5715 }
5716
5717 return err;
5718}
5719
5720
5721
5722
5723
5724
5725
5726
5727
5728int ice_vsi_open_ctrl(struct ice_vsi *vsi)
5729{
5730 char int_name[ICE_INT_NAME_STR_LEN];
5731 struct ice_pf *pf = vsi->back;
5732 struct device *dev;
5733 int err;
5734
5735 dev = ice_pf_to_dev(pf);
5736
5737 err = ice_vsi_setup_tx_rings(vsi);
5738 if (err)
5739 goto err_setup_tx;
5740
5741 err = ice_vsi_setup_rx_rings(vsi);
5742 if (err)
5743 goto err_setup_rx;
5744
5745 err = ice_vsi_cfg(vsi);
5746 if (err)
5747 goto err_setup_rx;
5748
5749 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:ctrl",
5750 dev_driver_string(dev), dev_name(dev));
5751 err = ice_vsi_req_irq_msix(vsi, int_name);
5752 if (err)
5753 goto err_setup_rx;
5754
5755 ice_vsi_cfg_msix(vsi);
5756
5757 err = ice_vsi_start_all_rx_rings(vsi);
5758 if (err)
5759 goto err_up_complete;
5760
5761 clear_bit(__ICE_DOWN, vsi->state);
5762 ice_vsi_ena_irq(vsi);
5763
5764 return 0;
5765
5766err_up_complete:
5767 ice_down(vsi);
5768err_setup_rx:
5769 ice_vsi_free_rx_rings(vsi);
5770err_setup_tx:
5771 ice_vsi_free_tx_rings(vsi);
5772
5773 return err;
5774}
5775
5776
5777
5778
5779
5780
5781
5782
5783
5784static int ice_vsi_open(struct ice_vsi *vsi)
5785{
5786 char int_name[ICE_INT_NAME_STR_LEN];
5787 struct ice_pf *pf = vsi->back;
5788 int err;
5789
5790
5791 err = ice_vsi_setup_tx_rings(vsi);
5792 if (err)
5793 goto err_setup_tx;
5794
5795 err = ice_vsi_setup_rx_rings(vsi);
5796 if (err)
5797 goto err_setup_rx;
5798
5799 err = ice_vsi_cfg(vsi);
5800 if (err)
5801 goto err_setup_rx;
5802
5803 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5804 dev_driver_string(ice_pf_to_dev(pf)), vsi->netdev->name);
5805 err = ice_vsi_req_irq_msix(vsi, int_name);
5806 if (err)
5807 goto err_setup_rx;
5808
5809
5810 err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_txq);
5811 if (err)
5812 goto err_set_qs;
5813
5814 err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_rxq);
5815 if (err)
5816 goto err_set_qs;
5817
5818 err = ice_up_complete(vsi);
5819 if (err)
5820 goto err_up_complete;
5821
5822 return 0;
5823
5824err_up_complete:
5825 ice_down(vsi);
5826err_set_qs:
5827 ice_vsi_free_irq(vsi);
5828err_setup_rx:
5829 ice_vsi_free_rx_rings(vsi);
5830err_setup_tx:
5831 ice_vsi_free_tx_rings(vsi);
5832
5833 return err;
5834}
5835
5836
5837
5838
5839
5840static void ice_vsi_release_all(struct ice_pf *pf)
5841{
5842 int err, i;
5843
5844 if (!pf->vsi)
5845 return;
5846
5847 ice_for_each_vsi(pf, i) {
5848 if (!pf->vsi[i])
5849 continue;
5850
5851 err = ice_vsi_release(pf->vsi[i]);
5852 if (err)
5853 dev_dbg(ice_pf_to_dev(pf), "Failed to release pf->vsi[%d], err %d, vsi_num = %d\n",
5854 i, err, pf->vsi[i]->vsi_num);
5855 }
5856}
5857
5858
5859
5860
5861
5862
5863
5864
5865static int ice_vsi_rebuild_by_type(struct ice_pf *pf, enum ice_vsi_type type)
5866{
5867 struct device *dev = ice_pf_to_dev(pf);
5868 enum ice_status status;
5869 int i, err;
5870
5871 ice_for_each_vsi(pf, i) {
5872 struct ice_vsi *vsi = pf->vsi[i];
5873
5874 if (!vsi || vsi->type != type)
5875 continue;
5876
5877
5878 err = ice_vsi_rebuild(vsi, true);
5879 if (err) {
5880 dev_err(dev, "rebuild VSI failed, err %d, VSI index %d, type %s\n",
5881 err, vsi->idx, ice_vsi_type_str(type));
5882 return err;
5883 }
5884
5885
5886 status = ice_replay_vsi(&pf->hw, vsi->idx);
5887 if (status) {
5888 dev_err(dev, "replay VSI failed, status %s, VSI index %d, type %s\n",
5889 ice_stat_str(status), vsi->idx,
5890 ice_vsi_type_str(type));
5891 return -EIO;
5892 }
5893
5894
5895
5896
5897 vsi->vsi_num = ice_get_hw_vsi_num(&pf->hw, vsi->idx);
5898
5899
5900 err = ice_ena_vsi(vsi, false);
5901 if (err) {
5902 dev_err(dev, "enable VSI failed, err %d, VSI index %d, type %s\n",
5903 err, vsi->idx, ice_vsi_type_str(type));
5904 return err;
5905 }
5906
5907 dev_info(dev, "VSI rebuilt. VSI index %d, type %s\n", vsi->idx,
5908 ice_vsi_type_str(type));
5909 }
5910
5911 return 0;
5912}
5913
5914
5915
5916
5917
5918static void ice_update_pf_netdev_link(struct ice_pf *pf)
5919{
5920 bool link_up;
5921 int i;
5922
5923 ice_for_each_vsi(pf, i) {
5924 struct ice_vsi *vsi = pf->vsi[i];
5925
5926 if (!vsi || vsi->type != ICE_VSI_PF)
5927 return;
5928
5929 ice_get_link_status(pf->vsi[i]->port_info, &link_up);
5930 if (link_up) {
5931 netif_carrier_on(pf->vsi[i]->netdev);
5932 netif_tx_wake_all_queues(pf->vsi[i]->netdev);
5933 } else {
5934 netif_carrier_off(pf->vsi[i]->netdev);
5935 netif_tx_stop_all_queues(pf->vsi[i]->netdev);
5936 }
5937 }
5938}
5939
5940
5941
5942
5943
5944
5945
5946
5947
5948
5949
5950static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type)
5951{
5952 struct device *dev = ice_pf_to_dev(pf);
5953 struct ice_hw *hw = &pf->hw;
5954 enum ice_status ret;
5955 int err;
5956
5957 if (test_bit(__ICE_DOWN, pf->state))
5958 goto clear_recovery;
5959
5960 dev_dbg(dev, "rebuilding PF after reset_type=%d\n", reset_type);
5961
5962 ret = ice_init_all_ctrlq(hw);
5963 if (ret) {
5964 dev_err(dev, "control queues init failed %s\n",
5965 ice_stat_str(ret));
5966 goto err_init_ctrlq;
5967 }
5968
5969
5970 if (!ice_is_safe_mode(pf)) {
5971
5972 if (reset_type == ICE_RESET_PFR)
5973 ice_fill_blk_tbls(hw);
5974 else
5975
5976 ice_load_pkg(NULL, pf);
5977 }
5978
5979 ret = ice_clear_pf_cfg(hw);
5980 if (ret) {
5981 dev_err(dev, "clear PF configuration failed %s\n",
5982 ice_stat_str(ret));
5983 goto err_init_ctrlq;
5984 }
5985
5986 if (pf->first_sw->dflt_vsi_ena)
5987 dev_info(dev, "Clearing default VSI, re-enable after reset completes\n");
5988
5989 pf->first_sw->dflt_vsi = NULL;
5990 pf->first_sw->dflt_vsi_ena = false;
5991
5992 ice_clear_pxe_mode(hw);
5993
5994 ret = ice_get_caps(hw);
5995 if (ret) {
5996 dev_err(dev, "ice_get_caps failed %s\n", ice_stat_str(ret));
5997 goto err_init_ctrlq;
5998 }
5999
6000 ret = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, NULL);
6001 if (ret) {
6002 dev_err(dev, "set_mac_cfg failed %s\n", ice_stat_str(ret));
6003 goto err_init_ctrlq;
6004 }
6005
6006 err = ice_sched_init_port(hw->port_info);
6007 if (err)
6008 goto err_sched_init_port;
6009
6010
6011 err = ice_req_irq_msix_misc(pf);
6012 if (err) {
6013 dev_err(dev, "misc vector setup failed: %d\n", err);
6014 goto err_sched_init_port;
6015 }
6016
6017 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) {
6018 wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
6019 if (!rd32(hw, PFQF_FD_SIZE)) {
6020 u16 unused, guar, b_effort;
6021
6022 guar = hw->func_caps.fd_fltr_guar;
6023 b_effort = hw->func_caps.fd_fltr_best_effort;
6024
6025
6026 ice_alloc_fd_guar_item(hw, &unused, guar);
6027
6028 ice_alloc_fd_shrd_item(hw, &unused, b_effort);
6029 }
6030 }
6031
6032 if (test_bit(ICE_FLAG_DCB_ENA, pf->flags))
6033 ice_dcb_rebuild(pf);
6034
6035
6036 err = ice_vsi_rebuild_by_type(pf, ICE_VSI_PF);
6037 if (err) {
6038 dev_err(dev, "PF VSI rebuild failed: %d\n", err);
6039 goto err_vsi_rebuild;
6040 }
6041
6042
6043 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) {
6044 err = ice_vsi_rebuild_by_type(pf, ICE_VSI_CTRL);
6045 if (err) {
6046 dev_err(dev, "control VSI rebuild failed: %d\n", err);
6047 goto err_vsi_rebuild;
6048 }
6049
6050
6051 if (hw->fdir_prof)
6052 ice_fdir_replay_flows(hw);
6053
6054
6055 ice_fdir_replay_fltrs(pf);
6056
6057 ice_rebuild_arfs(pf);
6058 }
6059
6060 ice_update_pf_netdev_link(pf);
6061
6062
6063 ret = ice_send_version(pf);
6064 if (ret) {
6065 dev_err(dev, "Rebuild failed due to error sending driver version: %s\n",
6066 ice_stat_str(ret));
6067 goto err_vsi_rebuild;
6068 }
6069
6070 ice_replay_post(hw);
6071
6072
6073 clear_bit(__ICE_RESET_FAILED, pf->state);
6074 return;
6075
6076err_vsi_rebuild:
6077err_sched_init_port:
6078 ice_sched_cleanup_all(hw);
6079err_init_ctrlq:
6080 ice_shutdown_all_ctrlq(hw);
6081 set_bit(__ICE_RESET_FAILED, pf->state);
6082clear_recovery:
6083
6084 set_bit(__ICE_NEEDS_RESTART, pf->state);
6085 dev_err(dev, "Rebuild failed, unload and reload driver\n");
6086}
6087
6088
6089
6090
6091
6092static int ice_max_xdp_frame_size(struct ice_vsi *vsi)
6093{
6094 if (PAGE_SIZE >= 8192 || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags))
6095 return ICE_RXBUF_2048 - XDP_PACKET_HEADROOM;
6096 else
6097 return ICE_RXBUF_3072;
6098}
6099
6100
6101
6102
6103
6104
6105
6106
6107static int ice_change_mtu(struct net_device *netdev, int new_mtu)
6108{
6109 struct ice_netdev_priv *np = netdev_priv(netdev);
6110 struct ice_vsi *vsi = np->vsi;
6111 struct ice_pf *pf = vsi->back;
6112 u8 count = 0;
6113
6114 if (new_mtu == (int)netdev->mtu) {
6115 netdev_warn(netdev, "MTU is already %u\n", netdev->mtu);
6116 return 0;
6117 }
6118
6119 if (ice_is_xdp_ena_vsi(vsi)) {
6120 int frame_size = ice_max_xdp_frame_size(vsi);
6121
6122 if (new_mtu + ICE_ETH_PKT_HDR_PAD > frame_size) {
6123 netdev_err(netdev, "max MTU for XDP usage is %d\n",
6124 frame_size - ICE_ETH_PKT_HDR_PAD);
6125 return -EINVAL;
6126 }
6127 }
6128
6129 if (new_mtu < (int)netdev->min_mtu) {
6130 netdev_err(netdev, "new MTU invalid. min_mtu is %d\n",
6131 netdev->min_mtu);
6132 return -EINVAL;
6133 } else if (new_mtu > (int)netdev->max_mtu) {
6134 netdev_err(netdev, "new MTU invalid. max_mtu is %d\n",
6135 netdev->min_mtu);
6136 return -EINVAL;
6137 }
6138
6139 do {
6140 if (ice_is_reset_in_progress(pf->state)) {
6141 count++;
6142 usleep_range(1000, 2000);
6143 } else {
6144 break;
6145 }
6146
6147 } while (count < 100);
6148
6149 if (count == 100) {
6150 netdev_err(netdev, "can't change MTU. Device is busy\n");
6151 return -EBUSY;
6152 }
6153
6154 netdev->mtu = (unsigned int)new_mtu;
6155
6156
6157 if (!test_and_set_bit(__ICE_DOWN, vsi->state)) {
6158 int err;
6159
6160 err = ice_down(vsi);
6161 if (err) {
6162 netdev_err(netdev, "change MTU if_up err %d\n", err);
6163 return err;
6164 }
6165
6166 err = ice_up(vsi);
6167 if (err) {
6168 netdev_err(netdev, "change MTU if_up err %d\n", err);
6169 return err;
6170 }
6171 }
6172
6173 netdev_dbg(netdev, "changed MTU to %d\n", new_mtu);
6174 return 0;
6175}
6176
6177
6178
6179
6180
6181const char *ice_aq_str(enum ice_aq_err aq_err)
6182{
6183 switch (aq_err) {
6184 case ICE_AQ_RC_OK:
6185 return "OK";
6186 case ICE_AQ_RC_EPERM:
6187 return "ICE_AQ_RC_EPERM";
6188 case ICE_AQ_RC_ENOENT:
6189 return "ICE_AQ_RC_ENOENT";
6190 case ICE_AQ_RC_ENOMEM:
6191 return "ICE_AQ_RC_ENOMEM";
6192 case ICE_AQ_RC_EBUSY:
6193 return "ICE_AQ_RC_EBUSY";
6194 case ICE_AQ_RC_EEXIST:
6195 return "ICE_AQ_RC_EEXIST";
6196 case ICE_AQ_RC_EINVAL:
6197 return "ICE_AQ_RC_EINVAL";
6198 case ICE_AQ_RC_ENOSPC:
6199 return "ICE_AQ_RC_ENOSPC";
6200 case ICE_AQ_RC_ENOSYS:
6201 return "ICE_AQ_RC_ENOSYS";
6202 case ICE_AQ_RC_EMODE:
6203 return "ICE_AQ_RC_EMODE";
6204 case ICE_AQ_RC_ENOSEC:
6205 return "ICE_AQ_RC_ENOSEC";
6206 case ICE_AQ_RC_EBADSIG:
6207 return "ICE_AQ_RC_EBADSIG";
6208 case ICE_AQ_RC_ESVN:
6209 return "ICE_AQ_RC_ESVN";
6210 case ICE_AQ_RC_EBADMAN:
6211 return "ICE_AQ_RC_EBADMAN";
6212 case ICE_AQ_RC_EBADBUF:
6213 return "ICE_AQ_RC_EBADBUF";
6214 }
6215
6216 return "ICE_AQ_RC_UNKNOWN";
6217}
6218
6219
6220
6221
6222
6223const char *ice_stat_str(enum ice_status stat_err)
6224{
6225 switch (stat_err) {
6226 case ICE_SUCCESS:
6227 return "OK";
6228 case ICE_ERR_PARAM:
6229 return "ICE_ERR_PARAM";
6230 case ICE_ERR_NOT_IMPL:
6231 return "ICE_ERR_NOT_IMPL";
6232 case ICE_ERR_NOT_READY:
6233 return "ICE_ERR_NOT_READY";
6234 case ICE_ERR_NOT_SUPPORTED:
6235 return "ICE_ERR_NOT_SUPPORTED";
6236 case ICE_ERR_BAD_PTR:
6237 return "ICE_ERR_BAD_PTR";
6238 case ICE_ERR_INVAL_SIZE:
6239 return "ICE_ERR_INVAL_SIZE";
6240 case ICE_ERR_DEVICE_NOT_SUPPORTED:
6241 return "ICE_ERR_DEVICE_NOT_SUPPORTED";
6242 case ICE_ERR_RESET_FAILED:
6243 return "ICE_ERR_RESET_FAILED";
6244 case ICE_ERR_FW_API_VER:
6245 return "ICE_ERR_FW_API_VER";
6246 case ICE_ERR_NO_MEMORY:
6247 return "ICE_ERR_NO_MEMORY";
6248 case ICE_ERR_CFG:
6249 return "ICE_ERR_CFG";
6250 case ICE_ERR_OUT_OF_RANGE:
6251 return "ICE_ERR_OUT_OF_RANGE";
6252 case ICE_ERR_ALREADY_EXISTS:
6253 return "ICE_ERR_ALREADY_EXISTS";
6254 case ICE_ERR_NVM_CHECKSUM:
6255 return "ICE_ERR_NVM_CHECKSUM";
6256 case ICE_ERR_BUF_TOO_SHORT:
6257 return "ICE_ERR_BUF_TOO_SHORT";
6258 case ICE_ERR_NVM_BLANK_MODE:
6259 return "ICE_ERR_NVM_BLANK_MODE";
6260 case ICE_ERR_IN_USE:
6261 return "ICE_ERR_IN_USE";
6262 case ICE_ERR_MAX_LIMIT:
6263 return "ICE_ERR_MAX_LIMIT";
6264 case ICE_ERR_RESET_ONGOING:
6265 return "ICE_ERR_RESET_ONGOING";
6266 case ICE_ERR_HW_TABLE:
6267 return "ICE_ERR_HW_TABLE";
6268 case ICE_ERR_DOES_NOT_EXIST:
6269 return "ICE_ERR_DOES_NOT_EXIST";
6270 case ICE_ERR_FW_DDP_MISMATCH:
6271 return "ICE_ERR_FW_DDP_MISMATCH";
6272 case ICE_ERR_AQ_ERROR:
6273 return "ICE_ERR_AQ_ERROR";
6274 case ICE_ERR_AQ_TIMEOUT:
6275 return "ICE_ERR_AQ_TIMEOUT";
6276 case ICE_ERR_AQ_FULL:
6277 return "ICE_ERR_AQ_FULL";
6278 case ICE_ERR_AQ_NO_WORK:
6279 return "ICE_ERR_AQ_NO_WORK";
6280 case ICE_ERR_AQ_EMPTY:
6281 return "ICE_ERR_AQ_EMPTY";
6282 case ICE_ERR_AQ_FW_CRITICAL:
6283 return "ICE_ERR_AQ_FW_CRITICAL";
6284 }
6285
6286 return "ICE_ERR_UNKNOWN";
6287}
6288
6289
6290
6291
6292
6293
6294
6295
6296
6297
6298int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
6299{
6300 struct ice_pf *pf = vsi->back;
6301 struct ice_hw *hw = &pf->hw;
6302 enum ice_status status;
6303 struct device *dev;
6304
6305 dev = ice_pf_to_dev(pf);
6306 if (seed) {
6307 struct ice_aqc_get_set_rss_keys *buf =
6308 (struct ice_aqc_get_set_rss_keys *)seed;
6309
6310 status = ice_aq_set_rss_key(hw, vsi->idx, buf);
6311
6312 if (status) {
6313 dev_err(dev, "Cannot set RSS key, err %s aq_err %s\n",
6314 ice_stat_str(status),
6315 ice_aq_str(hw->adminq.sq_last_status));
6316 return -EIO;
6317 }
6318 }
6319
6320 if (lut) {
6321 status = ice_aq_set_rss_lut(hw, vsi->idx, vsi->rss_lut_type,
6322 lut, lut_size);
6323 if (status) {
6324 dev_err(dev, "Cannot set RSS lut, err %s aq_err %s\n",
6325 ice_stat_str(status),
6326 ice_aq_str(hw->adminq.sq_last_status));
6327 return -EIO;
6328 }
6329 }
6330
6331 return 0;
6332}
6333
6334
6335
6336
6337
6338
6339
6340
6341
6342
6343int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
6344{
6345 struct ice_pf *pf = vsi->back;
6346 struct ice_hw *hw = &pf->hw;
6347 enum ice_status status;
6348 struct device *dev;
6349
6350 dev = ice_pf_to_dev(pf);
6351 if (seed) {
6352 struct ice_aqc_get_set_rss_keys *buf =
6353 (struct ice_aqc_get_set_rss_keys *)seed;
6354
6355 status = ice_aq_get_rss_key(hw, vsi->idx, buf);
6356 if (status) {
6357 dev_err(dev, "Cannot get RSS key, err %s aq_err %s\n",
6358 ice_stat_str(status),
6359 ice_aq_str(hw->adminq.sq_last_status));
6360 return -EIO;
6361 }
6362 }
6363
6364 if (lut) {
6365 status = ice_aq_get_rss_lut(hw, vsi->idx, vsi->rss_lut_type,
6366 lut, lut_size);
6367 if (status) {
6368 dev_err(dev, "Cannot get RSS lut, err %s aq_err %s\n",
6369 ice_stat_str(status),
6370 ice_aq_str(hw->adminq.sq_last_status));
6371 return -EIO;
6372 }
6373 }
6374
6375 return 0;
6376}
6377
6378
6379
6380
6381
6382
6383
6384
6385
6386
6387
6388
6389static int
6390ice_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
6391 struct net_device *dev, u32 filter_mask, int nlflags)
6392{
6393 struct ice_netdev_priv *np = netdev_priv(dev);
6394 struct ice_vsi *vsi = np->vsi;
6395 struct ice_pf *pf = vsi->back;
6396 u16 bmode;
6397
6398 bmode = pf->first_sw->bridge_mode;
6399
6400 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, bmode, 0, 0, nlflags,
6401 filter_mask, NULL);
6402}
6403
6404
6405
6406
6407
6408
6409
6410
6411static int ice_vsi_update_bridge_mode(struct ice_vsi *vsi, u16 bmode)
6412{
6413 struct ice_aqc_vsi_props *vsi_props;
6414 struct ice_hw *hw = &vsi->back->hw;
6415 struct ice_vsi_ctx *ctxt;
6416 enum ice_status status;
6417 int ret = 0;
6418
6419 vsi_props = &vsi->info;
6420
6421 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
6422 if (!ctxt)
6423 return -ENOMEM;
6424
6425 ctxt->info = vsi->info;
6426
6427 if (bmode == BRIDGE_MODE_VEB)
6428
6429 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
6430 else
6431
6432 ctxt->info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
6433 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID);
6434
6435 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
6436 if (status) {
6437 dev_err(ice_pf_to_dev(vsi->back), "update VSI for bridge mode failed, bmode = %d err %s aq_err %s\n",
6438 bmode, ice_stat_str(status),
6439 ice_aq_str(hw->adminq.sq_last_status));
6440 ret = -EIO;
6441 goto out;
6442 }
6443
6444 vsi_props->sw_flags = ctxt->info.sw_flags;
6445
6446out:
6447 kfree(ctxt);
6448 return ret;
6449}
6450
6451
6452
6453
6454
6455
6456
6457
6458
6459
6460
6461
6462
6463static int
6464ice_bridge_setlink(struct net_device *dev, struct nlmsghdr *nlh,
6465 u16 __always_unused flags,
6466 struct netlink_ext_ack __always_unused *extack)
6467{
6468 struct ice_netdev_priv *np = netdev_priv(dev);
6469 struct ice_pf *pf = np->vsi->back;
6470 struct nlattr *attr, *br_spec;
6471 struct ice_hw *hw = &pf->hw;
6472 enum ice_status status;
6473 struct ice_sw *pf_sw;
6474 int rem, v, err = 0;
6475
6476 pf_sw = pf->first_sw;
6477
6478 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
6479
6480 nla_for_each_nested(attr, br_spec, rem) {
6481 __u16 mode;
6482
6483 if (nla_type(attr) != IFLA_BRIDGE_MODE)
6484 continue;
6485 mode = nla_get_u16(attr);
6486 if (mode != BRIDGE_MODE_VEPA && mode != BRIDGE_MODE_VEB)
6487 return -EINVAL;
6488
6489 if (mode == pf_sw->bridge_mode)
6490 continue;
6491
6492
6493
6494 ice_for_each_vsi(pf, v) {
6495 if (!pf->vsi[v])
6496 continue;
6497 err = ice_vsi_update_bridge_mode(pf->vsi[v], mode);
6498 if (err)
6499 return err;
6500 }
6501
6502 hw->evb_veb = (mode == BRIDGE_MODE_VEB);
6503
6504
6505
6506 status = ice_update_sw_rule_bridge_mode(hw);
6507 if (status) {
6508 netdev_err(dev, "switch rule update failed, mode = %d err %s aq_err %s\n",
6509 mode, ice_stat_str(status),
6510 ice_aq_str(hw->adminq.sq_last_status));
6511
6512 hw->evb_veb = (pf_sw->bridge_mode == BRIDGE_MODE_VEB);
6513 return -EIO;
6514 }
6515
6516 pf_sw->bridge_mode = mode;
6517 }
6518
6519 return 0;
6520}
6521
6522
6523
6524
6525
6526
6527static void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue)
6528{
6529 struct ice_netdev_priv *np = netdev_priv(netdev);
6530 struct ice_ring *tx_ring = NULL;
6531 struct ice_vsi *vsi = np->vsi;
6532 struct ice_pf *pf = vsi->back;
6533 u32 i;
6534
6535 pf->tx_timeout_count++;
6536
6537
6538
6539
6540
6541 if (ice_is_pfc_causing_hung_q(pf, txqueue)) {
6542 dev_info(ice_pf_to_dev(pf), "Fake Tx hang detected on queue %u, timeout caused by PFC storm\n",
6543 txqueue);
6544 return;
6545 }
6546
6547
6548 for (i = 0; i < vsi->num_txq; i++)
6549 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
6550 if (txqueue == vsi->tx_rings[i]->q_index) {
6551 tx_ring = vsi->tx_rings[i];
6552 break;
6553 }
6554
6555
6556
6557
6558 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ * 20)))
6559 pf->tx_timeout_recovery_level = 1;
6560 else if (time_before(jiffies, (pf->tx_timeout_last_recovery +
6561 netdev->watchdog_timeo)))
6562 return;
6563
6564 if (tx_ring) {
6565 struct ice_hw *hw = &pf->hw;
6566 u32 head, val = 0;
6567
6568 head = (rd32(hw, QTX_COMM_HEAD(vsi->txq_map[txqueue])) &
6569 QTX_COMM_HEAD_HEAD_M) >> QTX_COMM_HEAD_HEAD_S;
6570
6571 val = rd32(hw, GLINT_DYN_CTL(tx_ring->q_vector->reg_idx));
6572
6573 netdev_info(netdev, "tx_timeout: VSI_num: %d, Q %u, NTC: 0x%x, HW_HEAD: 0x%x, NTU: 0x%x, INT: 0x%x\n",
6574 vsi->vsi_num, txqueue, tx_ring->next_to_clean,
6575 head, tx_ring->next_to_use, val);
6576 }
6577
6578 pf->tx_timeout_last_recovery = jiffies;
6579 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %u\n",
6580 pf->tx_timeout_recovery_level, txqueue);
6581
6582 switch (pf->tx_timeout_recovery_level) {
6583 case 1:
6584 set_bit(__ICE_PFR_REQ, pf->state);
6585 break;
6586 case 2:
6587 set_bit(__ICE_CORER_REQ, pf->state);
6588 break;
6589 case 3:
6590 set_bit(__ICE_GLOBR_REQ, pf->state);
6591 break;
6592 default:
6593 netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in unrecoverable state.\n");
6594 set_bit(__ICE_DOWN, pf->state);
6595 set_bit(__ICE_NEEDS_RESTART, vsi->state);
6596 set_bit(__ICE_SERVICE_DIS, pf->state);
6597 break;
6598 }
6599
6600 ice_service_task_schedule(pf);
6601 pf->tx_timeout_recovery_level++;
6602}
6603
6604
6605
6606
6607
6608
6609
6610
6611
6612
6613
6614
6615
6616int ice_open(struct net_device *netdev)
6617{
6618 struct ice_netdev_priv *np = netdev_priv(netdev);
6619 struct ice_vsi *vsi = np->vsi;
6620 struct ice_pf *pf = vsi->back;
6621 struct ice_port_info *pi;
6622 int err;
6623
6624 if (test_bit(__ICE_NEEDS_RESTART, pf->state)) {
6625 netdev_err(netdev, "driver needs to be unloaded and reloaded\n");
6626 return -EIO;
6627 }
6628
6629 if (test_bit(__ICE_DOWN, pf->state)) {
6630 netdev_err(netdev, "device is not ready yet\n");
6631 return -EBUSY;
6632 }
6633
6634 netif_carrier_off(netdev);
6635
6636 pi = vsi->port_info;
6637 err = ice_update_link_info(pi);
6638 if (err) {
6639 netdev_err(netdev, "Failed to get link info, error %d\n",
6640 err);
6641 return err;
6642 }
6643
6644
6645 if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {
6646 clear_bit(ICE_FLAG_NO_MEDIA, pf->flags);
6647 if (!test_bit(__ICE_PHY_INIT_COMPLETE, pf->state)) {
6648 err = ice_init_phy_user_cfg(pi);
6649 if (err) {
6650 netdev_err(netdev, "Failed to initialize PHY settings, error %d\n",
6651 err);
6652 return err;
6653 }
6654 }
6655
6656 err = ice_configure_phy(vsi);
6657 if (err) {
6658 netdev_err(netdev, "Failed to set physical link up, error %d\n",
6659 err);
6660 return err;
6661 }
6662 } else {
6663 set_bit(ICE_FLAG_NO_MEDIA, pf->flags);
6664 err = ice_aq_set_link_restart_an(pi, false, NULL);
6665 if (err) {
6666 netdev_err(netdev, "Failed to set PHY state, VSI %d error %d\n",
6667 vsi->vsi_num, err);
6668 return err;
6669 }
6670 }
6671
6672 err = ice_vsi_open(vsi);
6673 if (err)
6674 netdev_err(netdev, "Failed to open VSI 0x%04X on switch 0x%04X\n",
6675 vsi->vsi_num, vsi->vsw->sw_id);
6676
6677
6678 udp_tunnel_get_rx_info(netdev);
6679
6680 return err;
6681}
6682
6683
6684
6685
6686
6687
6688
6689
6690
6691
6692
6693int ice_stop(struct net_device *netdev)
6694{
6695 struct ice_netdev_priv *np = netdev_priv(netdev);
6696 struct ice_vsi *vsi = np->vsi;
6697
6698 ice_vsi_close(vsi);
6699
6700 return 0;
6701}
6702
6703
6704
6705
6706
6707
6708
6709static netdev_features_t
6710ice_features_check(struct sk_buff *skb,
6711 struct net_device __always_unused *netdev,
6712 netdev_features_t features)
6713{
6714 size_t len;
6715
6716
6717
6718
6719
6720 if (skb->ip_summed != CHECKSUM_PARTIAL)
6721 return features;
6722
6723
6724
6725
6726 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
6727 features &= ~NETIF_F_GSO_MASK;
6728
6729 len = skb_network_header(skb) - skb->data;
6730 if (len > ICE_TXD_MACLEN_MAX || len & 0x1)
6731 goto out_rm_features;
6732
6733 len = skb_transport_header(skb) - skb_network_header(skb);
6734 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)
6735 goto out_rm_features;
6736
6737 if (skb->encapsulation) {
6738 len = skb_inner_network_header(skb) - skb_transport_header(skb);
6739 if (len > ICE_TXD_L4LEN_MAX || len & 0x1)
6740 goto out_rm_features;
6741
6742 len = skb_inner_transport_header(skb) -
6743 skb_inner_network_header(skb);
6744 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)
6745 goto out_rm_features;
6746 }
6747
6748 return features;
6749out_rm_features:
6750 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
6751}
6752
6753static const struct net_device_ops ice_netdev_safe_mode_ops = {
6754 .ndo_open = ice_open,
6755 .ndo_stop = ice_stop,
6756 .ndo_start_xmit = ice_start_xmit,
6757 .ndo_set_mac_address = ice_set_mac_address,
6758 .ndo_validate_addr = eth_validate_addr,
6759 .ndo_change_mtu = ice_change_mtu,
6760 .ndo_get_stats64 = ice_get_stats64,
6761 .ndo_tx_timeout = ice_tx_timeout,
6762};
6763
6764static const struct net_device_ops ice_netdev_ops = {
6765 .ndo_open = ice_open,
6766 .ndo_stop = ice_stop,
6767 .ndo_start_xmit = ice_start_xmit,
6768 .ndo_features_check = ice_features_check,
6769 .ndo_set_rx_mode = ice_set_rx_mode,
6770 .ndo_set_mac_address = ice_set_mac_address,
6771 .ndo_validate_addr = eth_validate_addr,
6772 .ndo_change_mtu = ice_change_mtu,
6773 .ndo_get_stats64 = ice_get_stats64,
6774 .ndo_set_tx_maxrate = ice_set_tx_maxrate,
6775 .ndo_set_vf_spoofchk = ice_set_vf_spoofchk,
6776 .ndo_set_vf_mac = ice_set_vf_mac,
6777 .ndo_get_vf_config = ice_get_vf_cfg,
6778 .ndo_set_vf_trust = ice_set_vf_trust,
6779 .ndo_set_vf_vlan = ice_set_vf_port_vlan,
6780 .ndo_set_vf_link_state = ice_set_vf_link_state,
6781 .ndo_get_vf_stats = ice_get_vf_stats,
6782 .ndo_vlan_rx_add_vid = ice_vlan_rx_add_vid,
6783 .ndo_vlan_rx_kill_vid = ice_vlan_rx_kill_vid,
6784 .ndo_set_features = ice_set_features,
6785 .ndo_bridge_getlink = ice_bridge_getlink,
6786 .ndo_bridge_setlink = ice_bridge_setlink,
6787 .ndo_fdb_add = ice_fdb_add,
6788 .ndo_fdb_del = ice_fdb_del,
6789#ifdef CONFIG_RFS_ACCEL
6790 .ndo_rx_flow_steer = ice_rx_flow_steer,
6791#endif
6792 .ndo_tx_timeout = ice_tx_timeout,
6793 .ndo_bpf = ice_xdp,
6794 .ndo_xdp_xmit = ice_xdp_xmit,
6795 .ndo_xsk_wakeup = ice_xsk_wakeup,
6796 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
6797 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
6798};
6799