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7#include <linux/version.h>
8#include <linux/types.h>
9#include <linux/netdevice.h>
10#include <linux/etherdevice.h>
11#include <linux/ethtool.h>
12#include <linux/string.h>
13#include <linux/pci.h>
14#include <linux/capability.h>
15#include <linux/vmalloc.h>
16#include <linux/phylink.h>
17
18#include "qede.h"
19#include "qede_ptp.h"
20
21#define QEDE_RQSTAT_OFFSET(stat_name) \
22 (offsetof(struct qede_rx_queue, stat_name))
23#define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
24#define QEDE_RQSTAT(stat_name) \
25 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
26
27#define QEDE_SELFTEST_POLL_COUNT 100
28#define QEDE_DUMP_VERSION 0x1
29#define QEDE_DUMP_NVM_ARG_COUNT 2
30
31static const struct {
32 u64 offset;
33 char string[ETH_GSTRING_LEN];
34} qede_rqstats_arr[] = {
35 QEDE_RQSTAT(rcv_pkts),
36 QEDE_RQSTAT(rx_hw_errors),
37 QEDE_RQSTAT(rx_alloc_errors),
38 QEDE_RQSTAT(rx_ip_frags),
39 QEDE_RQSTAT(xdp_no_pass),
40};
41
42#define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
43#define QEDE_TQSTAT_OFFSET(stat_name) \
44 (offsetof(struct qede_tx_queue, stat_name))
45#define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
46#define QEDE_TQSTAT(stat_name) \
47 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
48#define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
49static const struct {
50 u64 offset;
51 char string[ETH_GSTRING_LEN];
52} qede_tqstats_arr[] = {
53 QEDE_TQSTAT(xmit_pkts),
54 QEDE_TQSTAT(stopped_cnt),
55 QEDE_TQSTAT(tx_mem_alloc_err),
56};
57
58#define QEDE_STAT_OFFSET(stat_name, type, base) \
59 (offsetof(type, stat_name) + (base))
60#define QEDE_STAT_STRING(stat_name) (#stat_name)
61#define _QEDE_STAT(stat_name, type, base, attr) \
62 {QEDE_STAT_OFFSET(stat_name, type, base), \
63 QEDE_STAT_STRING(stat_name), \
64 attr}
65#define QEDE_STAT(stat_name) \
66 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
67#define QEDE_PF_STAT(stat_name) \
68 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
69 BIT(QEDE_STAT_PF_ONLY))
70#define QEDE_PF_BB_STAT(stat_name) \
71 _QEDE_STAT(stat_name, struct qede_stats_bb, \
72 offsetof(struct qede_stats, bb), \
73 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
74#define QEDE_PF_AH_STAT(stat_name) \
75 _QEDE_STAT(stat_name, struct qede_stats_ah, \
76 offsetof(struct qede_stats, ah), \
77 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
78static const struct {
79 u64 offset;
80 char string[ETH_GSTRING_LEN];
81 unsigned long attr;
82#define QEDE_STAT_PF_ONLY 0
83#define QEDE_STAT_BB_ONLY 1
84#define QEDE_STAT_AH_ONLY 2
85} qede_stats_arr[] = {
86 QEDE_STAT(rx_ucast_bytes),
87 QEDE_STAT(rx_mcast_bytes),
88 QEDE_STAT(rx_bcast_bytes),
89 QEDE_STAT(rx_ucast_pkts),
90 QEDE_STAT(rx_mcast_pkts),
91 QEDE_STAT(rx_bcast_pkts),
92
93 QEDE_STAT(tx_ucast_bytes),
94 QEDE_STAT(tx_mcast_bytes),
95 QEDE_STAT(tx_bcast_bytes),
96 QEDE_STAT(tx_ucast_pkts),
97 QEDE_STAT(tx_mcast_pkts),
98 QEDE_STAT(tx_bcast_pkts),
99
100 QEDE_PF_STAT(rx_64_byte_packets),
101 QEDE_PF_STAT(rx_65_to_127_byte_packets),
102 QEDE_PF_STAT(rx_128_to_255_byte_packets),
103 QEDE_PF_STAT(rx_256_to_511_byte_packets),
104 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
105 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
106 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
107 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
108 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
109 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
110 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
111 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
112 QEDE_PF_STAT(tx_64_byte_packets),
113 QEDE_PF_STAT(tx_65_to_127_byte_packets),
114 QEDE_PF_STAT(tx_128_to_255_byte_packets),
115 QEDE_PF_STAT(tx_256_to_511_byte_packets),
116 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
117 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
118 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
119 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
120 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
121 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
122 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
123 QEDE_PF_STAT(rx_mac_crtl_frames),
124 QEDE_PF_STAT(tx_mac_ctrl_frames),
125 QEDE_PF_STAT(rx_pause_frames),
126 QEDE_PF_STAT(tx_pause_frames),
127 QEDE_PF_STAT(rx_pfc_frames),
128 QEDE_PF_STAT(tx_pfc_frames),
129
130 QEDE_PF_STAT(rx_crc_errors),
131 QEDE_PF_STAT(rx_align_errors),
132 QEDE_PF_STAT(rx_carrier_errors),
133 QEDE_PF_STAT(rx_oversize_packets),
134 QEDE_PF_STAT(rx_jabbers),
135 QEDE_PF_STAT(rx_undersize_packets),
136 QEDE_PF_STAT(rx_fragments),
137 QEDE_PF_BB_STAT(tx_lpi_entry_count),
138 QEDE_PF_BB_STAT(tx_total_collisions),
139 QEDE_PF_STAT(brb_truncates),
140 QEDE_PF_STAT(brb_discards),
141 QEDE_STAT(no_buff_discards),
142 QEDE_PF_STAT(mftag_filter_discards),
143 QEDE_PF_STAT(mac_filter_discards),
144 QEDE_PF_STAT(gft_filter_drop),
145 QEDE_STAT(tx_err_drop_pkts),
146 QEDE_STAT(ttl0_discard),
147 QEDE_STAT(packet_too_big_discard),
148
149 QEDE_STAT(coalesced_pkts),
150 QEDE_STAT(coalesced_events),
151 QEDE_STAT(coalesced_aborts_num),
152 QEDE_STAT(non_coalesced_pkts),
153 QEDE_STAT(coalesced_bytes),
154
155 QEDE_STAT(link_change_count),
156 QEDE_STAT(ptp_skip_txts),
157};
158
159#define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
160#define QEDE_STAT_IS_PF_ONLY(i) \
161 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
162#define QEDE_STAT_IS_BB_ONLY(i) \
163 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
164#define QEDE_STAT_IS_AH_ONLY(i) \
165 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
166
167enum {
168 QEDE_PRI_FLAG_CMT,
169 QEDE_PRI_FLAG_SMART_AN_SUPPORT,
170 QEDE_PRI_FLAG_RECOVER_ON_ERROR,
171 QEDE_PRI_FLAG_LEN,
172};
173
174static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
175 "Coupled-Function",
176 "SmartAN capable",
177 "Recover on error",
178};
179
180enum qede_ethtool_tests {
181 QEDE_ETHTOOL_INT_LOOPBACK,
182 QEDE_ETHTOOL_INTERRUPT_TEST,
183 QEDE_ETHTOOL_MEMORY_TEST,
184 QEDE_ETHTOOL_REGISTER_TEST,
185 QEDE_ETHTOOL_CLOCK_TEST,
186 QEDE_ETHTOOL_NVRAM_TEST,
187 QEDE_ETHTOOL_TEST_MAX
188};
189
190static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
191 "Internal loopback (offline)",
192 "Interrupt (online)\t",
193 "Memory (online)\t\t",
194 "Register (online)\t",
195 "Clock (online)\t\t",
196 "Nvram (online)\t\t",
197};
198
199
200
201struct qede_forced_speed_map {
202 u32 speed;
203 __ETHTOOL_DECLARE_LINK_MODE_MASK(caps);
204
205 const u32 *cap_arr;
206 u32 arr_size;
207};
208
209#define QEDE_FORCED_SPEED_MAP(value) \
210{ \
211 .speed = SPEED_##value, \
212 .cap_arr = qede_forced_speed_##value, \
213 .arr_size = ARRAY_SIZE(qede_forced_speed_##value), \
214}
215
216static const u32 qede_forced_speed_1000[] __initconst = {
217 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
218 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
219 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
220};
221
222static const u32 qede_forced_speed_10000[] __initconst = {
223 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
224 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
225 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
226 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
227 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
228 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
229 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
230 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT,
231};
232
233static const u32 qede_forced_speed_20000[] __initconst = {
234 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
235};
236
237static const u32 qede_forced_speed_25000[] __initconst = {
238 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
239 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
240 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
241};
242
243static const u32 qede_forced_speed_40000[] __initconst = {
244 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
245 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
246 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
247 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
248};
249
250static const u32 qede_forced_speed_50000[] __initconst = {
251 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
252 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
253 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
254};
255
256static const u32 qede_forced_speed_100000[] __initconst = {
257 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
258 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
259 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
260 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
261};
262
263static struct qede_forced_speed_map qede_forced_speed_maps[] __ro_after_init = {
264 QEDE_FORCED_SPEED_MAP(1000),
265 QEDE_FORCED_SPEED_MAP(10000),
266 QEDE_FORCED_SPEED_MAP(20000),
267 QEDE_FORCED_SPEED_MAP(25000),
268 QEDE_FORCED_SPEED_MAP(40000),
269 QEDE_FORCED_SPEED_MAP(50000),
270 QEDE_FORCED_SPEED_MAP(100000),
271};
272
273void __init qede_forced_speed_maps_init(void)
274{
275 struct qede_forced_speed_map *map;
276 u32 i;
277
278 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
279 map = qede_forced_speed_maps + i;
280
281 linkmode_set_bit_array(map->cap_arr, map->arr_size, map->caps);
282 map->cap_arr = NULL;
283 map->arr_size = 0;
284 }
285}
286
287
288
289static void qede_get_strings_stats_txq(struct qede_dev *edev,
290 struct qede_tx_queue *txq, u8 **buf)
291{
292 int i;
293
294 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
295 if (txq->is_xdp)
296 sprintf(*buf, "%d [XDP]: %s",
297 QEDE_TXQ_XDP_TO_IDX(edev, txq),
298 qede_tqstats_arr[i].string);
299 else
300 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos,
301 qede_tqstats_arr[i].string);
302 *buf += ETH_GSTRING_LEN;
303 }
304}
305
306static void qede_get_strings_stats_rxq(struct qede_dev *edev,
307 struct qede_rx_queue *rxq, u8 **buf)
308{
309 int i;
310
311 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
312 sprintf(*buf, "%d: %s", rxq->rxq_id,
313 qede_rqstats_arr[i].string);
314 *buf += ETH_GSTRING_LEN;
315 }
316}
317
318static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
319{
320 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
321 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
322 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
323}
324
325static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
326{
327 struct qede_fastpath *fp;
328 int i;
329
330
331 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
332 fp = &edev->fp_array[i];
333
334 if (fp->type & QEDE_FASTPATH_RX)
335 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
336
337 if (fp->type & QEDE_FASTPATH_XDP)
338 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
339
340 if (fp->type & QEDE_FASTPATH_TX) {
341 int cos;
342
343 for_each_cos_in_txq(edev, cos)
344 qede_get_strings_stats_txq(edev,
345 &fp->txq[cos], &buf);
346 }
347 }
348
349
350 for (i = 0; i < QEDE_NUM_STATS; i++) {
351 if (qede_is_irrelevant_stat(edev, i))
352 continue;
353 strcpy(buf, qede_stats_arr[i].string);
354 buf += ETH_GSTRING_LEN;
355 }
356}
357
358static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
359{
360 struct qede_dev *edev = netdev_priv(dev);
361
362 switch (stringset) {
363 case ETH_SS_STATS:
364 qede_get_strings_stats(edev, buf);
365 break;
366 case ETH_SS_PRIV_FLAGS:
367 memcpy(buf, qede_private_arr,
368 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
369 break;
370 case ETH_SS_TEST:
371 memcpy(buf, qede_tests_str_arr,
372 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
373 break;
374 default:
375 DP_VERBOSE(edev, QED_MSG_DEBUG,
376 "Unsupported stringset 0x%08x\n", stringset);
377 }
378}
379
380static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
381{
382 int i;
383
384 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
385 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
386 (*buf)++;
387 }
388}
389
390static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
391{
392 int i;
393
394 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
395 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
396 (*buf)++;
397 }
398}
399
400static void qede_get_ethtool_stats(struct net_device *dev,
401 struct ethtool_stats *stats, u64 *buf)
402{
403 struct qede_dev *edev = netdev_priv(dev);
404 struct qede_fastpath *fp;
405 int i;
406
407 qede_fill_by_demand_stats(edev);
408
409
410 __qede_lock(edev);
411
412 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
413 fp = &edev->fp_array[i];
414
415 if (fp->type & QEDE_FASTPATH_RX)
416 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
417
418 if (fp->type & QEDE_FASTPATH_XDP)
419 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
420
421 if (fp->type & QEDE_FASTPATH_TX) {
422 int cos;
423
424 for_each_cos_in_txq(edev, cos)
425 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf);
426 }
427 }
428
429 for (i = 0; i < QEDE_NUM_STATS; i++) {
430 if (qede_is_irrelevant_stat(edev, i))
431 continue;
432 *buf = *((u64 *)(((void *)&edev->stats) +
433 qede_stats_arr[i].offset));
434
435 buf++;
436 }
437
438 __qede_unlock(edev);
439}
440
441static int qede_get_sset_count(struct net_device *dev, int stringset)
442{
443 struct qede_dev *edev = netdev_priv(dev);
444 int num_stats = QEDE_NUM_STATS, i;
445
446 switch (stringset) {
447 case ETH_SS_STATS:
448 for (i = 0; i < QEDE_NUM_STATS; i++)
449 if (qede_is_irrelevant_stat(edev, i))
450 num_stats--;
451
452
453 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS *
454 edev->dev_info.num_tc;
455
456
457 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
458
459
460 if (edev->xdp_prog)
461 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
462 return num_stats;
463
464 case ETH_SS_PRIV_FLAGS:
465 return QEDE_PRI_FLAG_LEN;
466 case ETH_SS_TEST:
467 if (!IS_VF(edev))
468 return QEDE_ETHTOOL_TEST_MAX;
469 else
470 return 0;
471 default:
472 DP_VERBOSE(edev, QED_MSG_DEBUG,
473 "Unsupported stringset 0x%08x\n", stringset);
474 return -EINVAL;
475 }
476}
477
478static u32 qede_get_priv_flags(struct net_device *dev)
479{
480 struct qede_dev *edev = netdev_priv(dev);
481 u32 flags = 0;
482
483 if (edev->dev_info.common.num_hwfns > 1)
484 flags |= BIT(QEDE_PRI_FLAG_CMT);
485
486 if (edev->dev_info.common.smart_an)
487 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT);
488
489 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE))
490 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR);
491
492 return flags;
493}
494
495static int qede_set_priv_flags(struct net_device *dev, u32 flags)
496{
497 struct qede_dev *edev = netdev_priv(dev);
498 u32 cflags = qede_get_priv_flags(dev);
499 u32 dflags = flags ^ cflags;
500
501
502 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
503 return -EINVAL;
504
505 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
506 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
507 else
508 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
509
510 return 0;
511}
512
513static int qede_get_link_ksettings(struct net_device *dev,
514 struct ethtool_link_ksettings *cmd)
515{
516 typeof(cmd->link_modes) *link_modes = &cmd->link_modes;
517 struct ethtool_link_settings *base = &cmd->base;
518 struct qede_dev *edev = netdev_priv(dev);
519 struct qed_link_output current_link;
520
521 __qede_lock(edev);
522
523 memset(¤t_link, 0, sizeof(current_link));
524 edev->ops->common->get_link(edev->cdev, ¤t_link);
525
526 linkmode_copy(link_modes->supported, current_link.supported_caps);
527 linkmode_copy(link_modes->advertising, current_link.advertised_caps);
528 linkmode_copy(link_modes->lp_advertising, current_link.lp_caps);
529
530 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
531 base->speed = current_link.speed;
532 base->duplex = current_link.duplex;
533 } else {
534 base->speed = SPEED_UNKNOWN;
535 base->duplex = DUPLEX_UNKNOWN;
536 }
537
538 __qede_unlock(edev);
539
540 base->port = current_link.port;
541 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
542 AUTONEG_DISABLE;
543
544 return 0;
545}
546
547static int qede_set_link_ksettings(struct net_device *dev,
548 const struct ethtool_link_ksettings *cmd)
549{
550 const struct ethtool_link_settings *base = &cmd->base;
551 struct qede_dev *edev = netdev_priv(dev);
552 const struct qede_forced_speed_map *map;
553 struct qed_link_output current_link;
554 struct qed_link_params params;
555 u32 i;
556
557 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
558 DP_INFO(edev, "Link settings are not allowed to be changed\n");
559 return -EOPNOTSUPP;
560 }
561 memset(¤t_link, 0, sizeof(current_link));
562 memset(¶ms, 0, sizeof(params));
563 edev->ops->common->get_link(edev->cdev, ¤t_link);
564
565 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
566 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
567
568 if (base->autoneg == AUTONEG_ENABLE) {
569 if (!phylink_test(current_link.supported_caps, Autoneg)) {
570 DP_INFO(edev, "Auto negotiation is not supported\n");
571 return -EOPNOTSUPP;
572 }
573
574 params.autoneg = true;
575 params.forced_speed = 0;
576
577 linkmode_copy(params.adv_speeds, cmd->link_modes.advertising);
578 } else {
579 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
580 params.autoneg = false;
581 params.forced_speed = base->speed;
582
583 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
584 map = qede_forced_speed_maps + i;
585
586 if (base->speed != map->speed ||
587 !linkmode_intersects(current_link.supported_caps,
588 map->caps))
589 continue;
590
591 linkmode_and(params.adv_speeds,
592 current_link.supported_caps, map->caps);
593 goto set_link;
594 }
595
596 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
597 return -EINVAL;
598 }
599
600set_link:
601 params.link_up = true;
602 edev->ops->common->set_link(edev->cdev, ¶ms);
603
604 return 0;
605}
606
607static void qede_get_drvinfo(struct net_device *ndev,
608 struct ethtool_drvinfo *info)
609{
610 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
611 struct qede_dev *edev = netdev_priv(ndev);
612 char mbi[ETHTOOL_FWVERS_LEN];
613
614 strlcpy(info->driver, "qede", sizeof(info->driver));
615
616 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
617 edev->dev_info.common.fw_major,
618 edev->dev_info.common.fw_minor,
619 edev->dev_info.common.fw_rev,
620 edev->dev_info.common.fw_eng);
621
622 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
623 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
624 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
625 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
626 edev->dev_info.common.mfw_rev & 0xFF);
627
628 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) <
629 sizeof(info->version))
630 snprintf(info->version, sizeof(info->version),
631 "%s [storm %s]", DRV_MODULE_VERSION, storm);
632 else
633 snprintf(info->version, sizeof(info->version),
634 "%s %s", DRV_MODULE_VERSION, storm);
635
636 if (edev->dev_info.common.mbi_version) {
637 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d",
638 (edev->dev_info.common.mbi_version &
639 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET,
640 (edev->dev_info.common.mbi_version &
641 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET,
642 (edev->dev_info.common.mbi_version &
643 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET);
644 snprintf(info->fw_version, sizeof(info->fw_version),
645 "mbi %s [mfw %s]", mbi, mfw);
646 } else {
647 snprintf(info->fw_version, sizeof(info->fw_version),
648 "mfw %s", mfw);
649 }
650
651 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
652}
653
654static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
655{
656 struct qede_dev *edev = netdev_priv(ndev);
657
658 if (edev->dev_info.common.wol_support) {
659 wol->supported = WAKE_MAGIC;
660 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
661 }
662}
663
664static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
665{
666 struct qede_dev *edev = netdev_priv(ndev);
667 bool wol_requested;
668 int rc;
669
670 if (wol->wolopts & ~WAKE_MAGIC) {
671 DP_INFO(edev,
672 "Can't support WoL options other than magic-packet\n");
673 return -EINVAL;
674 }
675
676 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
677 if (wol_requested == edev->wol_enabled)
678 return 0;
679
680
681 if (!edev->dev_info.common.wol_support) {
682 DP_INFO(edev, "Device doesn't support WoL\n");
683 return -EINVAL;
684 }
685
686 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
687 if (!rc)
688 edev->wol_enabled = wol_requested;
689
690 return rc;
691}
692
693static u32 qede_get_msglevel(struct net_device *ndev)
694{
695 struct qede_dev *edev = netdev_priv(ndev);
696
697 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
698}
699
700static void qede_set_msglevel(struct net_device *ndev, u32 level)
701{
702 struct qede_dev *edev = netdev_priv(ndev);
703 u32 dp_module = 0;
704 u8 dp_level = 0;
705
706 qede_config_debug(level, &dp_module, &dp_level);
707
708 edev->dp_level = dp_level;
709 edev->dp_module = dp_module;
710 edev->ops->common->update_msglvl(edev->cdev,
711 dp_module, dp_level);
712}
713
714static int qede_nway_reset(struct net_device *dev)
715{
716 struct qede_dev *edev = netdev_priv(dev);
717 struct qed_link_output current_link;
718 struct qed_link_params link_params;
719
720 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
721 DP_INFO(edev, "Link settings are not allowed to be changed\n");
722 return -EOPNOTSUPP;
723 }
724
725 if (!netif_running(dev))
726 return 0;
727
728 memset(¤t_link, 0, sizeof(current_link));
729 edev->ops->common->get_link(edev->cdev, ¤t_link);
730 if (!current_link.link_up)
731 return 0;
732
733
734 memset(&link_params, 0, sizeof(link_params));
735 link_params.link_up = false;
736 edev->ops->common->set_link(edev->cdev, &link_params);
737 link_params.link_up = true;
738 edev->ops->common->set_link(edev->cdev, &link_params);
739
740 return 0;
741}
742
743static u32 qede_get_link(struct net_device *dev)
744{
745 struct qede_dev *edev = netdev_priv(dev);
746 struct qed_link_output current_link;
747
748 memset(¤t_link, 0, sizeof(current_link));
749 edev->ops->common->get_link(edev->cdev, ¤t_link);
750
751 return current_link.link_up;
752}
753
754static int qede_flash_device(struct net_device *dev,
755 struct ethtool_flash *flash)
756{
757 struct qede_dev *edev = netdev_priv(dev);
758
759 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
760}
761
762static int qede_get_coalesce(struct net_device *dev,
763 struct ethtool_coalesce *coal)
764{
765 void *rx_handle = NULL, *tx_handle = NULL;
766 struct qede_dev *edev = netdev_priv(dev);
767 u16 rx_coal, tx_coal, i, rc = 0;
768 struct qede_fastpath *fp;
769
770 rx_coal = QED_DEFAULT_RX_USECS;
771 tx_coal = QED_DEFAULT_TX_USECS;
772
773 memset(coal, 0, sizeof(struct ethtool_coalesce));
774
775 __qede_lock(edev);
776 if (edev->state == QEDE_STATE_OPEN) {
777 for_each_queue(i) {
778 fp = &edev->fp_array[i];
779
780 if (fp->type & QEDE_FASTPATH_RX) {
781 rx_handle = fp->rxq->handle;
782 break;
783 }
784 }
785
786 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
787 if (rc) {
788 DP_INFO(edev, "Read Rx coalesce error\n");
789 goto out;
790 }
791
792 for_each_queue(i) {
793 struct qede_tx_queue *txq;
794
795 fp = &edev->fp_array[i];
796
797
798
799
800
801 if (fp->type & QEDE_FASTPATH_TX) {
802 txq = QEDE_FP_TC0_TXQ(fp);
803 tx_handle = txq->handle;
804 break;
805 }
806 }
807
808 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
809 if (rc)
810 DP_INFO(edev, "Read Tx coalesce error\n");
811 }
812
813out:
814 __qede_unlock(edev);
815
816 coal->rx_coalesce_usecs = rx_coal;
817 coal->tx_coalesce_usecs = tx_coal;
818
819 return rc;
820}
821
822static int qede_set_coalesce(struct net_device *dev,
823 struct ethtool_coalesce *coal)
824{
825 struct qede_dev *edev = netdev_priv(dev);
826 struct qede_fastpath *fp;
827 int i, rc = 0;
828 u16 rxc, txc;
829
830 if (!netif_running(dev)) {
831 DP_INFO(edev, "Interface is down\n");
832 return -EINVAL;
833 }
834
835 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
836 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
837 DP_INFO(edev,
838 "Can't support requested %s coalesce value [max supported value %d]\n",
839 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
840 "tx", QED_COALESCE_MAX);
841 return -EINVAL;
842 }
843
844 rxc = (u16)coal->rx_coalesce_usecs;
845 txc = (u16)coal->tx_coalesce_usecs;
846 for_each_queue(i) {
847 fp = &edev->fp_array[i];
848
849 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
850 rc = edev->ops->common->set_coalesce(edev->cdev,
851 rxc, 0,
852 fp->rxq->handle);
853 if (rc) {
854 DP_INFO(edev,
855 "Set RX coalesce error, rc = %d\n", rc);
856 return rc;
857 }
858 }
859
860 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
861 struct qede_tx_queue *txq;
862
863
864
865
866
867 txq = QEDE_FP_TC0_TXQ(fp);
868
869 rc = edev->ops->common->set_coalesce(edev->cdev,
870 0, txc,
871 txq->handle);
872 if (rc) {
873 DP_INFO(edev,
874 "Set TX coalesce error, rc = %d\n", rc);
875 return rc;
876 }
877 }
878 }
879
880 return rc;
881}
882
883static void qede_get_ringparam(struct net_device *dev,
884 struct ethtool_ringparam *ering)
885{
886 struct qede_dev *edev = netdev_priv(dev);
887
888 ering->rx_max_pending = NUM_RX_BDS_MAX;
889 ering->rx_pending = edev->q_num_rx_buffers;
890 ering->tx_max_pending = NUM_TX_BDS_MAX;
891 ering->tx_pending = edev->q_num_tx_buffers;
892}
893
894static int qede_set_ringparam(struct net_device *dev,
895 struct ethtool_ringparam *ering)
896{
897 struct qede_dev *edev = netdev_priv(dev);
898
899 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
900 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
901 ering->rx_pending, ering->tx_pending);
902
903
904 if (ering->rx_pending > NUM_RX_BDS_MAX ||
905 ering->rx_pending < NUM_RX_BDS_MIN ||
906 ering->tx_pending > NUM_TX_BDS_MAX ||
907 ering->tx_pending < NUM_TX_BDS_MIN) {
908 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
909 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
910 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
911 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
912 return -EINVAL;
913 }
914
915
916 edev->q_num_rx_buffers = ering->rx_pending;
917 edev->q_num_tx_buffers = ering->tx_pending;
918
919 qede_reload(edev, NULL, false);
920
921 return 0;
922}
923
924static void qede_get_pauseparam(struct net_device *dev,
925 struct ethtool_pauseparam *epause)
926{
927 struct qede_dev *edev = netdev_priv(dev);
928 struct qed_link_output current_link;
929
930 memset(¤t_link, 0, sizeof(current_link));
931 edev->ops->common->get_link(edev->cdev, ¤t_link);
932
933 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
934 epause->autoneg = true;
935 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
936 epause->rx_pause = true;
937 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
938 epause->tx_pause = true;
939
940 DP_VERBOSE(edev, QED_MSG_DEBUG,
941 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
942 epause->cmd, epause->autoneg, epause->rx_pause,
943 epause->tx_pause);
944}
945
946static int qede_set_pauseparam(struct net_device *dev,
947 struct ethtool_pauseparam *epause)
948{
949 struct qede_dev *edev = netdev_priv(dev);
950 struct qed_link_params params;
951 struct qed_link_output current_link;
952
953 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
954 DP_INFO(edev,
955 "Pause settings are not allowed to be changed\n");
956 return -EOPNOTSUPP;
957 }
958
959 memset(¤t_link, 0, sizeof(current_link));
960 edev->ops->common->get_link(edev->cdev, ¤t_link);
961
962 memset(¶ms, 0, sizeof(params));
963 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
964
965 if (epause->autoneg) {
966 if (!phylink_test(current_link.supported_caps, Autoneg)) {
967 DP_INFO(edev, "autoneg not supported\n");
968 return -EINVAL;
969 }
970
971 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
972 }
973
974 if (epause->rx_pause)
975 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
976 if (epause->tx_pause)
977 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
978
979 params.link_up = true;
980 edev->ops->common->set_link(edev->cdev, ¶ms);
981
982 return 0;
983}
984
985static void qede_get_regs(struct net_device *ndev,
986 struct ethtool_regs *regs, void *buffer)
987{
988 struct qede_dev *edev = netdev_priv(ndev);
989
990 regs->version = 0;
991 memset(buffer, 0, regs->len);
992
993 if (edev->ops && edev->ops->common)
994 edev->ops->common->dbg_all_data(edev->cdev, buffer);
995}
996
997static int qede_get_regs_len(struct net_device *ndev)
998{
999 struct qede_dev *edev = netdev_priv(ndev);
1000
1001 if (edev->ops && edev->ops->common)
1002 return edev->ops->common->dbg_all_data_size(edev->cdev);
1003 else
1004 return -EINVAL;
1005}
1006
1007static void qede_update_mtu(struct qede_dev *edev,
1008 struct qede_reload_args *args)
1009{
1010 edev->ndev->mtu = args->u.mtu;
1011}
1012
1013
1014int qede_change_mtu(struct net_device *ndev, int new_mtu)
1015{
1016 struct qede_dev *edev = netdev_priv(ndev);
1017 struct qede_reload_args args;
1018
1019 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1020 "Configuring MTU size of %d\n", new_mtu);
1021
1022 if (new_mtu > PAGE_SIZE)
1023 ndev->features &= ~NETIF_F_GRO_HW;
1024
1025
1026 args.u.mtu = new_mtu;
1027 args.func = &qede_update_mtu;
1028 qede_reload(edev, &args, false);
1029#if IS_ENABLED(CONFIG_QED_RDMA)
1030 qede_rdma_event_change_mtu(edev);
1031#endif
1032 edev->ops->common->update_mtu(edev->cdev, new_mtu);
1033
1034 return 0;
1035}
1036
1037static void qede_get_channels(struct net_device *dev,
1038 struct ethtool_channels *channels)
1039{
1040 struct qede_dev *edev = netdev_priv(dev);
1041
1042 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
1043 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
1044 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
1045 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
1046 edev->fp_num_rx;
1047 channels->tx_count = edev->fp_num_tx;
1048 channels->rx_count = edev->fp_num_rx;
1049}
1050
1051static int qede_set_channels(struct net_device *dev,
1052 struct ethtool_channels *channels)
1053{
1054 struct qede_dev *edev = netdev_priv(dev);
1055 u32 count;
1056
1057 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1058 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
1059 channels->rx_count, channels->tx_count,
1060 channels->other_count, channels->combined_count);
1061
1062 count = channels->rx_count + channels->tx_count +
1063 channels->combined_count;
1064
1065
1066 if (channels->other_count) {
1067 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1068 "command parameters not supported\n");
1069 return -EINVAL;
1070 }
1071
1072 if (!(channels->combined_count || (channels->rx_count &&
1073 channels->tx_count))) {
1074 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1075 "need to request at least one transmit and one receive channel\n");
1076 return -EINVAL;
1077 }
1078
1079 if (count > QEDE_MAX_RSS_CNT(edev)) {
1080 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1081 "requested channels = %d max supported channels = %d\n",
1082 count, QEDE_MAX_RSS_CNT(edev));
1083 return -EINVAL;
1084 }
1085
1086
1087 if ((count == QEDE_QUEUE_CNT(edev)) &&
1088 (channels->tx_count == edev->fp_num_tx) &&
1089 (channels->rx_count == edev->fp_num_rx)) {
1090 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1091 "No change in active parameters\n");
1092 return 0;
1093 }
1094
1095
1096 if ((count % edev->dev_info.common.num_hwfns) ||
1097 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1098 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1099 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1100 "Number of channels must be divisible by %04x\n",
1101 edev->dev_info.common.num_hwfns);
1102 return -EINVAL;
1103 }
1104
1105
1106 edev->req_queues = count;
1107 edev->req_num_tx = channels->tx_count;
1108 edev->req_num_rx = channels->rx_count;
1109
1110 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1111 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1112 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1113 }
1114
1115 qede_reload(edev, NULL, false);
1116
1117 return 0;
1118}
1119
1120static int qede_get_ts_info(struct net_device *dev,
1121 struct ethtool_ts_info *info)
1122{
1123 struct qede_dev *edev = netdev_priv(dev);
1124
1125 return qede_ptp_get_ts_info(edev, info);
1126}
1127
1128static int qede_set_phys_id(struct net_device *dev,
1129 enum ethtool_phys_id_state state)
1130{
1131 struct qede_dev *edev = netdev_priv(dev);
1132 u8 led_state = 0;
1133
1134 switch (state) {
1135 case ETHTOOL_ID_ACTIVE:
1136 return 1;
1137
1138 case ETHTOOL_ID_ON:
1139 led_state = QED_LED_MODE_ON;
1140 break;
1141
1142 case ETHTOOL_ID_OFF:
1143 led_state = QED_LED_MODE_OFF;
1144 break;
1145
1146 case ETHTOOL_ID_INACTIVE:
1147 led_state = QED_LED_MODE_RESTORE;
1148 break;
1149 }
1150
1151 edev->ops->common->set_led(edev->cdev, led_state);
1152
1153 return 0;
1154}
1155
1156static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1157{
1158 info->data = RXH_IP_SRC | RXH_IP_DST;
1159
1160 switch (info->flow_type) {
1161 case TCP_V4_FLOW:
1162 case TCP_V6_FLOW:
1163 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1164 break;
1165 case UDP_V4_FLOW:
1166 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1167 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1168 break;
1169 case UDP_V6_FLOW:
1170 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1171 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1172 break;
1173 case IPV4_FLOW:
1174 case IPV6_FLOW:
1175 break;
1176 default:
1177 info->data = 0;
1178 break;
1179 }
1180
1181 return 0;
1182}
1183
1184static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1185 u32 *rule_locs)
1186{
1187 struct qede_dev *edev = netdev_priv(dev);
1188 int rc = 0;
1189
1190 switch (info->cmd) {
1191 case ETHTOOL_GRXRINGS:
1192 info->data = QEDE_RSS_COUNT(edev);
1193 break;
1194 case ETHTOOL_GRXFH:
1195 rc = qede_get_rss_flags(edev, info);
1196 break;
1197 case ETHTOOL_GRXCLSRLCNT:
1198 info->rule_cnt = qede_get_arfs_filter_count(edev);
1199 info->data = QEDE_RFS_MAX_FLTR;
1200 break;
1201 case ETHTOOL_GRXCLSRULE:
1202 rc = qede_get_cls_rule_entry(edev, info);
1203 break;
1204 case ETHTOOL_GRXCLSRLALL:
1205 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1206 break;
1207 default:
1208 DP_ERR(edev, "Command parameters not supported\n");
1209 rc = -EOPNOTSUPP;
1210 }
1211
1212 return rc;
1213}
1214
1215static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1216{
1217 struct qed_update_vport_params *vport_update_params;
1218 u8 set_caps = 0, clr_caps = 0;
1219 int rc = 0;
1220
1221 DP_VERBOSE(edev, QED_MSG_DEBUG,
1222 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1223 info->flow_type, info->data);
1224
1225 switch (info->flow_type) {
1226 case TCP_V4_FLOW:
1227 case TCP_V6_FLOW:
1228
1229 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1230 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1231 DP_INFO(edev, "Command parameters not supported\n");
1232 return -EINVAL;
1233 }
1234 return 0;
1235 case UDP_V4_FLOW:
1236
1237 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1238 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1239 set_caps = QED_RSS_IPV4_UDP;
1240 DP_VERBOSE(edev, QED_MSG_DEBUG,
1241 "UDP 4-tuple enabled\n");
1242 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1243 clr_caps = QED_RSS_IPV4_UDP;
1244 DP_VERBOSE(edev, QED_MSG_DEBUG,
1245 "UDP 4-tuple disabled\n");
1246 } else {
1247 return -EINVAL;
1248 }
1249 break;
1250 case UDP_V6_FLOW:
1251
1252 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1253 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1254 set_caps = QED_RSS_IPV6_UDP;
1255 DP_VERBOSE(edev, QED_MSG_DEBUG,
1256 "UDP 4-tuple enabled\n");
1257 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1258 clr_caps = QED_RSS_IPV6_UDP;
1259 DP_VERBOSE(edev, QED_MSG_DEBUG,
1260 "UDP 4-tuple disabled\n");
1261 } else {
1262 return -EINVAL;
1263 }
1264 break;
1265 case IPV4_FLOW:
1266 case IPV6_FLOW:
1267
1268 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1269 DP_INFO(edev, "Command parameters not supported\n");
1270 return -EINVAL;
1271 }
1272 return 0;
1273 case SCTP_V4_FLOW:
1274 case AH_ESP_V4_FLOW:
1275 case AH_V4_FLOW:
1276 case ESP_V4_FLOW:
1277 case SCTP_V6_FLOW:
1278 case AH_ESP_V6_FLOW:
1279 case AH_V6_FLOW:
1280 case ESP_V6_FLOW:
1281 case IP_USER_FLOW:
1282 case ETHER_FLOW:
1283
1284 if (info->data) {
1285 DP_INFO(edev, "Command parameters not supported\n");
1286 return -EINVAL;
1287 }
1288 return 0;
1289 default:
1290 return -EINVAL;
1291 }
1292
1293
1294 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1295 return 0;
1296
1297
1298 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1299 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1300
1301
1302 __qede_lock(edev);
1303 if (edev->state == QEDE_STATE_OPEN) {
1304 vport_update_params = vzalloc(sizeof(*vport_update_params));
1305 if (!vport_update_params) {
1306 __qede_unlock(edev);
1307 return -ENOMEM;
1308 }
1309 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1310 &vport_update_params->update_rss_flg);
1311 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1312 vfree(vport_update_params);
1313 }
1314 __qede_unlock(edev);
1315
1316 return rc;
1317}
1318
1319static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1320{
1321 struct qede_dev *edev = netdev_priv(dev);
1322 int rc;
1323
1324 switch (info->cmd) {
1325 case ETHTOOL_SRXFH:
1326 rc = qede_set_rss_flags(edev, info);
1327 break;
1328 case ETHTOOL_SRXCLSRLINS:
1329 rc = qede_add_cls_rule(edev, info);
1330 break;
1331 case ETHTOOL_SRXCLSRLDEL:
1332 rc = qede_delete_flow_filter(edev, info->fs.location);
1333 break;
1334 default:
1335 DP_INFO(edev, "Command parameters not supported\n");
1336 rc = -EOPNOTSUPP;
1337 }
1338
1339 return rc;
1340}
1341
1342static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1343{
1344 return QED_RSS_IND_TABLE_SIZE;
1345}
1346
1347static u32 qede_get_rxfh_key_size(struct net_device *dev)
1348{
1349 struct qede_dev *edev = netdev_priv(dev);
1350
1351 return sizeof(edev->rss_key);
1352}
1353
1354static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1355{
1356 struct qede_dev *edev = netdev_priv(dev);
1357 int i;
1358
1359 if (hfunc)
1360 *hfunc = ETH_RSS_HASH_TOP;
1361
1362 if (!indir)
1363 return 0;
1364
1365 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1366 indir[i] = edev->rss_ind_table[i];
1367
1368 if (key)
1369 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1370
1371 return 0;
1372}
1373
1374static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1375 const u8 *key, const u8 hfunc)
1376{
1377 struct qed_update_vport_params *vport_update_params;
1378 struct qede_dev *edev = netdev_priv(dev);
1379 int i, rc = 0;
1380
1381 if (edev->dev_info.common.num_hwfns > 1) {
1382 DP_INFO(edev,
1383 "RSS configuration is not supported for 100G devices\n");
1384 return -EOPNOTSUPP;
1385 }
1386
1387 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1388 return -EOPNOTSUPP;
1389
1390 if (!indir && !key)
1391 return 0;
1392
1393 if (indir) {
1394 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1395 edev->rss_ind_table[i] = indir[i];
1396 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1397 }
1398
1399 if (key) {
1400 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1401 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1402 }
1403
1404 __qede_lock(edev);
1405 if (edev->state == QEDE_STATE_OPEN) {
1406 vport_update_params = vzalloc(sizeof(*vport_update_params));
1407 if (!vport_update_params) {
1408 __qede_unlock(edev);
1409 return -ENOMEM;
1410 }
1411 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1412 &vport_update_params->update_rss_flg);
1413 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1414 vfree(vport_update_params);
1415 }
1416 __qede_unlock(edev);
1417
1418 return rc;
1419}
1420
1421
1422static void qede_netif_start(struct qede_dev *edev)
1423{
1424 int i;
1425
1426 if (!netif_running(edev->ndev))
1427 return;
1428
1429 for_each_queue(i) {
1430
1431 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1432 napi_enable(&edev->fp_array[i].napi);
1433 }
1434}
1435
1436
1437static void qede_netif_stop(struct qede_dev *edev)
1438{
1439 int i;
1440
1441 for_each_queue(i) {
1442 napi_disable(&edev->fp_array[i].napi);
1443
1444 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1445 }
1446}
1447
1448static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1449 struct sk_buff *skb)
1450{
1451 struct qede_tx_queue *txq = NULL;
1452 struct eth_tx_1st_bd *first_bd;
1453 dma_addr_t mapping;
1454 int i, idx;
1455 u16 val;
1456
1457 for_each_queue(i) {
1458 struct qede_fastpath *fp = &edev->fp_array[i];
1459
1460 if (fp->type & QEDE_FASTPATH_TX) {
1461 txq = QEDE_FP_TC0_TXQ(fp);
1462 break;
1463 }
1464 }
1465
1466 if (!txq) {
1467 DP_NOTICE(edev, "Tx path is not available\n");
1468 return -1;
1469 }
1470
1471
1472 idx = txq->sw_tx_prod;
1473 txq->sw_tx_ring.skbs[idx].skb = skb;
1474 first_bd = qed_chain_produce(&txq->tx_pbl);
1475 memset(first_bd, 0, sizeof(*first_bd));
1476 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1477 first_bd->data.bd_flags.bitfields = val;
1478 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1479 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1480 first_bd->data.bitfields |= cpu_to_le16(val);
1481
1482
1483 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1484 skb_headlen(skb), DMA_TO_DEVICE);
1485 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1486 DP_NOTICE(edev, "SKB mapping failed\n");
1487 return -ENOMEM;
1488 }
1489 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1490
1491
1492 first_bd->data.nbds = 1;
1493 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1494
1495 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1496 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1497
1498
1499
1500
1501 wmb();
1502 barrier();
1503 writel(txq->tx_db.raw, txq->doorbell_addr);
1504
1505 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1506 if (qede_txq_has_work(txq))
1507 break;
1508 usleep_range(100, 200);
1509 }
1510
1511 if (!qede_txq_has_work(txq)) {
1512 DP_NOTICE(edev, "Tx completion didn't happen\n");
1513 return -1;
1514 }
1515
1516 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1517 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1518 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1519 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1520 txq->sw_tx_ring.skbs[idx].skb = NULL;
1521
1522 return 0;
1523}
1524
1525static int qede_selftest_receive_traffic(struct qede_dev *edev)
1526{
1527 u16 sw_rx_index, len;
1528 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1529 struct qede_rx_queue *rxq = NULL;
1530 struct sw_rx_data *sw_rx_data;
1531 union eth_rx_cqe *cqe;
1532 int i, iter, rc = 0;
1533 u8 *data_ptr;
1534
1535 for_each_queue(i) {
1536 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1537 rxq = edev->fp_array[i].rxq;
1538 break;
1539 }
1540 }
1541
1542 if (!rxq) {
1543 DP_NOTICE(edev, "Rx path is not available\n");
1544 return -1;
1545 }
1546
1547
1548
1549
1550
1551 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1552 if (!qede_has_rx_work(rxq)) {
1553 usleep_range(100, 200);
1554 continue;
1555 }
1556
1557
1558 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1559
1560
1561 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1562 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1563 fp_cqe = &cqe->fast_path_regular;
1564 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1565 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1566 fp_cqe->placement_offset +
1567 sw_rx_data->page_offset +
1568 rxq->rx_headroom);
1569 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1570 ether_addr_equal(data_ptr + ETH_ALEN,
1571 edev->ndev->dev_addr)) {
1572 for (i = ETH_HLEN; i < len; i++)
1573 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1574 rc = -1;
1575 break;
1576 }
1577
1578 qede_recycle_rx_bd_ring(rxq, 1);
1579 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1580 break;
1581 }
1582
1583 DP_INFO(edev, "Not the transmitted packet\n");
1584 qede_recycle_rx_bd_ring(rxq, 1);
1585 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1586 }
1587
1588 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1589 DP_NOTICE(edev, "Failed to receive the traffic\n");
1590 return -1;
1591 }
1592
1593 qede_update_rx_prod(edev, rxq);
1594
1595 return rc;
1596}
1597
1598static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1599{
1600 struct qed_link_params link_params;
1601 struct sk_buff *skb = NULL;
1602 int rc = 0, i;
1603 u32 pkt_size;
1604 u8 *packet;
1605
1606 if (!netif_running(edev->ndev)) {
1607 DP_NOTICE(edev, "Interface is down\n");
1608 return -EINVAL;
1609 }
1610
1611 qede_netif_stop(edev);
1612
1613
1614 memset(&link_params, 0, sizeof(link_params));
1615 link_params.link_up = true;
1616 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1617 link_params.loopback_mode = loopback_mode;
1618 edev->ops->common->set_link(edev->cdev, &link_params);
1619
1620
1621 msleep_interruptible(500);
1622
1623
1624
1625
1626 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ?
1627 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN);
1628
1629 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1630 if (!skb) {
1631 DP_INFO(edev, "Can't allocate skb\n");
1632 rc = -ENOMEM;
1633 goto test_loopback_exit;
1634 }
1635 packet = skb_put(skb, pkt_size);
1636 ether_addr_copy(packet, edev->ndev->dev_addr);
1637 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1638 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1639 for (i = ETH_HLEN; i < pkt_size; i++)
1640 packet[i] = (unsigned char)(i & 0xff);
1641
1642 rc = qede_selftest_transmit_traffic(edev, skb);
1643 if (rc)
1644 goto test_loopback_exit;
1645
1646 rc = qede_selftest_receive_traffic(edev);
1647 if (rc)
1648 goto test_loopback_exit;
1649
1650 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1651
1652test_loopback_exit:
1653 dev_kfree_skb(skb);
1654
1655
1656 memset(&link_params, 0, sizeof(link_params));
1657 link_params.link_up = true;
1658 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1659 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1660 edev->ops->common->set_link(edev->cdev, &link_params);
1661
1662
1663 msleep_interruptible(500);
1664
1665 qede_netif_start(edev);
1666
1667 return rc;
1668}
1669
1670static void qede_self_test(struct net_device *dev,
1671 struct ethtool_test *etest, u64 *buf)
1672{
1673 struct qede_dev *edev = netdev_priv(dev);
1674
1675 DP_VERBOSE(edev, QED_MSG_DEBUG,
1676 "Self-test command parameters: offline = %d, external_lb = %d\n",
1677 (etest->flags & ETH_TEST_FL_OFFLINE),
1678 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1679
1680 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1681
1682 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1683 if (qede_selftest_run_loopback(edev,
1684 QED_LINK_LOOPBACK_INT_PHY)) {
1685 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1686 etest->flags |= ETH_TEST_FL_FAILED;
1687 }
1688 }
1689
1690 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1691 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1692 etest->flags |= ETH_TEST_FL_FAILED;
1693 }
1694
1695 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1696 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1697 etest->flags |= ETH_TEST_FL_FAILED;
1698 }
1699
1700 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1701 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1702 etest->flags |= ETH_TEST_FL_FAILED;
1703 }
1704
1705 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1706 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1707 etest->flags |= ETH_TEST_FL_FAILED;
1708 }
1709
1710 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1711 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1712 etest->flags |= ETH_TEST_FL_FAILED;
1713 }
1714}
1715
1716static int qede_set_tunable(struct net_device *dev,
1717 const struct ethtool_tunable *tuna,
1718 const void *data)
1719{
1720 struct qede_dev *edev = netdev_priv(dev);
1721 u32 val;
1722
1723 switch (tuna->id) {
1724 case ETHTOOL_RX_COPYBREAK:
1725 val = *(u32 *)data;
1726 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1727 DP_VERBOSE(edev, QED_MSG_DEBUG,
1728 "Invalid rx copy break value, range is [%u, %u]",
1729 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1730 return -EINVAL;
1731 }
1732
1733 edev->rx_copybreak = *(u32 *)data;
1734 break;
1735 default:
1736 return -EOPNOTSUPP;
1737 }
1738
1739 return 0;
1740}
1741
1742static int qede_get_tunable(struct net_device *dev,
1743 const struct ethtool_tunable *tuna, void *data)
1744{
1745 struct qede_dev *edev = netdev_priv(dev);
1746
1747 switch (tuna->id) {
1748 case ETHTOOL_RX_COPYBREAK:
1749 *(u32 *)data = edev->rx_copybreak;
1750 break;
1751 default:
1752 return -EOPNOTSUPP;
1753 }
1754
1755 return 0;
1756}
1757
1758static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1759{
1760 struct qede_dev *edev = netdev_priv(dev);
1761 struct qed_link_output current_link;
1762
1763 memset(¤t_link, 0, sizeof(current_link));
1764 edev->ops->common->get_link(edev->cdev, ¤t_link);
1765
1766 if (!current_link.eee_supported) {
1767 DP_INFO(edev, "EEE is not supported\n");
1768 return -EOPNOTSUPP;
1769 }
1770
1771 if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1772 edata->advertised = ADVERTISED_1000baseT_Full;
1773 if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1774 edata->advertised |= ADVERTISED_10000baseT_Full;
1775 if (current_link.sup_caps & QED_EEE_1G_ADV)
1776 edata->supported = ADVERTISED_1000baseT_Full;
1777 if (current_link.sup_caps & QED_EEE_10G_ADV)
1778 edata->supported |= ADVERTISED_10000baseT_Full;
1779 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1780 edata->lp_advertised = ADVERTISED_1000baseT_Full;
1781 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1782 edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1783
1784 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1785 edata->eee_enabled = current_link.eee.enable;
1786 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1787 edata->eee_active = current_link.eee_active;
1788
1789 return 0;
1790}
1791
1792static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1793{
1794 struct qede_dev *edev = netdev_priv(dev);
1795 struct qed_link_output current_link;
1796 struct qed_link_params params;
1797
1798 if (!edev->ops->common->can_link_change(edev->cdev)) {
1799 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1800 return -EOPNOTSUPP;
1801 }
1802
1803 memset(¤t_link, 0, sizeof(current_link));
1804 edev->ops->common->get_link(edev->cdev, ¤t_link);
1805
1806 if (!current_link.eee_supported) {
1807 DP_INFO(edev, "EEE is not supported\n");
1808 return -EOPNOTSUPP;
1809 }
1810
1811 memset(¶ms, 0, sizeof(params));
1812 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1813
1814 if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1815 ADVERTISED_10000baseT_Full)) ||
1816 ((edata->advertised & (ADVERTISED_1000baseT_Full |
1817 ADVERTISED_10000baseT_Full)) !=
1818 edata->advertised)) {
1819 DP_VERBOSE(edev, QED_MSG_DEBUG,
1820 "Invalid advertised capabilities %d\n",
1821 edata->advertised);
1822 return -EINVAL;
1823 }
1824
1825 if (edata->advertised & ADVERTISED_1000baseT_Full)
1826 params.eee.adv_caps = QED_EEE_1G_ADV;
1827 if (edata->advertised & ADVERTISED_10000baseT_Full)
1828 params.eee.adv_caps |= QED_EEE_10G_ADV;
1829 params.eee.enable = edata->eee_enabled;
1830 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1831 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1832
1833 params.link_up = true;
1834 edev->ops->common->set_link(edev->cdev, ¶ms);
1835
1836 return 0;
1837}
1838
1839static u32 qede_link_to_ethtool_fec(u32 link_fec)
1840{
1841 u32 eth_fec = 0;
1842
1843 if (link_fec & QED_FEC_MODE_NONE)
1844 eth_fec |= ETHTOOL_FEC_OFF;
1845 if (link_fec & QED_FEC_MODE_FIRECODE)
1846 eth_fec |= ETHTOOL_FEC_BASER;
1847 if (link_fec & QED_FEC_MODE_RS)
1848 eth_fec |= ETHTOOL_FEC_RS;
1849 if (link_fec & QED_FEC_MODE_AUTO)
1850 eth_fec |= ETHTOOL_FEC_AUTO;
1851 if (link_fec & QED_FEC_MODE_UNSUPPORTED)
1852 eth_fec |= ETHTOOL_FEC_NONE;
1853
1854 return eth_fec;
1855}
1856
1857static u32 qede_ethtool_to_link_fec(u32 eth_fec)
1858{
1859 u32 link_fec = 0;
1860
1861 if (eth_fec & ETHTOOL_FEC_OFF)
1862 link_fec |= QED_FEC_MODE_NONE;
1863 if (eth_fec & ETHTOOL_FEC_BASER)
1864 link_fec |= QED_FEC_MODE_FIRECODE;
1865 if (eth_fec & ETHTOOL_FEC_RS)
1866 link_fec |= QED_FEC_MODE_RS;
1867 if (eth_fec & ETHTOOL_FEC_AUTO)
1868 link_fec |= QED_FEC_MODE_AUTO;
1869 if (eth_fec & ETHTOOL_FEC_NONE)
1870 link_fec |= QED_FEC_MODE_UNSUPPORTED;
1871
1872 return link_fec;
1873}
1874
1875static int qede_get_fecparam(struct net_device *dev,
1876 struct ethtool_fecparam *fecparam)
1877{
1878 struct qede_dev *edev = netdev_priv(dev);
1879 struct qed_link_output curr_link;
1880
1881 memset(&curr_link, 0, sizeof(curr_link));
1882 edev->ops->common->get_link(edev->cdev, &curr_link);
1883
1884 fecparam->active_fec = qede_link_to_ethtool_fec(curr_link.active_fec);
1885 fecparam->fec = qede_link_to_ethtool_fec(curr_link.sup_fec);
1886
1887 return 0;
1888}
1889
1890static int qede_set_fecparam(struct net_device *dev,
1891 struct ethtool_fecparam *fecparam)
1892{
1893 struct qede_dev *edev = netdev_priv(dev);
1894 struct qed_link_params params;
1895
1896 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
1897 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1898 return -EOPNOTSUPP;
1899 }
1900
1901 memset(¶ms, 0, sizeof(params));
1902 params.override_flags |= QED_LINK_OVERRIDE_FEC_CONFIG;
1903 params.fec = qede_ethtool_to_link_fec(fecparam->fec);
1904 params.link_up = true;
1905
1906 edev->ops->common->set_link(edev->cdev, ¶ms);
1907
1908 return 0;
1909}
1910
1911static int qede_get_module_info(struct net_device *dev,
1912 struct ethtool_modinfo *modinfo)
1913{
1914 struct qede_dev *edev = netdev_priv(dev);
1915 u8 buf[4];
1916 int rc;
1917
1918
1919 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1920 QED_I2C_DEV_ADDR_A0, 0, 4);
1921 if (rc) {
1922 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1923 return rc;
1924 }
1925
1926 switch (buf[0]) {
1927 case 0x3:
1928 modinfo->type = ETH_MODULE_SFF_8472;
1929 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1930 break;
1931 case 0xc:
1932 case 0xd:
1933 modinfo->type = ETH_MODULE_SFF_8436;
1934 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1935 break;
1936 case 0x11:
1937 modinfo->type = ETH_MODULE_SFF_8636;
1938 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1939 break;
1940 default:
1941 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1942 return -EINVAL;
1943 }
1944
1945 return 0;
1946}
1947
1948static int qede_get_module_eeprom(struct net_device *dev,
1949 struct ethtool_eeprom *ee, u8 *data)
1950{
1951 struct qede_dev *edev = netdev_priv(dev);
1952 u32 start_addr = ee->offset, size = 0;
1953 u8 *buf = data;
1954 int rc = 0;
1955
1956
1957 if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1958
1959 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1960 size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1961 else
1962 size = ee->len;
1963
1964 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1965 QED_I2C_DEV_ADDR_A0,
1966 start_addr, size);
1967 if (rc) {
1968 DP_ERR(edev, "Failed reading A0 section %d\n", rc);
1969 return rc;
1970 }
1971
1972 buf += size;
1973 start_addr += size;
1974 }
1975
1976
1977 if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
1978 start_addr < ETH_MODULE_SFF_8472_LEN) {
1979 size = ee->len - size;
1980
1981 if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
1982 size = ETH_MODULE_SFF_8472_LEN - start_addr;
1983 start_addr -= ETH_MODULE_SFF_8079_LEN;
1984 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1985 QED_I2C_DEV_ADDR_A2,
1986 start_addr, size);
1987 if (rc) {
1988 DP_VERBOSE(edev, QED_MSG_DEBUG,
1989 "Failed reading A2 section %d\n", rc);
1990 return 0;
1991 }
1992 }
1993
1994 return rc;
1995}
1996
1997static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val)
1998{
1999 struct qede_dev *edev = netdev_priv(dev);
2000 int rc = 0;
2001
2002 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) {
2003 if (val->flag > QEDE_DUMP_CMD_MAX) {
2004 DP_ERR(edev, "Invalid command %d\n", val->flag);
2005 return -EINVAL;
2006 }
2007 edev->dump_info.cmd = val->flag;
2008 edev->dump_info.num_args = 0;
2009 return 0;
2010 }
2011
2012 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) {
2013 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args);
2014 return -EINVAL;
2015 }
2016
2017 switch (edev->dump_info.cmd) {
2018 case QEDE_DUMP_CMD_NVM_CFG:
2019 edev->dump_info.args[edev->dump_info.num_args] = val->flag;
2020 edev->dump_info.num_args++;
2021 break;
2022 case QEDE_DUMP_CMD_GRCDUMP:
2023 rc = edev->ops->common->set_grc_config(edev->cdev,
2024 val->flag, 1);
2025 break;
2026 default:
2027 break;
2028 }
2029
2030 return rc;
2031}
2032
2033static int qede_get_dump_flag(struct net_device *dev,
2034 struct ethtool_dump *dump)
2035{
2036 struct qede_dev *edev = netdev_priv(dev);
2037
2038 if (!edev->ops || !edev->ops->common) {
2039 DP_ERR(edev, "Edev ops not populated\n");
2040 return -EINVAL;
2041 }
2042
2043 dump->version = QEDE_DUMP_VERSION;
2044 switch (edev->dump_info.cmd) {
2045 case QEDE_DUMP_CMD_NVM_CFG:
2046 dump->flag = QEDE_DUMP_CMD_NVM_CFG;
2047 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev,
2048 edev->dump_info.args[0]);
2049 break;
2050 case QEDE_DUMP_CMD_GRCDUMP:
2051 dump->flag = QEDE_DUMP_CMD_GRCDUMP;
2052 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev);
2053 break;
2054 default:
2055 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2056 return -EINVAL;
2057 }
2058
2059 DP_VERBOSE(edev, QED_MSG_DEBUG,
2060 "dump->version = 0x%x dump->flag = %d dump->len = %d\n",
2061 dump->version, dump->flag, dump->len);
2062 return 0;
2063}
2064
2065static int qede_get_dump_data(struct net_device *dev,
2066 struct ethtool_dump *dump, void *buf)
2067{
2068 struct qede_dev *edev = netdev_priv(dev);
2069 int rc = 0;
2070
2071 if (!edev->ops || !edev->ops->common) {
2072 DP_ERR(edev, "Edev ops not populated\n");
2073 rc = -EINVAL;
2074 goto err;
2075 }
2076
2077 switch (edev->dump_info.cmd) {
2078 case QEDE_DUMP_CMD_NVM_CFG:
2079 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) {
2080 DP_ERR(edev, "Arg count = %d required = %d\n",
2081 edev->dump_info.num_args,
2082 QEDE_DUMP_NVM_ARG_COUNT);
2083 rc = -EINVAL;
2084 goto err;
2085 }
2086 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf,
2087 edev->dump_info.args[0],
2088 edev->dump_info.args[1]);
2089 break;
2090 case QEDE_DUMP_CMD_GRCDUMP:
2091 memset(buf, 0, dump->len);
2092 rc = edev->ops->common->dbg_all_data(edev->cdev, buf);
2093 break;
2094 default:
2095 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2096 rc = -EINVAL;
2097 break;
2098 }
2099
2100err:
2101 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE;
2102 edev->dump_info.num_args = 0;
2103 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args));
2104
2105 return rc;
2106}
2107
2108static const struct ethtool_ops qede_ethtool_ops = {
2109 .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
2110 .get_link_ksettings = qede_get_link_ksettings,
2111 .set_link_ksettings = qede_set_link_ksettings,
2112 .get_drvinfo = qede_get_drvinfo,
2113 .get_regs_len = qede_get_regs_len,
2114 .get_regs = qede_get_regs,
2115 .get_wol = qede_get_wol,
2116 .set_wol = qede_set_wol,
2117 .get_msglevel = qede_get_msglevel,
2118 .set_msglevel = qede_set_msglevel,
2119 .nway_reset = qede_nway_reset,
2120 .get_link = qede_get_link,
2121 .get_coalesce = qede_get_coalesce,
2122 .set_coalesce = qede_set_coalesce,
2123 .get_ringparam = qede_get_ringparam,
2124 .set_ringparam = qede_set_ringparam,
2125 .get_pauseparam = qede_get_pauseparam,
2126 .set_pauseparam = qede_set_pauseparam,
2127 .get_strings = qede_get_strings,
2128 .set_phys_id = qede_set_phys_id,
2129 .get_ethtool_stats = qede_get_ethtool_stats,
2130 .get_priv_flags = qede_get_priv_flags,
2131 .set_priv_flags = qede_set_priv_flags,
2132 .get_sset_count = qede_get_sset_count,
2133 .get_rxnfc = qede_get_rxnfc,
2134 .set_rxnfc = qede_set_rxnfc,
2135 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2136 .get_rxfh_key_size = qede_get_rxfh_key_size,
2137 .get_rxfh = qede_get_rxfh,
2138 .set_rxfh = qede_set_rxfh,
2139 .get_ts_info = qede_get_ts_info,
2140 .get_channels = qede_get_channels,
2141 .set_channels = qede_set_channels,
2142 .self_test = qede_self_test,
2143 .get_module_info = qede_get_module_info,
2144 .get_module_eeprom = qede_get_module_eeprom,
2145 .get_eee = qede_get_eee,
2146 .set_eee = qede_set_eee,
2147 .get_fecparam = qede_get_fecparam,
2148 .set_fecparam = qede_set_fecparam,
2149 .get_tunable = qede_get_tunable,
2150 .set_tunable = qede_set_tunable,
2151 .flash_device = qede_flash_device,
2152 .get_dump_flag = qede_get_dump_flag,
2153 .get_dump_data = qede_get_dump_data,
2154 .set_dump = qede_set_dump,
2155};
2156
2157static const struct ethtool_ops qede_vf_ethtool_ops = {
2158 .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
2159 .get_link_ksettings = qede_get_link_ksettings,
2160 .get_drvinfo = qede_get_drvinfo,
2161 .get_msglevel = qede_get_msglevel,
2162 .set_msglevel = qede_set_msglevel,
2163 .get_link = qede_get_link,
2164 .get_coalesce = qede_get_coalesce,
2165 .set_coalesce = qede_set_coalesce,
2166 .get_ringparam = qede_get_ringparam,
2167 .set_ringparam = qede_set_ringparam,
2168 .get_strings = qede_get_strings,
2169 .get_ethtool_stats = qede_get_ethtool_stats,
2170 .get_priv_flags = qede_get_priv_flags,
2171 .get_sset_count = qede_get_sset_count,
2172 .get_rxnfc = qede_get_rxnfc,
2173 .set_rxnfc = qede_set_rxnfc,
2174 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2175 .get_rxfh_key_size = qede_get_rxfh_key_size,
2176 .get_rxfh = qede_get_rxfh,
2177 .set_rxfh = qede_set_rxfh,
2178 .get_channels = qede_get_channels,
2179 .set_channels = qede_set_channels,
2180 .get_tunable = qede_get_tunable,
2181 .set_tunable = qede_set_tunable,
2182};
2183
2184void qede_set_ethtool_ops(struct net_device *dev)
2185{
2186 struct qede_dev *edev = netdev_priv(dev);
2187
2188 if (IS_VF(edev))
2189 dev->ethtool_ops = &qede_vf_ethtool_ops;
2190 else
2191 dev->ethtool_ops = &qede_ethtool_ops;
2192}
2193
