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7#include <linux/netdevice.h>
8#include <linux/etherdevice.h>
9#include <linux/skbuff.h>
10#include <linux/bpf_trace.h>
11#include <net/udp_tunnel.h>
12#include <linux/ip.h>
13#include <net/ipv6.h>
14#include <net/tcp.h>
15#include <linux/if_ether.h>
16#include <linux/if_vlan.h>
17#include <net/ip6_checksum.h>
18#include "qede_ptp.h"
19
20#include <linux/qed/qed_if.h>
21#include "qede.h"
22
23
24
25
26int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
27{
28 struct sw_rx_data *sw_rx_data;
29 struct eth_rx_bd *rx_bd;
30 dma_addr_t mapping;
31 struct page *data;
32
33
34
35
36
37 if (allow_lazy && likely(rxq->filled_buffers > 12)) {
38 rxq->filled_buffers--;
39 return 0;
40 }
41
42 data = alloc_pages(GFP_ATOMIC, 0);
43 if (unlikely(!data))
44 return -ENOMEM;
45
46
47
48
49 mapping = dma_map_page(rxq->dev, data, 0,
50 PAGE_SIZE, rxq->data_direction);
51 if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
52 __free_page(data);
53 return -ENOMEM;
54 }
55
56 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
57 sw_rx_data->page_offset = 0;
58 sw_rx_data->data = data;
59 sw_rx_data->mapping = mapping;
60
61
62 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
63 WARN_ON(!rx_bd);
64 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
65 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping) +
66 rxq->rx_headroom);
67
68 rxq->sw_rx_prod++;
69 rxq->filled_buffers++;
70
71 return 0;
72}
73
74
75int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
76{
77 u16 idx = txq->sw_tx_cons;
78 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
79 struct eth_tx_1st_bd *first_bd;
80 struct eth_tx_bd *tx_data_bd;
81 int bds_consumed = 0;
82 int nbds;
83 bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
84 int i, split_bd_len = 0;
85
86 if (unlikely(!skb)) {
87 DP_ERR(edev,
88 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
89 idx, txq->sw_tx_cons, txq->sw_tx_prod);
90 return -1;
91 }
92
93 *len = skb->len;
94
95 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
96
97 bds_consumed++;
98
99 nbds = first_bd->data.nbds;
100
101 if (data_split) {
102 struct eth_tx_bd *split = (struct eth_tx_bd *)
103 qed_chain_consume(&txq->tx_pbl);
104 split_bd_len = BD_UNMAP_LEN(split);
105 bds_consumed++;
106 }
107 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
108 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
109
110
111 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
112 tx_data_bd = (struct eth_tx_bd *)
113 qed_chain_consume(&txq->tx_pbl);
114 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
115 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
116 }
117
118 while (bds_consumed++ < nbds)
119 qed_chain_consume(&txq->tx_pbl);
120
121
122 dev_kfree_skb_any(skb);
123 txq->sw_tx_ring.skbs[idx].skb = NULL;
124 txq->sw_tx_ring.skbs[idx].flags = 0;
125
126 return 0;
127}
128
129
130static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
131 struct eth_tx_1st_bd *first_bd,
132 int nbd, bool data_split)
133{
134 u16 idx = txq->sw_tx_prod;
135 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
136 struct eth_tx_bd *tx_data_bd;
137 int i, split_bd_len = 0;
138
139
140 qed_chain_set_prod(&txq->tx_pbl,
141 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
142
143 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
144
145 if (data_split) {
146 struct eth_tx_bd *split = (struct eth_tx_bd *)
147 qed_chain_produce(&txq->tx_pbl);
148 split_bd_len = BD_UNMAP_LEN(split);
149 nbd--;
150 }
151
152 dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
153 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
154
155
156 for (i = 0; i < nbd; i++) {
157 tx_data_bd = (struct eth_tx_bd *)
158 qed_chain_produce(&txq->tx_pbl);
159 if (tx_data_bd->nbytes)
160 dma_unmap_page(txq->dev,
161 BD_UNMAP_ADDR(tx_data_bd),
162 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
163 }
164
165
166 qed_chain_set_prod(&txq->tx_pbl,
167 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
168
169
170 dev_kfree_skb_any(skb);
171 txq->sw_tx_ring.skbs[idx].skb = NULL;
172 txq->sw_tx_ring.skbs[idx].flags = 0;
173}
174
175static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
176{
177 u32 rc = XMIT_L4_CSUM;
178 __be16 l3_proto;
179
180 if (skb->ip_summed != CHECKSUM_PARTIAL)
181 return XMIT_PLAIN;
182
183 l3_proto = vlan_get_protocol(skb);
184 if (l3_proto == htons(ETH_P_IPV6) &&
185 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
186 *ipv6_ext = 1;
187
188 if (skb->encapsulation) {
189 rc |= XMIT_ENC;
190 if (skb_is_gso(skb)) {
191 unsigned short gso_type = skb_shinfo(skb)->gso_type;
192
193 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
194 (gso_type & SKB_GSO_GRE_CSUM))
195 rc |= XMIT_ENC_GSO_L4_CSUM;
196
197 rc |= XMIT_LSO;
198 return rc;
199 }
200 }
201
202 if (skb_is_gso(skb))
203 rc |= XMIT_LSO;
204
205 return rc;
206}
207
208static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
209 struct eth_tx_2nd_bd *second_bd,
210 struct eth_tx_3rd_bd *third_bd)
211{
212 u8 l4_proto;
213 u16 bd2_bits1 = 0, bd2_bits2 = 0;
214
215 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
216
217 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
218 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
219 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
220
221 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
222 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
223
224 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
225 l4_proto = ipv6_hdr(skb)->nexthdr;
226 else
227 l4_proto = ip_hdr(skb)->protocol;
228
229 if (l4_proto == IPPROTO_UDP)
230 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
231
232 if (third_bd)
233 third_bd->data.bitfields |=
234 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
235 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
236 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
237
238 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
239 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
240}
241
242static int map_frag_to_bd(struct qede_tx_queue *txq,
243 skb_frag_t *frag, struct eth_tx_bd *bd)
244{
245 dma_addr_t mapping;
246
247
248 mapping = skb_frag_dma_map(txq->dev, frag, 0,
249 skb_frag_size(frag), DMA_TO_DEVICE);
250 if (unlikely(dma_mapping_error(txq->dev, mapping)))
251 return -ENOMEM;
252
253
254 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
255
256 return 0;
257}
258
259static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
260{
261 if (is_encap_pkt)
262 return (skb_inner_transport_header(skb) +
263 inner_tcp_hdrlen(skb) - skb->data);
264 else
265 return (skb_transport_header(skb) +
266 tcp_hdrlen(skb) - skb->data);
267}
268
269
270#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
271static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
272{
273 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
274
275 if (xmit_type & XMIT_LSO) {
276 int hlen;
277
278 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
279
280
281 if (skb_headlen(skb) > hlen)
282 allowed_frags--;
283 }
284
285 return (skb_shinfo(skb)->nr_frags > allowed_frags);
286}
287#endif
288
289static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
290{
291
292
293
294 wmb();
295 barrier();
296 writel(txq->tx_db.raw, txq->doorbell_addr);
297
298
299
300
301
302 wmb();
303}
304
305static int qede_xdp_xmit(struct qede_tx_queue *txq, dma_addr_t dma, u16 pad,
306 u16 len, struct page *page, struct xdp_frame *xdpf)
307{
308 struct eth_tx_1st_bd *bd;
309 struct sw_tx_xdp *xdp;
310 u16 val;
311
312 if (unlikely(qed_chain_get_elem_used(&txq->tx_pbl) >=
313 txq->num_tx_buffers)) {
314 txq->stopped_cnt++;
315 return -ENOMEM;
316 }
317
318 bd = qed_chain_produce(&txq->tx_pbl);
319 bd->data.nbds = 1;
320 bd->data.bd_flags.bitfields = BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
321
322 val = (len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
323 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
324
325 bd->data.bitfields = cpu_to_le16(val);
326
327
328 BD_SET_UNMAP_ADDR_LEN(bd, dma + pad, len);
329
330 xdp = txq->sw_tx_ring.xdp + txq->sw_tx_prod;
331 xdp->mapping = dma;
332 xdp->page = page;
333 xdp->xdpf = xdpf;
334
335 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
336
337 return 0;
338}
339
340int qede_xdp_transmit(struct net_device *dev, int n_frames,
341 struct xdp_frame **frames, u32 flags)
342{
343 struct qede_dev *edev = netdev_priv(dev);
344 struct device *dmadev = &edev->pdev->dev;
345 struct qede_tx_queue *xdp_tx;
346 struct xdp_frame *xdpf;
347 dma_addr_t mapping;
348 int i, drops = 0;
349 u16 xdp_prod;
350
351 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
352 return -EINVAL;
353
354 if (unlikely(!netif_running(dev)))
355 return -ENETDOWN;
356
357 i = smp_processor_id() % edev->total_xdp_queues;
358 xdp_tx = edev->fp_array[i].xdp_tx;
359
360 spin_lock(&xdp_tx->xdp_tx_lock);
361
362 for (i = 0; i < n_frames; i++) {
363 xdpf = frames[i];
364
365 mapping = dma_map_single(dmadev, xdpf->data, xdpf->len,
366 DMA_TO_DEVICE);
367 if (unlikely(dma_mapping_error(dmadev, mapping))) {
368 xdp_return_frame_rx_napi(xdpf);
369 drops++;
370
371 continue;
372 }
373
374 if (unlikely(qede_xdp_xmit(xdp_tx, mapping, 0, xdpf->len,
375 NULL, xdpf))) {
376 xdp_return_frame_rx_napi(xdpf);
377 drops++;
378 }
379 }
380
381 if (flags & XDP_XMIT_FLUSH) {
382 xdp_prod = qed_chain_get_prod_idx(&xdp_tx->tx_pbl);
383
384 xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
385 qede_update_tx_producer(xdp_tx);
386 }
387
388 spin_unlock(&xdp_tx->xdp_tx_lock);
389
390 return n_frames - drops;
391}
392
393int qede_txq_has_work(struct qede_tx_queue *txq)
394{
395 u16 hw_bd_cons;
396
397
398 barrier();
399 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
400 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
401 return 0;
402
403 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
404}
405
406static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
407{
408 struct sw_tx_xdp *xdp_info, *xdp_arr = txq->sw_tx_ring.xdp;
409 struct device *dev = &edev->pdev->dev;
410 struct xdp_frame *xdpf;
411 u16 hw_bd_cons;
412
413 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
414 barrier();
415
416 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
417 xdp_info = xdp_arr + txq->sw_tx_cons;
418 xdpf = xdp_info->xdpf;
419
420 if (xdpf) {
421 dma_unmap_single(dev, xdp_info->mapping, xdpf->len,
422 DMA_TO_DEVICE);
423 xdp_return_frame(xdpf);
424
425 xdp_info->xdpf = NULL;
426 } else {
427 dma_unmap_page(dev, xdp_info->mapping, PAGE_SIZE,
428 DMA_BIDIRECTIONAL);
429 __free_page(xdp_info->page);
430 }
431
432 qed_chain_consume(&txq->tx_pbl);
433 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
434 txq->xmit_pkts++;
435 }
436}
437
438static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
439{
440 unsigned int pkts_compl = 0, bytes_compl = 0;
441 struct netdev_queue *netdev_txq;
442 u16 hw_bd_cons;
443 int rc;
444
445 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
446
447 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
448 barrier();
449
450 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
451 int len = 0;
452
453 rc = qede_free_tx_pkt(edev, txq, &len);
454 if (rc) {
455 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
456 hw_bd_cons,
457 qed_chain_get_cons_idx(&txq->tx_pbl));
458 break;
459 }
460
461 bytes_compl += len;
462 pkts_compl++;
463 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
464 txq->xmit_pkts++;
465 }
466
467 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
468
469
470
471
472
473
474
475
476
477
478 smp_mb();
479
480 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
481
482
483
484
485
486
487
488
489
490
491 __netif_tx_lock(netdev_txq, smp_processor_id());
492
493 if ((netif_tx_queue_stopped(netdev_txq)) &&
494 (edev->state == QEDE_STATE_OPEN) &&
495 (qed_chain_get_elem_left(&txq->tx_pbl)
496 >= (MAX_SKB_FRAGS + 1))) {
497 netif_tx_wake_queue(netdev_txq);
498 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
499 "Wake queue was called\n");
500 }
501
502 __netif_tx_unlock(netdev_txq);
503 }
504
505 return 0;
506}
507
508bool qede_has_rx_work(struct qede_rx_queue *rxq)
509{
510 u16 hw_comp_cons, sw_comp_cons;
511
512
513 barrier();
514
515 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
516 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
517
518 return hw_comp_cons != sw_comp_cons;
519}
520
521static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
522{
523 qed_chain_consume(&rxq->rx_bd_ring);
524 rxq->sw_rx_cons++;
525}
526
527
528
529
530static inline void qede_reuse_page(struct qede_rx_queue *rxq,
531 struct sw_rx_data *curr_cons)
532{
533 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
534 struct sw_rx_data *curr_prod;
535 dma_addr_t new_mapping;
536
537 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
538 *curr_prod = *curr_cons;
539
540 new_mapping = curr_prod->mapping + curr_prod->page_offset;
541
542 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
543 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping) +
544 rxq->rx_headroom);
545
546 rxq->sw_rx_prod++;
547 curr_cons->data = NULL;
548}
549
550
551
552
553void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
554{
555 struct sw_rx_data *curr_cons;
556
557 for (; count > 0; count--) {
558 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
559 qede_reuse_page(rxq, curr_cons);
560 qede_rx_bd_ring_consume(rxq);
561 }
562}
563
564static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
565 struct sw_rx_data *curr_cons)
566{
567
568 curr_cons->page_offset += rxq->rx_buf_seg_size;
569
570 if (curr_cons->page_offset == PAGE_SIZE) {
571 if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
572
573
574
575 curr_cons->page_offset -= rxq->rx_buf_seg_size;
576
577 return -ENOMEM;
578 }
579
580 dma_unmap_page(rxq->dev, curr_cons->mapping,
581 PAGE_SIZE, rxq->data_direction);
582 } else {
583
584
585
586
587 page_ref_inc(curr_cons->data);
588 qede_reuse_page(rxq, curr_cons);
589 }
590
591 return 0;
592}
593
594void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
595{
596 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
597 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
598 struct eth_rx_prod_data rx_prods = {0};
599
600
601 rx_prods.bd_prod = cpu_to_le16(bd_prod);
602 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
603
604
605
606
607
608 wmb();
609
610 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
611 (u32 *)&rx_prods);
612}
613
614static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
615{
616 enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
617 enum rss_hash_type htype;
618 u32 hash = 0;
619
620 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
621 if (htype) {
622 hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
623 (htype == RSS_HASH_TYPE_IPV6)) ?
624 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
625 hash = le32_to_cpu(rss_hash);
626 }
627 skb_set_hash(skb, hash, hash_type);
628}
629
630static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
631{
632 skb_checksum_none_assert(skb);
633
634 if (csum_flag & QEDE_CSUM_UNNECESSARY)
635 skb->ip_summed = CHECKSUM_UNNECESSARY;
636
637 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) {
638 skb->csum_level = 1;
639 skb->encapsulation = 1;
640 }
641}
642
643static inline void qede_skb_receive(struct qede_dev *edev,
644 struct qede_fastpath *fp,
645 struct qede_rx_queue *rxq,
646 struct sk_buff *skb, u16 vlan_tag)
647{
648 if (vlan_tag)
649 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
650
651 napi_gro_receive(&fp->napi, skb);
652}
653
654static void qede_set_gro_params(struct qede_dev *edev,
655 struct sk_buff *skb,
656 struct eth_fast_path_rx_tpa_start_cqe *cqe)
657{
658 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
659
660 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
661 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
662 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
663 else
664 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
665
666 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
667 cqe->header_len;
668}
669
670static int qede_fill_frag_skb(struct qede_dev *edev,
671 struct qede_rx_queue *rxq,
672 u8 tpa_agg_index, u16 len_on_bd)
673{
674 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
675 NUM_RX_BDS_MAX];
676 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
677 struct sk_buff *skb = tpa_info->skb;
678
679 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
680 goto out;
681
682
683 skb_fill_page_desc(skb, tpa_info->frag_id++,
684 current_bd->data,
685 current_bd->page_offset + rxq->rx_headroom,
686 len_on_bd);
687
688 if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
689
690
691
692 page_ref_inc(current_bd->data);
693 goto out;
694 }
695
696 qede_rx_bd_ring_consume(rxq);
697
698 skb->data_len += len_on_bd;
699 skb->truesize += rxq->rx_buf_seg_size;
700 skb->len += len_on_bd;
701
702 return 0;
703
704out:
705 tpa_info->state = QEDE_AGG_STATE_ERROR;
706 qede_recycle_rx_bd_ring(rxq, 1);
707
708 return -ENOMEM;
709}
710
711static bool qede_tunn_exist(u16 flag)
712{
713 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
714 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
715}
716
717static u8 qede_check_tunn_csum(u16 flag)
718{
719 u16 csum_flag = 0;
720 u8 tcsum = 0;
721
722 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
723 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
724 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
725 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
726
727 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
728 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
729 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
730 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
731 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
732 }
733
734 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
735 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
736 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
737 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
738
739 if (csum_flag & flag)
740 return QEDE_CSUM_ERROR;
741
742 return QEDE_CSUM_UNNECESSARY | tcsum;
743}
744
745static inline struct sk_buff *
746qede_build_skb(struct qede_rx_queue *rxq,
747 struct sw_rx_data *bd, u16 len, u16 pad)
748{
749 struct sk_buff *skb;
750 void *buf;
751
752 buf = page_address(bd->data) + bd->page_offset;
753 skb = build_skb(buf, rxq->rx_buf_seg_size);
754
755 skb_reserve(skb, pad);
756 skb_put(skb, len);
757
758 return skb;
759}
760
761static struct sk_buff *
762qede_tpa_rx_build_skb(struct qede_dev *edev,
763 struct qede_rx_queue *rxq,
764 struct sw_rx_data *bd, u16 len, u16 pad,
765 bool alloc_skb)
766{
767 struct sk_buff *skb;
768
769 skb = qede_build_skb(rxq, bd, len, pad);
770 bd->page_offset += rxq->rx_buf_seg_size;
771
772 if (bd->page_offset == PAGE_SIZE) {
773 if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
774 DP_NOTICE(edev,
775 "Failed to allocate RX buffer for tpa start\n");
776 bd->page_offset -= rxq->rx_buf_seg_size;
777 page_ref_inc(bd->data);
778 dev_kfree_skb_any(skb);
779 return NULL;
780 }
781 } else {
782 page_ref_inc(bd->data);
783 qede_reuse_page(rxq, bd);
784 }
785
786
787 qede_rx_bd_ring_consume(rxq);
788
789 return skb;
790}
791
792static struct sk_buff *
793qede_rx_build_skb(struct qede_dev *edev,
794 struct qede_rx_queue *rxq,
795 struct sw_rx_data *bd, u16 len, u16 pad)
796{
797 struct sk_buff *skb = NULL;
798
799
800
801
802
803 if ((len + pad <= edev->rx_copybreak)) {
804 unsigned int offset = bd->page_offset + pad;
805
806 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
807 if (unlikely(!skb))
808 return NULL;
809
810 skb_reserve(skb, pad);
811 skb_put_data(skb, page_address(bd->data) + offset, len);
812 qede_reuse_page(rxq, bd);
813 goto out;
814 }
815
816 skb = qede_build_skb(rxq, bd, len, pad);
817
818 if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
819
820
821
822
823 page_ref_inc(bd->data);
824 dev_kfree_skb_any(skb);
825 return NULL;
826 }
827out:
828
829 qede_rx_bd_ring_consume(rxq);
830
831 return skb;
832}
833
834static void qede_tpa_start(struct qede_dev *edev,
835 struct qede_rx_queue *rxq,
836 struct eth_fast_path_rx_tpa_start_cqe *cqe)
837{
838 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
839 struct sw_rx_data *sw_rx_data_cons;
840 u16 pad;
841
842 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
843 pad = cqe->placement_offset + rxq->rx_headroom;
844
845 tpa_info->skb = qede_tpa_rx_build_skb(edev, rxq, sw_rx_data_cons,
846 le16_to_cpu(cqe->len_on_first_bd),
847 pad, false);
848 tpa_info->buffer.page_offset = sw_rx_data_cons->page_offset;
849 tpa_info->buffer.mapping = sw_rx_data_cons->mapping;
850
851 if (unlikely(!tpa_info->skb)) {
852 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
853
854
855
856
857
858 tpa_info->tpa_start_fail = true;
859 qede_rx_bd_ring_consume(rxq);
860 tpa_info->state = QEDE_AGG_STATE_ERROR;
861 goto cons_buf;
862 }
863
864 tpa_info->frag_id = 0;
865 tpa_info->state = QEDE_AGG_STATE_START;
866
867 if ((le16_to_cpu(cqe->pars_flags.flags) >>
868 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
869 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
870 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
871 else
872 tpa_info->vlan_tag = 0;
873
874 qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
875
876
877 qede_set_gro_params(edev, tpa_info->skb, cqe);
878
879cons_buf:
880 if (likely(cqe->bw_ext_bd_len_list[0]))
881 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
882 le16_to_cpu(cqe->bw_ext_bd_len_list[0]));
883
884 if (unlikely(cqe->bw_ext_bd_len_list[1])) {
885 DP_ERR(edev,
886 "Unlikely - got a TPA aggregation with more than one bw_ext_bd_len_list entry in the TPA start\n");
887 tpa_info->state = QEDE_AGG_STATE_ERROR;
888 }
889}
890
891#ifdef CONFIG_INET
892static void qede_gro_ip_csum(struct sk_buff *skb)
893{
894 const struct iphdr *iph = ip_hdr(skb);
895 struct tcphdr *th;
896
897 skb_set_transport_header(skb, sizeof(struct iphdr));
898 th = tcp_hdr(skb);
899
900 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
901 iph->saddr, iph->daddr, 0);
902
903 tcp_gro_complete(skb);
904}
905
906static void qede_gro_ipv6_csum(struct sk_buff *skb)
907{
908 struct ipv6hdr *iph = ipv6_hdr(skb);
909 struct tcphdr *th;
910
911 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
912 th = tcp_hdr(skb);
913
914 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
915 &iph->saddr, &iph->daddr, 0);
916 tcp_gro_complete(skb);
917}
918#endif
919
920static void qede_gro_receive(struct qede_dev *edev,
921 struct qede_fastpath *fp,
922 struct sk_buff *skb,
923 u16 vlan_tag)
924{
925
926
927
928
929
930 if (unlikely(!skb->data_len)) {
931 skb_shinfo(skb)->gso_type = 0;
932 skb_shinfo(skb)->gso_size = 0;
933 goto send_skb;
934 }
935
936#ifdef CONFIG_INET
937 if (skb_shinfo(skb)->gso_size) {
938 skb_reset_network_header(skb);
939
940 switch (skb->protocol) {
941 case htons(ETH_P_IP):
942 qede_gro_ip_csum(skb);
943 break;
944 case htons(ETH_P_IPV6):
945 qede_gro_ipv6_csum(skb);
946 break;
947 default:
948 DP_ERR(edev,
949 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
950 ntohs(skb->protocol));
951 }
952 }
953#endif
954
955send_skb:
956 skb_record_rx_queue(skb, fp->rxq->rxq_id);
957 qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
958}
959
960static inline void qede_tpa_cont(struct qede_dev *edev,
961 struct qede_rx_queue *rxq,
962 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
963{
964 int i;
965
966 for (i = 0; cqe->len_list[i]; i++)
967 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
968 le16_to_cpu(cqe->len_list[i]));
969
970 if (unlikely(i > 1))
971 DP_ERR(edev,
972 "Strange - TPA cont with more than a single len_list entry\n");
973}
974
975static int qede_tpa_end(struct qede_dev *edev,
976 struct qede_fastpath *fp,
977 struct eth_fast_path_rx_tpa_end_cqe *cqe)
978{
979 struct qede_rx_queue *rxq = fp->rxq;
980 struct qede_agg_info *tpa_info;
981 struct sk_buff *skb;
982 int i;
983
984 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
985 skb = tpa_info->skb;
986
987 if (tpa_info->buffer.page_offset == PAGE_SIZE)
988 dma_unmap_page(rxq->dev, tpa_info->buffer.mapping,
989 PAGE_SIZE, rxq->data_direction);
990
991 for (i = 0; cqe->len_list[i]; i++)
992 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
993 le16_to_cpu(cqe->len_list[i]));
994 if (unlikely(i > 1))
995 DP_ERR(edev,
996 "Strange - TPA emd with more than a single len_list entry\n");
997
998 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
999 goto err;
1000
1001
1002 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1003 DP_ERR(edev,
1004 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1005 cqe->num_of_bds, tpa_info->frag_id);
1006 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1007 DP_ERR(edev,
1008 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1009 le16_to_cpu(cqe->total_packet_len), skb->len);
1010
1011
1012 skb->protocol = eth_type_trans(skb, edev->ndev);
1013 skb->ip_summed = CHECKSUM_UNNECESSARY;
1014
1015
1016
1017
1018 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1019
1020 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1021
1022 tpa_info->state = QEDE_AGG_STATE_NONE;
1023
1024 return 1;
1025err:
1026 tpa_info->state = QEDE_AGG_STATE_NONE;
1027
1028 if (tpa_info->tpa_start_fail) {
1029 qede_reuse_page(rxq, &tpa_info->buffer);
1030 tpa_info->tpa_start_fail = false;
1031 }
1032
1033 dev_kfree_skb_any(tpa_info->skb);
1034 tpa_info->skb = NULL;
1035 return 0;
1036}
1037
1038static u8 qede_check_notunn_csum(u16 flag)
1039{
1040 u16 csum_flag = 0;
1041 u8 csum = 0;
1042
1043 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1044 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1045 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1046 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1047 csum = QEDE_CSUM_UNNECESSARY;
1048 }
1049
1050 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1051 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1052
1053 if (csum_flag & flag)
1054 return QEDE_CSUM_ERROR;
1055
1056 return csum;
1057}
1058
1059static u8 qede_check_csum(u16 flag)
1060{
1061 if (!qede_tunn_exist(flag))
1062 return qede_check_notunn_csum(flag);
1063 else
1064 return qede_check_tunn_csum(flag);
1065}
1066
1067static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1068 u16 flag)
1069{
1070 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1071
1072 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1073 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1074 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1075 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1076 return true;
1077
1078 return false;
1079}
1080
1081
1082static bool qede_rx_xdp(struct qede_dev *edev,
1083 struct qede_fastpath *fp,
1084 struct qede_rx_queue *rxq,
1085 struct bpf_prog *prog,
1086 struct sw_rx_data *bd,
1087 struct eth_fast_path_rx_reg_cqe *cqe,
1088 u16 *data_offset, u16 *len)
1089{
1090 struct xdp_buff xdp;
1091 enum xdp_action act;
1092
1093 xdp.data_hard_start = page_address(bd->data);
1094 xdp.data = xdp.data_hard_start + *data_offset;
1095 xdp_set_data_meta_invalid(&xdp);
1096 xdp.data_end = xdp.data + *len;
1097 xdp.rxq = &rxq->xdp_rxq;
1098 xdp.frame_sz = rxq->rx_buf_seg_size;
1099
1100
1101
1102
1103
1104 rcu_read_lock();
1105 act = bpf_prog_run_xdp(prog, &xdp);
1106 rcu_read_unlock();
1107
1108
1109 *data_offset = xdp.data - xdp.data_hard_start;
1110 *len = xdp.data_end - xdp.data;
1111
1112 if (act == XDP_PASS)
1113 return true;
1114
1115
1116 rxq->xdp_no_pass++;
1117
1118 switch (act) {
1119 case XDP_TX:
1120
1121 if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
1122 qede_recycle_rx_bd_ring(rxq, 1);
1123
1124 trace_xdp_exception(edev->ndev, prog, act);
1125 break;
1126 }
1127
1128
1129
1130
1131 if (unlikely(qede_xdp_xmit(fp->xdp_tx, bd->mapping,
1132 *data_offset, *len, bd->data,
1133 NULL))) {
1134 dma_unmap_page(rxq->dev, bd->mapping, PAGE_SIZE,
1135 rxq->data_direction);
1136 __free_page(bd->data);
1137
1138 trace_xdp_exception(edev->ndev, prog, act);
1139 } else {
1140 dma_sync_single_for_device(rxq->dev,
1141 bd->mapping + *data_offset,
1142 *len, rxq->data_direction);
1143 fp->xdp_xmit |= QEDE_XDP_TX;
1144 }
1145
1146
1147 qede_rx_bd_ring_consume(rxq);
1148 break;
1149 case XDP_REDIRECT:
1150
1151 if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
1152 qede_recycle_rx_bd_ring(rxq, 1);
1153
1154 trace_xdp_exception(edev->ndev, prog, act);
1155 break;
1156 }
1157
1158 dma_unmap_page(rxq->dev, bd->mapping, PAGE_SIZE,
1159 rxq->data_direction);
1160
1161 if (unlikely(xdp_do_redirect(edev->ndev, &xdp, prog)))
1162 DP_NOTICE(edev, "Failed to redirect the packet\n");
1163 else
1164 fp->xdp_xmit |= QEDE_XDP_REDIRECT;
1165
1166 qede_rx_bd_ring_consume(rxq);
1167 break;
1168 default:
1169 bpf_warn_invalid_xdp_action(act);
1170 fallthrough;
1171 case XDP_ABORTED:
1172 trace_xdp_exception(edev->ndev, prog, act);
1173 fallthrough;
1174 case XDP_DROP:
1175 qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
1176 }
1177
1178 return false;
1179}
1180
1181static int qede_rx_build_jumbo(struct qede_dev *edev,
1182 struct qede_rx_queue *rxq,
1183 struct sk_buff *skb,
1184 struct eth_fast_path_rx_reg_cqe *cqe,
1185 u16 first_bd_len)
1186{
1187 u16 pkt_len = le16_to_cpu(cqe->pkt_len);
1188 struct sw_rx_data *bd;
1189 u16 bd_cons_idx;
1190 u8 num_frags;
1191
1192 pkt_len -= first_bd_len;
1193
1194
1195 for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
1196 u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
1197 pkt_len;
1198
1199 if (unlikely(!cur_size)) {
1200 DP_ERR(edev,
1201 "Still got %d BDs for mapping jumbo, but length became 0\n",
1202 num_frags);
1203 goto out;
1204 }
1205
1206
1207 if (unlikely(qede_alloc_rx_buffer(rxq, true)))
1208 goto out;
1209
1210
1211
1212
1213 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1214 bd = &rxq->sw_rx_ring[bd_cons_idx];
1215 qede_rx_bd_ring_consume(rxq);
1216
1217 dma_unmap_page(rxq->dev, bd->mapping,
1218 PAGE_SIZE, DMA_FROM_DEVICE);
1219
1220 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
1221 bd->data, rxq->rx_headroom, cur_size);
1222
1223 skb->truesize += PAGE_SIZE;
1224 skb->data_len += cur_size;
1225 skb->len += cur_size;
1226 pkt_len -= cur_size;
1227 }
1228
1229 if (unlikely(pkt_len))
1230 DP_ERR(edev,
1231 "Mapped all BDs of jumbo, but still have %d bytes\n",
1232 pkt_len);
1233
1234out:
1235 return num_frags;
1236}
1237
1238static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
1239 struct qede_fastpath *fp,
1240 struct qede_rx_queue *rxq,
1241 union eth_rx_cqe *cqe,
1242 enum eth_rx_cqe_type type)
1243{
1244 switch (type) {
1245 case ETH_RX_CQE_TYPE_TPA_START:
1246 qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
1247 return 0;
1248 case ETH_RX_CQE_TYPE_TPA_CONT:
1249 qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
1250 return 0;
1251 case ETH_RX_CQE_TYPE_TPA_END:
1252 return qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
1253 default:
1254 return 0;
1255 }
1256}
1257
1258static int qede_rx_process_cqe(struct qede_dev *edev,
1259 struct qede_fastpath *fp,
1260 struct qede_rx_queue *rxq)
1261{
1262 struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
1263 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1264 u16 len, pad, bd_cons_idx, parse_flag;
1265 enum eth_rx_cqe_type cqe_type;
1266 union eth_rx_cqe *cqe;
1267 struct sw_rx_data *bd;
1268 struct sk_buff *skb;
1269 __le16 flags;
1270 u8 csum_flag;
1271
1272
1273 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1274 cqe_type = cqe->fast_path_regular.type;
1275
1276
1277 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1278 struct eth_slow_path_rx_cqe *sp_cqe;
1279
1280 sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
1281 edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
1282 return 0;
1283 }
1284
1285
1286 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
1287 return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
1288
1289
1290
1291
1292 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1293 bd = &rxq->sw_rx_ring[bd_cons_idx];
1294
1295 fp_cqe = &cqe->fast_path_regular;
1296 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1297 pad = fp_cqe->placement_offset + rxq->rx_headroom;
1298
1299
1300 if (xdp_prog)
1301 if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe,
1302 &pad, &len))
1303 return 0;
1304
1305
1306 flags = cqe->fast_path_regular.pars_flags.flags;
1307 parse_flag = le16_to_cpu(flags);
1308
1309 csum_flag = qede_check_csum(parse_flag);
1310 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1311 if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag))
1312 rxq->rx_ip_frags++;
1313 else
1314 rxq->rx_hw_errors++;
1315 }
1316
1317
1318
1319
1320 skb = qede_rx_build_skb(edev, rxq, bd, len, pad);
1321 if (!skb) {
1322 rxq->rx_alloc_errors++;
1323 qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1324 return 0;
1325 }
1326
1327
1328
1329
1330 if (fp_cqe->bd_num > 1) {
1331 u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
1332 fp_cqe, len);
1333
1334 if (unlikely(unmapped_frags > 0)) {
1335 qede_recycle_rx_bd_ring(rxq, unmapped_frags);
1336 dev_kfree_skb_any(skb);
1337 return 0;
1338 }
1339 }
1340
1341
1342 skb->protocol = eth_type_trans(skb, edev->ndev);
1343 qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
1344 qede_set_skb_csum(skb, csum_flag);
1345 skb_record_rx_queue(skb, rxq->rxq_id);
1346 qede_ptp_record_rx_ts(edev, cqe, skb);
1347
1348
1349 qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
1350
1351 return 1;
1352}
1353
1354static int qede_rx_int(struct qede_fastpath *fp, int budget)
1355{
1356 struct qede_rx_queue *rxq = fp->rxq;
1357 struct qede_dev *edev = fp->edev;
1358 int work_done = 0, rcv_pkts = 0;
1359 u16 hw_comp_cons, sw_comp_cons;
1360
1361 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1362 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1363
1364
1365
1366
1367
1368
1369 rmb();
1370
1371
1372 while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
1373 rcv_pkts += qede_rx_process_cqe(edev, fp, rxq);
1374 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1375 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1376 work_done++;
1377 }
1378
1379 rxq->rcv_pkts += rcv_pkts;
1380
1381
1382 while (rxq->num_rx_buffers - rxq->filled_buffers)
1383 if (qede_alloc_rx_buffer(rxq, false))
1384 break;
1385
1386
1387 qede_update_rx_prod(edev, rxq);
1388
1389 return work_done;
1390}
1391
1392static bool qede_poll_is_more_work(struct qede_fastpath *fp)
1393{
1394 qed_sb_update_sb_idx(fp->sb_info);
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406 rmb();
1407
1408 if (likely(fp->type & QEDE_FASTPATH_RX))
1409 if (qede_has_rx_work(fp->rxq))
1410 return true;
1411
1412 if (fp->type & QEDE_FASTPATH_XDP)
1413 if (qede_txq_has_work(fp->xdp_tx))
1414 return true;
1415
1416 if (likely(fp->type & QEDE_FASTPATH_TX)) {
1417 int cos;
1418
1419 for_each_cos_in_txq(fp->edev, cos) {
1420 if (qede_txq_has_work(&fp->txq[cos]))
1421 return true;
1422 }
1423 }
1424
1425 return false;
1426}
1427
1428
1429
1430
1431int qede_poll(struct napi_struct *napi, int budget)
1432{
1433 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1434 napi);
1435 struct qede_dev *edev = fp->edev;
1436 int rx_work_done = 0;
1437 u16 xdp_prod;
1438
1439 fp->xdp_xmit = 0;
1440
1441 if (likely(fp->type & QEDE_FASTPATH_TX)) {
1442 int cos;
1443
1444 for_each_cos_in_txq(fp->edev, cos) {
1445 if (qede_txq_has_work(&fp->txq[cos]))
1446 qede_tx_int(edev, &fp->txq[cos]);
1447 }
1448 }
1449
1450 if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
1451 qede_xdp_tx_int(edev, fp->xdp_tx);
1452
1453 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1454 qede_has_rx_work(fp->rxq)) ?
1455 qede_rx_int(fp, budget) : 0;
1456 if (rx_work_done < budget) {
1457 if (!qede_poll_is_more_work(fp)) {
1458 napi_complete_done(napi, rx_work_done);
1459
1460
1461 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
1462 } else {
1463 rx_work_done = budget;
1464 }
1465 }
1466
1467 if (fp->xdp_xmit & QEDE_XDP_TX) {
1468 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
1469
1470 fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
1471 qede_update_tx_producer(fp->xdp_tx);
1472 }
1473
1474 if (fp->xdp_xmit & QEDE_XDP_REDIRECT)
1475 xdp_do_flush_map();
1476
1477 return rx_work_done;
1478}
1479
1480irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1481{
1482 struct qede_fastpath *fp = fp_cookie;
1483
1484 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 );
1485
1486 napi_schedule_irqoff(&fp->napi);
1487 return IRQ_HANDLED;
1488}
1489
1490
1491netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1492{
1493 struct qede_dev *edev = netdev_priv(ndev);
1494 struct netdev_queue *netdev_txq;
1495 struct qede_tx_queue *txq;
1496 struct eth_tx_1st_bd *first_bd;
1497 struct eth_tx_2nd_bd *second_bd = NULL;
1498 struct eth_tx_3rd_bd *third_bd = NULL;
1499 struct eth_tx_bd *tx_data_bd = NULL;
1500 u16 txq_index, val = 0;
1501 u8 nbd = 0;
1502 dma_addr_t mapping;
1503 int rc, frag_idx = 0, ipv6_ext = 0;
1504 u8 xmit_type;
1505 u16 idx;
1506 u16 hlen;
1507 bool data_split = false;
1508
1509
1510 txq_index = skb_get_queue_mapping(skb);
1511 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev) * edev->dev_info.num_tc);
1512 txq = QEDE_NDEV_TXQ_ID_TO_TXQ(edev, txq_index);
1513 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
1514
1515 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
1516
1517 xmit_type = qede_xmit_type(skb, &ipv6_ext);
1518
1519#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
1520 if (qede_pkt_req_lin(skb, xmit_type)) {
1521 if (skb_linearize(skb)) {
1522 txq->tx_mem_alloc_err++;
1523
1524 dev_kfree_skb_any(skb);
1525 return NETDEV_TX_OK;
1526 }
1527 }
1528#endif
1529
1530
1531 idx = txq->sw_tx_prod;
1532 txq->sw_tx_ring.skbs[idx].skb = skb;
1533 first_bd = (struct eth_tx_1st_bd *)
1534 qed_chain_produce(&txq->tx_pbl);
1535 memset(first_bd, 0, sizeof(*first_bd));
1536 first_bd->data.bd_flags.bitfields =
1537 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1538
1539 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
1540 qede_ptp_tx_ts(edev, skb);
1541
1542
1543 mapping = dma_map_single(txq->dev, skb->data,
1544 skb_headlen(skb), DMA_TO_DEVICE);
1545 if (unlikely(dma_mapping_error(txq->dev, mapping))) {
1546 DP_NOTICE(edev, "SKB mapping failed\n");
1547 qede_free_failed_tx_pkt(txq, first_bd, 0, false);
1548 qede_update_tx_producer(txq);
1549 return NETDEV_TX_OK;
1550 }
1551 nbd++;
1552 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1553
1554
1555
1556
1557 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
1558 second_bd = (struct eth_tx_2nd_bd *)
1559 qed_chain_produce(&txq->tx_pbl);
1560 memset(second_bd, 0, sizeof(*second_bd));
1561
1562 nbd++;
1563 third_bd = (struct eth_tx_3rd_bd *)
1564 qed_chain_produce(&txq->tx_pbl);
1565 memset(third_bd, 0, sizeof(*third_bd));
1566
1567 nbd++;
1568
1569 tx_data_bd = (struct eth_tx_bd *)second_bd;
1570 }
1571
1572 if (skb_vlan_tag_present(skb)) {
1573 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
1574 first_bd->data.bd_flags.bitfields |=
1575 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
1576 }
1577
1578
1579 if (xmit_type & XMIT_L4_CSUM) {
1580
1581
1582
1583 first_bd->data.bd_flags.bitfields |=
1584 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
1585
1586 if (xmit_type & XMIT_ENC) {
1587 first_bd->data.bd_flags.bitfields |=
1588 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1589
1590 val |= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
1591 }
1592
1593
1594
1595
1596
1597 if (unlikely(txq->is_legacy))
1598 val ^= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
1599
1600
1601
1602
1603
1604 if (unlikely(ipv6_ext))
1605 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
1606 }
1607
1608 if (xmit_type & XMIT_LSO) {
1609 first_bd->data.bd_flags.bitfields |=
1610 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
1611 third_bd->data.lso_mss =
1612 cpu_to_le16(skb_shinfo(skb)->gso_size);
1613
1614 if (unlikely(xmit_type & XMIT_ENC)) {
1615 first_bd->data.bd_flags.bitfields |=
1616 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
1617
1618 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
1619 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
1620
1621 first_bd->data.bd_flags.bitfields |= 1 << tmp;
1622 }
1623 hlen = qede_get_skb_hlen(skb, true);
1624 } else {
1625 first_bd->data.bd_flags.bitfields |=
1626 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1627 hlen = qede_get_skb_hlen(skb, false);
1628 }
1629
1630
1631 third_bd->data.bitfields |=
1632 cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
1633
1634
1635
1636
1637 if (unlikely(skb_headlen(skb) > hlen)) {
1638 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1639 "TSO split header size is %d (%x:%x)\n",
1640 first_bd->nbytes, first_bd->addr.hi,
1641 first_bd->addr.lo);
1642
1643 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
1644 le32_to_cpu(first_bd->addr.lo)) +
1645 hlen;
1646
1647 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
1648 le16_to_cpu(first_bd->nbytes) -
1649 hlen);
1650
1651
1652
1653
1654 txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
1655
1656 first_bd->nbytes = cpu_to_le16(hlen);
1657
1658 tx_data_bd = (struct eth_tx_bd *)third_bd;
1659 data_split = true;
1660 }
1661 } else {
1662 val |= ((skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
1663 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT);
1664 }
1665
1666 first_bd->data.bitfields = cpu_to_le16(val);
1667
1668
1669
1670 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
1671 rc = map_frag_to_bd(txq,
1672 &skb_shinfo(skb)->frags[frag_idx],
1673 tx_data_bd);
1674 if (rc) {
1675 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1676 qede_update_tx_producer(txq);
1677 return NETDEV_TX_OK;
1678 }
1679
1680 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
1681 tx_data_bd = (struct eth_tx_bd *)third_bd;
1682 else
1683 tx_data_bd = NULL;
1684
1685 frag_idx++;
1686 }
1687
1688
1689 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
1690 tx_data_bd = (struct eth_tx_bd *)
1691 qed_chain_produce(&txq->tx_pbl);
1692
1693 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
1694
1695 rc = map_frag_to_bd(txq,
1696 &skb_shinfo(skb)->frags[frag_idx],
1697 tx_data_bd);
1698 if (rc) {
1699 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1700 qede_update_tx_producer(txq);
1701 return NETDEV_TX_OK;
1702 }
1703 }
1704
1705
1706 first_bd->data.nbds = nbd;
1707
1708 netdev_tx_sent_queue(netdev_txq, skb->len);
1709
1710 skb_tx_timestamp(skb);
1711
1712
1713
1714
1715 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1716
1717
1718 txq->tx_db.data.bd_prod =
1719 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
1720
1721 if (!netdev_xmit_more() || netif_xmit_stopped(netdev_txq))
1722 qede_update_tx_producer(txq);
1723
1724 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
1725 < (MAX_SKB_FRAGS + 1))) {
1726 if (netdev_xmit_more())
1727 qede_update_tx_producer(txq);
1728
1729 netif_tx_stop_queue(netdev_txq);
1730 txq->stopped_cnt++;
1731 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1732 "Stop queue was called\n");
1733
1734
1735
1736
1737 smp_mb();
1738
1739 if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
1740 (MAX_SKB_FRAGS + 1)) &&
1741 (edev->state == QEDE_STATE_OPEN)) {
1742 netif_tx_wake_queue(netdev_txq);
1743 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1744 "Wake queue was called\n");
1745 }
1746 }
1747
1748 return NETDEV_TX_OK;
1749}
1750
1751u16 qede_select_queue(struct net_device *dev, struct sk_buff *skb,
1752 struct net_device *sb_dev)
1753{
1754 struct qede_dev *edev = netdev_priv(dev);
1755 int total_txq;
1756
1757 total_txq = QEDE_TSS_COUNT(edev) * edev->dev_info.num_tc;
1758
1759 return QEDE_TSS_COUNT(edev) ?
1760 netdev_pick_tx(dev, skb, NULL) % total_txq : 0;
1761}
1762
1763
1764#define QEDE_MAX_TUN_HDR_LEN 48
1765
1766netdev_features_t qede_features_check(struct sk_buff *skb,
1767 struct net_device *dev,
1768 netdev_features_t features)
1769{
1770 if (skb->encapsulation) {
1771 u8 l4_proto = 0;
1772
1773 switch (vlan_get_protocol(skb)) {
1774 case htons(ETH_P_IP):
1775 l4_proto = ip_hdr(skb)->protocol;
1776 break;
1777 case htons(ETH_P_IPV6):
1778 l4_proto = ipv6_hdr(skb)->nexthdr;
1779 break;
1780 default:
1781 return features;
1782 }
1783
1784
1785
1786
1787
1788 if (l4_proto == IPPROTO_UDP) {
1789 struct qede_dev *edev = netdev_priv(dev);
1790 u16 hdrlen, vxln_port, gnv_port;
1791
1792 hdrlen = QEDE_MAX_TUN_HDR_LEN;
1793 vxln_port = edev->vxlan_dst_port;
1794 gnv_port = edev->geneve_dst_port;
1795
1796 if ((skb_inner_mac_header(skb) -
1797 skb_transport_header(skb)) > hdrlen ||
1798 (ntohs(udp_hdr(skb)->dest) != vxln_port &&
1799 ntohs(udp_hdr(skb)->dest) != gnv_port))
1800 return features & ~(NETIF_F_CSUM_MASK |
1801 NETIF_F_GSO_MASK);
1802 }
1803 }
1804
1805 return features;
1806}
1807