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12#include <linux/clk.h>
13#include <linux/interrupt.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/of.h>
17#include <linux/pci.h>
18#include <linux/phy/phy.h>
19#include <linux/platform_device.h>
20#include <linux/resource.h>
21
22#include "pcie-designware.h"
23
24struct spear13xx_pcie {
25 struct dw_pcie *pci;
26 void __iomem *app_base;
27 struct phy *phy;
28 struct clk *clk;
29};
30
31struct pcie_app_reg {
32 u32 app_ctrl_0;
33 u32 app_ctrl_1;
34 u32 app_status_0;
35 u32 app_status_1;
36 u32 msg_status;
37 u32 msg_payload;
38 u32 int_sts;
39 u32 int_clr;
40 u32 int_mask;
41 u32 mst_bmisc;
42 u32 phy_ctrl;
43 u32 phy_status;
44 u32 cxpl_debug_info_0;
45 u32 cxpl_debug_info_1;
46 u32 ven_msg_ctrl_0;
47 u32 ven_msg_ctrl_1;
48 u32 ven_msg_data_0;
49 u32 ven_msg_data_1;
50 u32 ven_msi_0;
51 u32 ven_msi_1;
52 u32 mst_rmisc;
53};
54
55
56#define APP_LTSSM_ENABLE_ID 3
57#define DEVICE_TYPE_RC (4 << 25)
58#define MISCTRL_EN_ID 30
59#define REG_TRANSLATION_ENABLE 31
60
61
62#define XMLH_LINK_UP (1 << 6)
63
64
65#define MSI_CTRL_INT (1 << 26)
66
67#define to_spear13xx_pcie(x) dev_get_drvdata((x)->dev)
68
69static int spear13xx_pcie_establish_link(struct spear13xx_pcie *spear13xx_pcie)
70{
71 struct dw_pcie *pci = spear13xx_pcie->pci;
72 struct pcie_port *pp = &pci->pp;
73 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base;
74 u32 val;
75 u32 exp_cap_off = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
76
77 if (dw_pcie_link_up(pci)) {
78 dev_err(pci->dev, "link already up\n");
79 return 0;
80 }
81
82 dw_pcie_setup_rc(pp);
83
84
85
86
87
88
89 val = dw_pcie_readw_dbi(pci, exp_cap_off + PCI_EXP_DEVCTL);
90 val &= ~PCI_EXP_DEVCTL_READRQ;
91 dw_pcie_writew_dbi(pci, exp_cap_off + PCI_EXP_DEVCTL, val);
92
93 dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, 0x104A);
94 dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, 0xCD80);
95
96
97 writel(DEVICE_TYPE_RC | (1 << MISCTRL_EN_ID)
98 | (1 << APP_LTSSM_ENABLE_ID)
99 | ((u32)1 << REG_TRANSLATION_ENABLE),
100 &app_reg->app_ctrl_0);
101
102 return dw_pcie_wait_for_link(pci);
103}
104
105static irqreturn_t spear13xx_pcie_irq_handler(int irq, void *arg)
106{
107 struct spear13xx_pcie *spear13xx_pcie = arg;
108 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base;
109 struct dw_pcie *pci = spear13xx_pcie->pci;
110 struct pcie_port *pp = &pci->pp;
111 unsigned int status;
112
113 status = readl(&app_reg->int_sts);
114
115 if (status & MSI_CTRL_INT) {
116 BUG_ON(!IS_ENABLED(CONFIG_PCI_MSI));
117 dw_handle_msi_irq(pp);
118 }
119
120 writel(status, &app_reg->int_clr);
121
122 return IRQ_HANDLED;
123}
124
125static void spear13xx_pcie_enable_interrupts(struct spear13xx_pcie *spear13xx_pcie)
126{
127 struct dw_pcie *pci = spear13xx_pcie->pci;
128 struct pcie_port *pp = &pci->pp;
129 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base;
130
131
132 if (IS_ENABLED(CONFIG_PCI_MSI)) {
133 dw_pcie_msi_init(pp);
134 writel(readl(&app_reg->int_mask) |
135 MSI_CTRL_INT, &app_reg->int_mask);
136 }
137}
138
139static int spear13xx_pcie_link_up(struct dw_pcie *pci)
140{
141 struct spear13xx_pcie *spear13xx_pcie = to_spear13xx_pcie(pci);
142 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base;
143
144 if (readl(&app_reg->app_status_1) & XMLH_LINK_UP)
145 return 1;
146
147 return 0;
148}
149
150static int spear13xx_pcie_host_init(struct pcie_port *pp)
151{
152 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
153 struct spear13xx_pcie *spear13xx_pcie = to_spear13xx_pcie(pci);
154
155 spear13xx_pcie_establish_link(spear13xx_pcie);
156 spear13xx_pcie_enable_interrupts(spear13xx_pcie);
157
158 return 0;
159}
160
161static const struct dw_pcie_host_ops spear13xx_pcie_host_ops = {
162 .host_init = spear13xx_pcie_host_init,
163};
164
165static int spear13xx_add_pcie_port(struct spear13xx_pcie *spear13xx_pcie,
166 struct platform_device *pdev)
167{
168 struct dw_pcie *pci = spear13xx_pcie->pci;
169 struct pcie_port *pp = &pci->pp;
170 struct device *dev = &pdev->dev;
171 int ret;
172
173 pp->irq = platform_get_irq(pdev, 0);
174 if (pp->irq < 0)
175 return pp->irq;
176
177 ret = devm_request_irq(dev, pp->irq, spear13xx_pcie_irq_handler,
178 IRQF_SHARED | IRQF_NO_THREAD,
179 "spear1340-pcie", spear13xx_pcie);
180 if (ret) {
181 dev_err(dev, "failed to request irq %d\n", pp->irq);
182 return ret;
183 }
184
185 pp->ops = &spear13xx_pcie_host_ops;
186
187 ret = dw_pcie_host_init(pp);
188 if (ret) {
189 dev_err(dev, "failed to initialize host\n");
190 return ret;
191 }
192
193 return 0;
194}
195
196static const struct dw_pcie_ops dw_pcie_ops = {
197 .link_up = spear13xx_pcie_link_up,
198};
199
200static int spear13xx_pcie_probe(struct platform_device *pdev)
201{
202 struct device *dev = &pdev->dev;
203 struct dw_pcie *pci;
204 struct spear13xx_pcie *spear13xx_pcie;
205 struct device_node *np = dev->of_node;
206 struct resource *dbi_base;
207 int ret;
208
209 spear13xx_pcie = devm_kzalloc(dev, sizeof(*spear13xx_pcie), GFP_KERNEL);
210 if (!spear13xx_pcie)
211 return -ENOMEM;
212
213 pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
214 if (!pci)
215 return -ENOMEM;
216
217 pci->dev = dev;
218 pci->ops = &dw_pcie_ops;
219
220 spear13xx_pcie->pci = pci;
221
222 spear13xx_pcie->phy = devm_phy_get(dev, "pcie-phy");
223 if (IS_ERR(spear13xx_pcie->phy)) {
224 ret = PTR_ERR(spear13xx_pcie->phy);
225 if (ret == -EPROBE_DEFER)
226 dev_info(dev, "probe deferred\n");
227 else
228 dev_err(dev, "couldn't get pcie-phy\n");
229 return ret;
230 }
231
232 phy_init(spear13xx_pcie->phy);
233
234 spear13xx_pcie->clk = devm_clk_get(dev, NULL);
235 if (IS_ERR(spear13xx_pcie->clk)) {
236 dev_err(dev, "couldn't get clk for pcie\n");
237 return PTR_ERR(spear13xx_pcie->clk);
238 }
239 ret = clk_prepare_enable(spear13xx_pcie->clk);
240 if (ret) {
241 dev_err(dev, "couldn't enable clk for pcie\n");
242 return ret;
243 }
244
245 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
246 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
247 if (IS_ERR(pci->dbi_base)) {
248 ret = PTR_ERR(pci->dbi_base);
249 goto fail_clk;
250 }
251 spear13xx_pcie->app_base = pci->dbi_base + 0x2000;
252
253 if (of_property_read_bool(np, "st,pcie-is-gen1"))
254 pci->link_gen = 1;
255
256 platform_set_drvdata(pdev, spear13xx_pcie);
257
258 ret = spear13xx_add_pcie_port(spear13xx_pcie, pdev);
259 if (ret < 0)
260 goto fail_clk;
261
262 return 0;
263
264fail_clk:
265 clk_disable_unprepare(spear13xx_pcie->clk);
266
267 return ret;
268}
269
270static const struct of_device_id spear13xx_pcie_of_match[] = {
271 { .compatible = "st,spear1340-pcie", },
272 {},
273};
274
275static struct platform_driver spear13xx_pcie_driver = {
276 .probe = spear13xx_pcie_probe,
277 .driver = {
278 .name = "spear-pcie",
279 .of_match_table = of_match_ptr(spear13xx_pcie_of_match),
280 .suppress_bind_attrs = true,
281 },
282};
283
284builtin_platform_driver(spear13xx_pcie_driver);
285
