1
2
3
4
5
6
7
8
9
10
11
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/device.h>
16#include <linux/printk.h>
17#include <linux/spi/spi.h>
18#include <linux/rtc.h>
19#include <linux/of.h>
20#include <linux/bcd.h>
21#include <linux/delay.h>
22
23
24#define MCP795_EEREAD 0x03
25#define MCP795_EEWRITE 0x02
26#define MCP795_EEWRDI 0x04
27#define MCP795_EEWREN 0x06
28#define MCP795_SRREAD 0x05
29#define MCP795_SRWRITE 0x01
30#define MCP795_READ 0x13
31#define MCP795_WRITE 0x12
32#define MCP795_UNLOCK 0x14
33#define MCP795_IDWRITE 0x32
34#define MCP795_IDREAD 0x33
35#define MCP795_CLRWDT 0x44
36#define MCP795_CLRRAM 0x54
37
38
39#define MCP795_REG_SECONDS 0x01
40#define MCP795_REG_DAY 0x04
41#define MCP795_REG_MONTH 0x06
42#define MCP795_REG_CONTROL 0x08
43#define MCP795_REG_ALM0_SECONDS 0x0C
44#define MCP795_REG_ALM0_DAY 0x0F
45
46#define MCP795_ST_BIT BIT(7)
47#define MCP795_24_BIT BIT(6)
48#define MCP795_LP_BIT BIT(5)
49#define MCP795_EXTOSC_BIT BIT(3)
50#define MCP795_OSCON_BIT BIT(5)
51#define MCP795_ALM0_BIT BIT(4)
52#define MCP795_ALM1_BIT BIT(5)
53#define MCP795_ALM0IF_BIT BIT(3)
54#define MCP795_ALM0C0_BIT BIT(4)
55#define MCP795_ALM0C1_BIT BIT(5)
56#define MCP795_ALM0C2_BIT BIT(6)
57
58#define SEC_PER_DAY (24 * 60 * 60)
59
60static int mcp795_rtcc_read(struct device *dev, u8 addr, u8 *buf, u8 count)
61{
62 struct spi_device *spi = to_spi_device(dev);
63 int ret;
64 u8 tx[2];
65
66 tx[0] = MCP795_READ;
67 tx[1] = addr;
68 ret = spi_write_then_read(spi, tx, sizeof(tx), buf, count);
69
70 if (ret)
71 dev_err(dev, "Failed reading %d bytes from address %x.\n",
72 count, addr);
73
74 return ret;
75}
76
77static int mcp795_rtcc_write(struct device *dev, u8 addr, u8 *data, u8 count)
78{
79 struct spi_device *spi = to_spi_device(dev);
80 int ret;
81 u8 tx[257];
82
83 tx[0] = MCP795_WRITE;
84 tx[1] = addr;
85 memcpy(&tx[2], data, count);
86
87 ret = spi_write(spi, tx, 2 + count);
88
89 if (ret)
90 dev_err(dev, "Failed to write %d bytes to address %x.\n",
91 count, addr);
92
93 return ret;
94}
95
96static int mcp795_rtcc_set_bits(struct device *dev, u8 addr, u8 mask, u8 state)
97{
98 int ret;
99 u8 tmp;
100
101 ret = mcp795_rtcc_read(dev, addr, &tmp, 1);
102 if (ret)
103 return ret;
104
105 if ((tmp & mask) != state) {
106 tmp = (tmp & ~mask) | state;
107 ret = mcp795_rtcc_write(dev, addr, &tmp, 1);
108 }
109
110 return ret;
111}
112
113static int mcp795_stop_oscillator(struct device *dev, bool *extosc)
114{
115 int retries = 5;
116 int ret;
117 u8 data;
118
119 ret = mcp795_rtcc_set_bits(dev, MCP795_REG_SECONDS, MCP795_ST_BIT, 0);
120 if (ret)
121 return ret;
122 ret = mcp795_rtcc_read(dev, MCP795_REG_CONTROL, &data, 1);
123 if (ret)
124 return ret;
125 *extosc = !!(data & MCP795_EXTOSC_BIT);
126 ret = mcp795_rtcc_set_bits(
127 dev, MCP795_REG_CONTROL, MCP795_EXTOSC_BIT, 0);
128 if (ret)
129 return ret;
130
131 do {
132 usleep_range(700, 800);
133 ret = mcp795_rtcc_read(dev, MCP795_REG_DAY, &data, 1);
134 if (ret)
135 break;
136 if (!(data & MCP795_OSCON_BIT))
137 break;
138
139 } while (--retries);
140
141 return !retries ? -EIO : ret;
142}
143
144static int mcp795_start_oscillator(struct device *dev, bool *extosc)
145{
146 if (extosc) {
147 u8 data = *extosc ? MCP795_EXTOSC_BIT : 0;
148 int ret;
149
150 ret = mcp795_rtcc_set_bits(
151 dev, MCP795_REG_CONTROL, MCP795_EXTOSC_BIT, data);
152 if (ret)
153 return ret;
154 }
155 return mcp795_rtcc_set_bits(
156 dev, MCP795_REG_SECONDS, MCP795_ST_BIT, MCP795_ST_BIT);
157}
158
159
160static int mcp795_update_alarm(struct device *dev, bool enable)
161{
162 int ret;
163
164 dev_dbg(dev, "%s alarm\n", enable ? "Enable" : "Disable");
165
166 if (enable) {
167
168 ret = mcp795_rtcc_set_bits(dev, MCP795_REG_ALM0_DAY,
169 MCP795_ALM0IF_BIT, 0);
170 if (ret)
171 return ret;
172
173 ret = mcp795_rtcc_set_bits(dev, MCP795_REG_CONTROL,
174 MCP795_ALM0_BIT, MCP795_ALM0_BIT);
175 } else {
176
177 ret = mcp795_rtcc_set_bits(dev, MCP795_REG_CONTROL,
178 MCP795_ALM0_BIT | MCP795_ALM1_BIT, 0);
179 }
180 return ret;
181}
182
183static int mcp795_set_time(struct device *dev, struct rtc_time *tim)
184{
185 int ret;
186 u8 data[7];
187 bool extosc;
188
189
190 ret = mcp795_stop_oscillator(dev, &extosc);
191 if (ret)
192 return ret;
193
194
195 ret = mcp795_rtcc_read(dev, MCP795_REG_SECONDS, data, sizeof(data));
196
197 if (ret)
198 return ret;
199
200 data[0] = (data[0] & 0x80) | bin2bcd(tim->tm_sec);
201 data[1] = (data[1] & 0x80) | bin2bcd(tim->tm_min);
202 data[2] = bin2bcd(tim->tm_hour);
203 data[3] = (data[3] & 0xF8) | bin2bcd(tim->tm_wday + 1);
204 data[4] = bin2bcd(tim->tm_mday);
205 data[5] = (data[5] & MCP795_LP_BIT) | bin2bcd(tim->tm_mon + 1);
206
207 if (tim->tm_year > 100)
208 tim->tm_year -= 100;
209
210 data[6] = bin2bcd(tim->tm_year);
211
212
213
214
215
216 ret = mcp795_rtcc_write(dev, MCP795_REG_SECONDS, data, 5);
217 if (ret)
218 return ret;
219
220 ret = mcp795_rtcc_write(dev, MCP795_REG_MONTH, &data[5], 2);
221 if (ret)
222 return ret;
223
224
225
226
227
228 ret = mcp795_start_oscillator(dev, extosc ? &extosc : NULL);
229 if (ret)
230 return ret;
231
232 dev_dbg(dev, "Set mcp795: %ptR\n", tim);
233
234 return 0;
235}
236
237static int mcp795_read_time(struct device *dev, struct rtc_time *tim)
238{
239 int ret;
240 u8 data[7];
241
242 ret = mcp795_rtcc_read(dev, MCP795_REG_SECONDS, data, sizeof(data));
243
244 if (ret)
245 return ret;
246
247 tim->tm_sec = bcd2bin(data[0] & 0x7F);
248 tim->tm_min = bcd2bin(data[1] & 0x7F);
249 tim->tm_hour = bcd2bin(data[2] & 0x3F);
250 tim->tm_wday = bcd2bin(data[3] & 0x07) - 1;
251 tim->tm_mday = bcd2bin(data[4] & 0x3F);
252 tim->tm_mon = bcd2bin(data[5] & 0x1F) - 1;
253 tim->tm_year = bcd2bin(data[6]) + 100;
254
255 dev_dbg(dev, "Read from mcp795: %ptR\n", tim);
256
257 return 0;
258}
259
260static int mcp795_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
261{
262 struct rtc_time now_tm;
263 time64_t now;
264 time64_t later;
265 u8 tmp[6];
266 int ret;
267
268
269 ret = mcp795_read_time(dev, &now_tm);
270 if (ret)
271 return ret;
272
273 now = rtc_tm_to_time64(&now_tm);
274 later = rtc_tm_to_time64(&alm->time);
275 if (later <= now)
276 return -EINVAL;
277
278 if ((later - now) >=
279 (SEC_PER_DAY * (365 + is_leap_year(alm->time.tm_year))))
280 return -EDOM;
281
282 ret = mcp795_update_alarm(dev, false);
283 if (ret)
284 return ret;
285
286 ret = mcp795_rtcc_read(dev, MCP795_REG_ALM0_SECONDS, tmp, sizeof(tmp));
287 if (ret)
288 return ret;
289
290 alm->time.tm_year = -1;
291 alm->time.tm_isdst = -1;
292 alm->time.tm_yday = -1;
293
294 tmp[0] = (tmp[0] & 0x80) | bin2bcd(alm->time.tm_sec);
295 tmp[1] = (tmp[1] & 0x80) | bin2bcd(alm->time.tm_min);
296 tmp[2] = (tmp[2] & 0xE0) | bin2bcd(alm->time.tm_hour);
297 tmp[3] = (tmp[3] & 0x80) | bin2bcd(alm->time.tm_wday + 1);
298
299 tmp[3] |= (MCP795_ALM0C2_BIT | MCP795_ALM0C1_BIT | MCP795_ALM0C0_BIT);
300 tmp[4] = (tmp[4] & 0xC0) | bin2bcd(alm->time.tm_mday);
301 tmp[5] = (tmp[5] & 0xE0) | bin2bcd(alm->time.tm_mon + 1);
302
303 ret = mcp795_rtcc_write(dev, MCP795_REG_ALM0_SECONDS, tmp, sizeof(tmp));
304 if (ret)
305 return ret;
306
307
308 if (alm->enabled) {
309 ret = mcp795_update_alarm(dev, true);
310 if (ret)
311 return ret;
312 dev_dbg(dev, "Alarm IRQ armed\n");
313 }
314 dev_dbg(dev, "Set alarm: %ptRdr(%d) %ptRt\n",
315 &alm->time, alm->time.tm_wday, &alm->time);
316 return 0;
317}
318
319static int mcp795_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
320{
321 u8 data[6];
322 int ret;
323
324 ret = mcp795_rtcc_read(
325 dev, MCP795_REG_ALM0_SECONDS, data, sizeof(data));
326 if (ret)
327 return ret;
328
329 alm->time.tm_sec = bcd2bin(data[0] & 0x7F);
330 alm->time.tm_min = bcd2bin(data[1] & 0x7F);
331 alm->time.tm_hour = bcd2bin(data[2] & 0x1F);
332 alm->time.tm_wday = bcd2bin(data[3] & 0x07) - 1;
333 alm->time.tm_mday = bcd2bin(data[4] & 0x3F);
334 alm->time.tm_mon = bcd2bin(data[5] & 0x1F) - 1;
335 alm->time.tm_year = -1;
336 alm->time.tm_isdst = -1;
337 alm->time.tm_yday = -1;
338
339 dev_dbg(dev, "Read alarm: %ptRdr(%d) %ptRt\n",
340 &alm->time, alm->time.tm_wday, &alm->time);
341 return 0;
342}
343
344static int mcp795_alarm_irq_enable(struct device *dev, unsigned int enabled)
345{
346 return mcp795_update_alarm(dev, !!enabled);
347}
348
349static irqreturn_t mcp795_irq(int irq, void *data)
350{
351 struct spi_device *spi = data;
352 struct rtc_device *rtc = spi_get_drvdata(spi);
353 struct mutex *lock = &rtc->ops_lock;
354 int ret;
355
356 mutex_lock(lock);
357
358
359
360
361
362 ret = mcp795_update_alarm(&spi->dev, false);
363 if (ret)
364 dev_err(&spi->dev,
365 "Failed to disable alarm in IRQ (ret=%d)\n", ret);
366 rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
367
368 mutex_unlock(lock);
369
370 return IRQ_HANDLED;
371}
372
373static const struct rtc_class_ops mcp795_rtc_ops = {
374 .read_time = mcp795_read_time,
375 .set_time = mcp795_set_time,
376 .read_alarm = mcp795_read_alarm,
377 .set_alarm = mcp795_set_alarm,
378 .alarm_irq_enable = mcp795_alarm_irq_enable
379};
380
381static int mcp795_probe(struct spi_device *spi)
382{
383 struct rtc_device *rtc;
384 int ret;
385
386 spi->mode = SPI_MODE_0;
387 spi->bits_per_word = 8;
388 ret = spi_setup(spi);
389 if (ret) {
390 dev_err(&spi->dev, "Unable to setup SPI\n");
391 return ret;
392 }
393
394
395 mcp795_start_oscillator(&spi->dev, NULL);
396
397 mcp795_rtcc_set_bits(&spi->dev, 0x03, MCP795_24_BIT, 0);
398
399 rtc = devm_rtc_device_register(&spi->dev, "rtc-mcp795",
400 &mcp795_rtc_ops, THIS_MODULE);
401 if (IS_ERR(rtc))
402 return PTR_ERR(rtc);
403
404 spi_set_drvdata(spi, rtc);
405
406 if (spi->irq > 0) {
407 dev_dbg(&spi->dev, "Alarm support enabled\n");
408
409
410
411
412 mcp795_rtcc_set_bits(&spi->dev, MCP795_REG_ALM0_DAY,
413 MCP795_ALM0IF_BIT, 0);
414 ret = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
415 mcp795_irq, IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
416 dev_name(&rtc->dev), spi);
417 if (ret)
418 dev_err(&spi->dev, "Failed to request IRQ: %d: %d\n",
419 spi->irq, ret);
420 else
421 device_init_wakeup(&spi->dev, true);
422 }
423 return 0;
424}
425
426#ifdef CONFIG_OF
427static const struct of_device_id mcp795_of_match[] = {
428 { .compatible = "maxim,mcp795" },
429 { }
430};
431MODULE_DEVICE_TABLE(of, mcp795_of_match);
432#endif
433
434static struct spi_driver mcp795_driver = {
435 .driver = {
436 .name = "rtc-mcp795",
437 .of_match_table = of_match_ptr(mcp795_of_match),
438 },
439 .probe = mcp795_probe,
440};
441
442module_spi_driver(mcp795_driver);
443
444MODULE_DESCRIPTION("MCP795 RTC SPI Driver");
445MODULE_AUTHOR("Josef Gajdusek <atx@atx.name>");
446MODULE_LICENSE("GPL");
447MODULE_ALIAS("spi:mcp795");
448
