linux/drivers/video/fbdev/wm8505fb_regs.h
<<
>>
Prefs
   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 *  GOVR registers list for WM8505 chips
   4 *
   5 *  Copyright (C) 2010 Ed Spiridonov <edo.rus@gmail.com>
   6 *   Based on VIA/WonderMedia wm8510-govrh-reg.h
   7 *   http://github.com/projectgus/kernel_wm8505/blob/wm8505_2.6.29/
   8 *         drivers/video/wmt/register/wm8510/wm8510-govrh-reg.h
   9 */
  10
  11#ifndef _WM8505FB_REGS_H
  12#define _WM8505FB_REGS_H
  13
  14/*
  15 * Color space select register, default value 0x1c
  16 *   BIT0 GOVRH_DVO_YUV2RGB_ENABLE
  17 *   BIT1 GOVRH_VGA_YUV2RGB_ENABLE
  18 *   BIT2 GOVRH_RGB_MODE
  19 *   BIT3 GOVRH_DAC_CLKINV
  20 *   BIT4 GOVRH_BLANK_ZERO
  21 */
  22#define WMT_GOVR_COLORSPACE     0x1e4
  23/*
  24 * Another colorspace select register, default value 1
  25 *   BIT0 GOVRH_DVO_RGB
  26 *   BIT1 GOVRH_DVO_YUV422
  27 */
  28#define WMT_GOVR_COLORSPACE1     0x30
  29
  30#define WMT_GOVR_CONTRAST       0x1b8
  31#define WMT_GOVR_BRGHTNESS      0x1bc /* incompatible with RGB? */
  32
  33/* Framubeffer address */
  34#define WMT_GOVR_FBADDR          0x90
  35#define WMT_GOVR_FBADDR1         0x94 /* UV offset in YUV mode */
  36
  37/* Offset of visible window */
  38#define WMT_GOVR_XPAN            0xa4
  39#define WMT_GOVR_YPAN            0xa0
  40
  41#define WMT_GOVR_XRES            0x98
  42#define WMT_GOVR_XRES_VIRTUAL    0x9c
  43
  44#define WMT_GOVR_MIF_ENABLE      0x80
  45#define WMT_GOVR_FHI             0xa8
  46#define WMT_GOVR_REG_UPDATE      0xe4
  47
  48/*
  49 *   BIT0 GOVRH_DVO_OUTWIDTH
  50 *   BIT1 GOVRH_DVO_SYNC_POLAR
  51 *   BIT2 GOVRH_DVO_ENABLE
  52 */
  53#define WMT_GOVR_DVO_SET        0x148
  54
  55/* Timing generator? */
  56#define WMT_GOVR_TG             0x100
  57
  58/* Timings */
  59#define WMT_GOVR_TIMING_H_ALL   0x108
  60#define WMT_GOVR_TIMING_V_ALL   0x10c
  61#define WMT_GOVR_TIMING_V_START 0x110
  62#define WMT_GOVR_TIMING_V_END   0x114
  63#define WMT_GOVR_TIMING_H_START 0x118
  64#define WMT_GOVR_TIMING_H_END   0x11c
  65#define WMT_GOVR_TIMING_V_SYNC  0x128
  66#define WMT_GOVR_TIMING_H_SYNC  0x12c
  67
  68#endif /* _WM8505FB_REGS_H */
  69