LXR linux/include/linux/platform

   1/* SPDX-License-Identifier: GPL-2.0 */
   2
   3#ifndef __TI_SYSC_DATA_H__
   4#define __TI_SYSC_DATA_H__
   5
   6enum ti_sysc_module_type {
   7        TI_SYSC_OMAP2,
   8        TI_SYSC_OMAP2_TIMER,
   9        TI_SYSC_OMAP3_SHAM,
  10        TI_SYSC_OMAP3_AES,
  11        TI_SYSC_OMAP4,
  12        TI_SYSC_OMAP4_TIMER,
  13        TI_SYSC_OMAP4_SIMPLE,
  14        TI_SYSC_OMAP34XX_SR,
  15        TI_SYSC_OMAP36XX_SR,
  16        TI_SYSC_OMAP4_SR,
  17        TI_SYSC_OMAP4_MCASP,
  18        TI_SYSC_OMAP4_USB_HOST_FS,
  19        TI_SYSC_DRA7_MCAN,
  20        TI_SYSC_PRUSS,
  21};
  22
  23struct ti_sysc_cookie {
  24        void *data;
  25        void *clkdm;
  26};
  27
  28/**
  29 * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
  30 * @midle_shift: Offset of the midle bit
  31 * @clkact_shift: Offset of the clockactivity bit
  32 * @sidle_shift: Offset of the sidle bit
  33 * @enwkup_shift: Offset of the enawakeup bit
  34 * @srst_shift: Offset of the softreset bit
  35 * @autoidle_shift: Offset of the autoidle bit
  36 * @dmadisable_shift: Offset of the dmadisable bit
  37 * @emufree_shift; Offset of the emufree bit
  38 *
  39 * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
  40 * feature is not available.
  41 */
  42struct sysc_regbits {
  43        s8 midle_shift;
  44        s8 clkact_shift;
  45        s8 sidle_shift;
  46        s8 enwkup_shift;
  47        s8 srst_shift;
  48        s8 autoidle_shift;
  49        s8 dmadisable_shift;
  50        s8 emufree_shift;
  51};
  52
  53#define SYSC_MODULE_QUIRK_ENA_RESETDONE BIT(25)
  54#define SYSC_MODULE_QUIRK_PRUSS         BIT(24)
  55#define SYSC_MODULE_QUIRK_DSS_RESET     BIT(23)
  56#define SYSC_MODULE_QUIRK_RTC_UNLOCK    BIT(22)
  57#define SYSC_QUIRK_CLKDM_NOAUTO         BIT(21)
  58#define SYSC_QUIRK_FORCE_MSTANDBY       BIT(20)
  59#define SYSC_MODULE_QUIRK_AESS          BIT(19)
  60#define SYSC_MODULE_QUIRK_SGX           BIT(18)
  61#define SYSC_MODULE_QUIRK_HDQ1W         BIT(17)
  62#define SYSC_MODULE_QUIRK_I2C           BIT(16)
  63#define SYSC_MODULE_QUIRK_WDT           BIT(15)
  64#define SYSS_QUIRK_RESETDONE_INVERTED   BIT(14)
  65#define SYSC_QUIRK_SWSUP_MSTANDBY       BIT(13)
  66#define SYSC_QUIRK_SWSUP_SIDLE_ACT      BIT(12)
  67#define SYSC_QUIRK_SWSUP_SIDLE          BIT(11)
  68#define SYSC_QUIRK_EXT_OPT_CLOCK        BIT(10)
  69#define SYSC_QUIRK_LEGACY_IDLE          BIT(9)
  70#define SYSC_QUIRK_RESET_STATUS         BIT(8)
  71#define SYSC_QUIRK_NO_IDLE              BIT(7)
  72#define SYSC_QUIRK_NO_IDLE_ON_INIT      BIT(6)
  73#define SYSC_QUIRK_NO_RESET_ON_INIT     BIT(5)
  74#define SYSC_QUIRK_OPT_CLKS_NEEDED      BIT(4)
  75#define SYSC_QUIRK_OPT_CLKS_IN_RESET    BIT(3)
  76#define SYSC_QUIRK_16BIT                BIT(2)
  77#define SYSC_QUIRK_UNCACHED             BIT(1)
  78#define SYSC_QUIRK_USE_CLOCKACT         BIT(0)
  79
  80#define SYSC_NR_IDLEMODES               4
  81
  82/**
  83 * struct sysc_capabilities - capabilities for an interconnect target module
  84 * @type: sysc type identifier for the module
  85 * @sysc_mask: bitmask of supported SYSCONFIG register bits
  86 * @regbits: bitmask of SYSCONFIG register bits
  87 * @mod_quirks: bitmask of module specific quirks
  88 */
  89struct sysc_capabilities {
  90        const enum ti_sysc_module_type type;
  91        const u32 sysc_mask;
  92        const struct sysc_regbits *regbits;
  93        const u32 mod_quirks;
  94};
  95
  96/**
  97 * struct sysc_config - configuration for an interconnect target module
  98 * @sysc_val: configured value for sysc register
  99 * @syss_mask: configured mask value for SYSSTATUS register
 100 * @midlemodes: bitmask of supported master idle modes
 101 * @sidlemodes: bitmask of supported slave idle modes
 102 * @srst_udelay: optional delay needed after OCP soft reset
 103 * @quirks: bitmask of enabled quirks
 104 */
 105struct sysc_config {
 106        u32 sysc_val;
 107        u32 syss_mask;
 108        u8 midlemodes;
 109        u8 sidlemodes;
 110        u8 srst_udelay;
 111        u32 quirks;
 112};
 113
 114enum sysc_registers {
 115        SYSC_REVISION,
 116        SYSC_SYSCONFIG,
 117        SYSC_SYSSTATUS,
 118        SYSC_MAX_REGS,
 119};
 120
 121/**
 122 * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
 123 * @name: legacy "ti,hwmods" module name
 124 * @module_pa: physical address of the interconnect target module
 125 * @module_size: size of the interconnect target module
 126 * @offsets: array of register offsets as listed in enum sysc_registers
 127 * @nr_offsets: number of registers
 128 * @cap: interconnect target module capabilities
 129 * @cfg: interconnect target module configuration
 130 *
 131 * This data is enough to allocate a new struct omap_hwmod_class_sysconfig
 132 * based on device tree data parsed by ti-sysc driver.
 133 */
 134struct ti_sysc_module_data {
 135        const char *name;
 136        u64 module_pa;
 137        u32 module_size;
 138        int *offsets;
 139        int nr_offsets;
 140        const struct sysc_capabilities *cap;
 141        struct sysc_config *cfg;
 142};
 143
 144struct device;
 145struct clk;
 146
 147struct ti_sysc_platform_data {
 148        struct of_dev_auxdata *auxdata;
 149        bool (*soc_type_gp)(void);
 150        int (*init_clockdomain)(struct device *dev, struct clk *fck,
 151                                struct clk *ick, struct ti_sysc_cookie *cookie);
 152        void (*clkdm_deny_idle)(struct device *dev,
 153                                const struct ti_sysc_cookie *cookie);
 154        void (*clkdm_allow_idle)(struct device *dev,
 155                                 const struct ti_sysc_cookie *cookie);
 156        int (*init_module)(struct device *dev,
 157                           const struct ti_sysc_module_data *data,
 158                           struct ti_sysc_cookie *cookie);
 159        int (*enable_module)(struct device *dev,
 160                             const struct ti_sysc_cookie *cookie);
 161        int (*idle_module)(struct device *dev,
 162                           const struct ti_sysc_cookie *cookie);
 163        int (*shutdown_module)(struct device *dev,
 164                               const struct ti_sysc_cookie *cookie);
 165};
 166
 167#endif  /* __TI_SYSC_DATA_H__ */
 168