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31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/platform_device.h>
35#include <linux/dma-mapping.h>
36#include <linux/init.h>
37#include <linux/module.h>
38#include <linux/mm.h>
39#include <linux/device.h>
40#include <linux/dmaengine.h>
41#include <linux/hardirq.h>
42#include <linux/spinlock.h>
43#include <linux/percpu.h>
44#include <linux/rcupdate.h>
45#include <linux/mutex.h>
46#include <linux/jiffies.h>
47#include <linux/rculist.h>
48#include <linux/idr.h>
49#include <linux/slab.h>
50#include <linux/acpi.h>
51#include <linux/acpi_dma.h>
52#include <linux/of_dma.h>
53#include <linux/mempool.h>
54#include <linux/numa.h>
55
56#include "dmaengine.h"
57
58static DEFINE_MUTEX(dma_list_mutex);
59static DEFINE_IDA(dma_ida);
60static LIST_HEAD(dma_device_list);
61static long dmaengine_ref_count;
62
63
64#ifdef CONFIG_DEBUG_FS
65#include <linux/debugfs.h>
66
67static struct dentry *rootdir;
68
69static void dmaengine_debug_register(struct dma_device *dma_dev)
70{
71 dma_dev->dbg_dev_root = debugfs_create_dir(dev_name(dma_dev->dev),
72 rootdir);
73 if (IS_ERR(dma_dev->dbg_dev_root))
74 dma_dev->dbg_dev_root = NULL;
75}
76
77static void dmaengine_debug_unregister(struct dma_device *dma_dev)
78{
79 debugfs_remove_recursive(dma_dev->dbg_dev_root);
80 dma_dev->dbg_dev_root = NULL;
81}
82
83static void dmaengine_dbg_summary_show(struct seq_file *s,
84 struct dma_device *dma_dev)
85{
86 struct dma_chan *chan;
87
88 list_for_each_entry(chan, &dma_dev->channels, device_node) {
89 if (chan->client_count) {
90 seq_printf(s, " %-13s| %s", dma_chan_name(chan),
91 chan->dbg_client_name ?: "in-use");
92
93 if (chan->router)
94 seq_printf(s, " (via router: %s)\n",
95 dev_name(chan->router->dev));
96 else
97 seq_puts(s, "\n");
98 }
99 }
100}
101
102static int dmaengine_summary_show(struct seq_file *s, void *data)
103{
104 struct dma_device *dma_dev = NULL;
105
106 mutex_lock(&dma_list_mutex);
107 list_for_each_entry(dma_dev, &dma_device_list, global_node) {
108 seq_printf(s, "dma%d (%s): number of channels: %u\n",
109 dma_dev->dev_id, dev_name(dma_dev->dev),
110 dma_dev->chancnt);
111
112 if (dma_dev->dbg_summary_show)
113 dma_dev->dbg_summary_show(s, dma_dev);
114 else
115 dmaengine_dbg_summary_show(s, dma_dev);
116
117 if (!list_is_last(&dma_dev->global_node, &dma_device_list))
118 seq_puts(s, "\n");
119 }
120 mutex_unlock(&dma_list_mutex);
121
122 return 0;
123}
124DEFINE_SHOW_ATTRIBUTE(dmaengine_summary);
125
126static void __init dmaengine_debugfs_init(void)
127{
128 rootdir = debugfs_create_dir("dmaengine", NULL);
129
130
131 debugfs_create_file("summary", 0444, rootdir, NULL,
132 &dmaengine_summary_fops);
133}
134#else
135static inline void dmaengine_debugfs_init(void) { }
136static inline int dmaengine_debug_register(struct dma_device *dma_dev)
137{
138 return 0;
139}
140
141static inline void dmaengine_debug_unregister(struct dma_device *dma_dev) { }
142#endif
143
144
145
146#define DMA_SLAVE_NAME "slave"
147
148
149
150
151
152
153
154static struct dma_chan *dev_to_dma_chan(struct device *dev)
155{
156 struct dma_chan_dev *chan_dev;
157
158 chan_dev = container_of(dev, typeof(*chan_dev), device);
159 return chan_dev->chan;
160}
161
162static ssize_t memcpy_count_show(struct device *dev,
163 struct device_attribute *attr, char *buf)
164{
165 struct dma_chan *chan;
166 unsigned long count = 0;
167 int i;
168 int err;
169
170 mutex_lock(&dma_list_mutex);
171 chan = dev_to_dma_chan(dev);
172 if (chan) {
173 for_each_possible_cpu(i)
174 count += per_cpu_ptr(chan->local, i)->memcpy_count;
175 err = sprintf(buf, "%lu\n", count);
176 } else
177 err = -ENODEV;
178 mutex_unlock(&dma_list_mutex);
179
180 return err;
181}
182static DEVICE_ATTR_RO(memcpy_count);
183
184static ssize_t bytes_transferred_show(struct device *dev,
185 struct device_attribute *attr, char *buf)
186{
187 struct dma_chan *chan;
188 unsigned long count = 0;
189 int i;
190 int err;
191
192 mutex_lock(&dma_list_mutex);
193 chan = dev_to_dma_chan(dev);
194 if (chan) {
195 for_each_possible_cpu(i)
196 count += per_cpu_ptr(chan->local, i)->bytes_transferred;
197 err = sprintf(buf, "%lu\n", count);
198 } else
199 err = -ENODEV;
200 mutex_unlock(&dma_list_mutex);
201
202 return err;
203}
204static DEVICE_ATTR_RO(bytes_transferred);
205
206static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
207 char *buf)
208{
209 struct dma_chan *chan;
210 int err;
211
212 mutex_lock(&dma_list_mutex);
213 chan = dev_to_dma_chan(dev);
214 if (chan)
215 err = sprintf(buf, "%d\n", chan->client_count);
216 else
217 err = -ENODEV;
218 mutex_unlock(&dma_list_mutex);
219
220 return err;
221}
222static DEVICE_ATTR_RO(in_use);
223
224static struct attribute *dma_dev_attrs[] = {
225 &dev_attr_memcpy_count.attr,
226 &dev_attr_bytes_transferred.attr,
227 &dev_attr_in_use.attr,
228 NULL,
229};
230ATTRIBUTE_GROUPS(dma_dev);
231
232static void chan_dev_release(struct device *dev)
233{
234 struct dma_chan_dev *chan_dev;
235
236 chan_dev = container_of(dev, typeof(*chan_dev), device);
237 kfree(chan_dev);
238}
239
240static struct class dma_devclass = {
241 .name = "dma",
242 .dev_groups = dma_dev_groups,
243 .dev_release = chan_dev_release,
244};
245
246
247
248
249static dma_cap_mask_t dma_cap_mask_all;
250
251
252
253
254
255struct dma_chan_tbl_ent {
256 struct dma_chan *chan;
257};
258
259
260static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
261
262static int __init dma_channel_table_init(void)
263{
264 enum dma_transaction_type cap;
265 int err = 0;
266
267 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
268
269
270
271
272
273 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
274 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
275 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
276
277 for_each_dma_cap_mask(cap, dma_cap_mask_all) {
278 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
279 if (!channel_table[cap]) {
280 err = -ENOMEM;
281 break;
282 }
283 }
284
285 if (err) {
286 pr_err("dmaengine dma_channel_table_init failure: %d\n", err);
287 for_each_dma_cap_mask(cap, dma_cap_mask_all)
288 free_percpu(channel_table[cap]);
289 }
290
291 return err;
292}
293arch_initcall(dma_channel_table_init);
294
295
296
297
298
299
300
301
302static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
303{
304 int node = dev_to_node(chan->device->dev);
305 return node == NUMA_NO_NODE ||
306 cpumask_test_cpu(cpu, cpumask_of_node(node));
307}
308
309
310
311
312
313
314
315
316
317
318
319
320static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
321{
322 struct dma_device *device;
323 struct dma_chan *chan;
324 struct dma_chan *min = NULL;
325 struct dma_chan *localmin = NULL;
326
327 list_for_each_entry(device, &dma_device_list, global_node) {
328 if (!dma_has_cap(cap, device->cap_mask) ||
329 dma_has_cap(DMA_PRIVATE, device->cap_mask))
330 continue;
331 list_for_each_entry(chan, &device->channels, device_node) {
332 if (!chan->client_count)
333 continue;
334 if (!min || chan->table_count < min->table_count)
335 min = chan;
336
337 if (dma_chan_is_local(chan, cpu))
338 if (!localmin ||
339 chan->table_count < localmin->table_count)
340 localmin = chan;
341 }
342 }
343
344 chan = localmin ? localmin : min;
345
346 if (chan)
347 chan->table_count++;
348
349 return chan;
350}
351
352
353
354
355
356
357
358
359
360
361static void dma_channel_rebalance(void)
362{
363 struct dma_chan *chan;
364 struct dma_device *device;
365 int cpu;
366 int cap;
367
368
369 for_each_dma_cap_mask(cap, dma_cap_mask_all)
370 for_each_possible_cpu(cpu)
371 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
372
373 list_for_each_entry(device, &dma_device_list, global_node) {
374 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
375 continue;
376 list_for_each_entry(chan, &device->channels, device_node)
377 chan->table_count = 0;
378 }
379
380
381 if (!dmaengine_ref_count)
382 return;
383
384
385 for_each_dma_cap_mask(cap, dma_cap_mask_all)
386 for_each_online_cpu(cpu) {
387 chan = min_chan(cap, cpu);
388 per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
389 }
390}
391
392static int dma_device_satisfies_mask(struct dma_device *device,
393 const dma_cap_mask_t *want)
394{
395 dma_cap_mask_t has;
396
397 bitmap_and(has.bits, want->bits, device->cap_mask.bits,
398 DMA_TX_TYPE_END);
399 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
400}
401
402static struct module *dma_chan_to_owner(struct dma_chan *chan)
403{
404 return chan->device->owner;
405}
406
407
408
409
410
411
412
413static void balance_ref_count(struct dma_chan *chan)
414{
415 struct module *owner = dma_chan_to_owner(chan);
416
417 while (chan->client_count < dmaengine_ref_count) {
418 __module_get(owner);
419 chan->client_count++;
420 }
421}
422
423static void dma_device_release(struct kref *ref)
424{
425 struct dma_device *device = container_of(ref, struct dma_device, ref);
426
427 list_del_rcu(&device->global_node);
428 dma_channel_rebalance();
429
430 if (device->device_release)
431 device->device_release(device);
432}
433
434static void dma_device_put(struct dma_device *device)
435{
436 lockdep_assert_held(&dma_list_mutex);
437 kref_put(&device->ref, dma_device_release);
438}
439
440
441
442
443
444
445
446static int dma_chan_get(struct dma_chan *chan)
447{
448 struct module *owner = dma_chan_to_owner(chan);
449 int ret;
450
451
452 if (chan->client_count) {
453 __module_get(owner);
454 goto out;
455 }
456
457 if (!try_module_get(owner))
458 return -ENODEV;
459
460 ret = kref_get_unless_zero(&chan->device->ref);
461 if (!ret) {
462 ret = -ENODEV;
463 goto module_put_out;
464 }
465
466
467 if (chan->device->device_alloc_chan_resources) {
468 ret = chan->device->device_alloc_chan_resources(chan);
469 if (ret < 0)
470 goto err_out;
471 }
472
473 if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
474 balance_ref_count(chan);
475
476out:
477 chan->client_count++;
478 return 0;
479
480err_out:
481 dma_device_put(chan->device);
482module_put_out:
483 module_put(owner);
484 return ret;
485}
486
487
488
489
490
491
492
493static void dma_chan_put(struct dma_chan *chan)
494{
495
496 if (!chan->client_count)
497 return;
498
499 chan->client_count--;
500
501
502 if (!chan->client_count && chan->device->device_free_chan_resources) {
503
504 dmaengine_synchronize(chan);
505 chan->device->device_free_chan_resources(chan);
506 }
507
508
509 if (chan->router && chan->router->route_free) {
510 chan->router->route_free(chan->router->dev, chan->route_data);
511 chan->router = NULL;
512 chan->route_data = NULL;
513 }
514
515 dma_device_put(chan->device);
516 module_put(dma_chan_to_owner(chan));
517}
518
519enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
520{
521 enum dma_status status;
522 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
523
524 dma_async_issue_pending(chan);
525 do {
526 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
527 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
528 dev_err(chan->device->dev, "%s: timeout!\n", __func__);
529 return DMA_ERROR;
530 }
531 if (status != DMA_IN_PROGRESS)
532 break;
533 cpu_relax();
534 } while (1);
535
536 return status;
537}
538EXPORT_SYMBOL(dma_sync_wait);
539
540
541
542
543
544struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
545{
546 return this_cpu_read(channel_table[tx_type]->chan);
547}
548EXPORT_SYMBOL(dma_find_channel);
549
550
551
552
553void dma_issue_pending_all(void)
554{
555 struct dma_device *device;
556 struct dma_chan *chan;
557
558 rcu_read_lock();
559 list_for_each_entry_rcu(device, &dma_device_list, global_node) {
560 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
561 continue;
562 list_for_each_entry(chan, &device->channels, device_node)
563 if (chan->client_count)
564 device->device_issue_pending(chan);
565 }
566 rcu_read_unlock();
567}
568EXPORT_SYMBOL(dma_issue_pending_all);
569
570int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
571{
572 struct dma_device *device;
573
574 if (!chan || !caps)
575 return -EINVAL;
576
577 device = chan->device;
578
579
580 if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) ||
581 test_bit(DMA_CYCLIC, device->cap_mask.bits)))
582 return -ENXIO;
583
584
585
586
587
588
589 if (!device->directions)
590 return -ENXIO;
591
592 caps->src_addr_widths = device->src_addr_widths;
593 caps->dst_addr_widths = device->dst_addr_widths;
594 caps->directions = device->directions;
595 caps->min_burst = device->min_burst;
596 caps->max_burst = device->max_burst;
597 caps->max_sg_burst = device->max_sg_burst;
598 caps->residue_granularity = device->residue_granularity;
599 caps->descriptor_reuse = device->descriptor_reuse;
600 caps->cmd_pause = !!device->device_pause;
601 caps->cmd_resume = !!device->device_resume;
602 caps->cmd_terminate = !!device->device_terminate_all;
603
604
605
606
607
608
609
610
611 if (device->device_caps)
612 device->device_caps(chan, caps);
613
614 return 0;
615}
616EXPORT_SYMBOL_GPL(dma_get_slave_caps);
617
618static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
619 struct dma_device *dev,
620 dma_filter_fn fn, void *fn_param)
621{
622 struct dma_chan *chan;
623
624 if (mask && !dma_device_satisfies_mask(dev, mask)) {
625 dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__);
626 return NULL;
627 }
628
629
630
631 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
632 list_for_each_entry(chan, &dev->channels, device_node) {
633
634 if (chan->client_count)
635 return NULL;
636 }
637
638 list_for_each_entry(chan, &dev->channels, device_node) {
639 if (chan->client_count) {
640 dev_dbg(dev->dev, "%s: %s busy\n",
641 __func__, dma_chan_name(chan));
642 continue;
643 }
644 if (fn && !fn(chan, fn_param)) {
645 dev_dbg(dev->dev, "%s: %s filter said false\n",
646 __func__, dma_chan_name(chan));
647 continue;
648 }
649 return chan;
650 }
651
652 return NULL;
653}
654
655static struct dma_chan *find_candidate(struct dma_device *device,
656 const dma_cap_mask_t *mask,
657 dma_filter_fn fn, void *fn_param)
658{
659 struct dma_chan *chan = private_candidate(mask, device, fn, fn_param);
660 int err;
661
662 if (chan) {
663
664
665
666
667
668 dma_cap_set(DMA_PRIVATE, device->cap_mask);
669 device->privatecnt++;
670 err = dma_chan_get(chan);
671
672 if (err) {
673 if (err == -ENODEV) {
674 dev_dbg(device->dev, "%s: %s module removed\n",
675 __func__, dma_chan_name(chan));
676 list_del_rcu(&device->global_node);
677 } else
678 dev_dbg(device->dev,
679 "%s: failed to get %s: (%d)\n",
680 __func__, dma_chan_name(chan), err);
681
682 if (--device->privatecnt == 0)
683 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
684
685 chan = ERR_PTR(err);
686 }
687 }
688
689 return chan ? chan : ERR_PTR(-EPROBE_DEFER);
690}
691
692
693
694
695
696struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
697{
698 int err = -EBUSY;
699
700
701 mutex_lock(&dma_list_mutex);
702
703 if (chan->client_count == 0) {
704 struct dma_device *device = chan->device;
705
706 dma_cap_set(DMA_PRIVATE, device->cap_mask);
707 device->privatecnt++;
708 err = dma_chan_get(chan);
709 if (err) {
710 dev_dbg(chan->device->dev,
711 "%s: failed to get %s: (%d)\n",
712 __func__, dma_chan_name(chan), err);
713 chan = NULL;
714 if (--device->privatecnt == 0)
715 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
716 }
717 } else
718 chan = NULL;
719
720 mutex_unlock(&dma_list_mutex);
721
722
723 return chan;
724}
725EXPORT_SYMBOL_GPL(dma_get_slave_channel);
726
727struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
728{
729 dma_cap_mask_t mask;
730 struct dma_chan *chan;
731
732 dma_cap_zero(mask);
733 dma_cap_set(DMA_SLAVE, mask);
734
735
736 mutex_lock(&dma_list_mutex);
737
738 chan = find_candidate(device, &mask, NULL, NULL);
739
740 mutex_unlock(&dma_list_mutex);
741
742 return IS_ERR(chan) ? NULL : chan;
743}
744EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
745
746
747
748
749
750
751
752
753
754
755struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
756 dma_filter_fn fn, void *fn_param,
757 struct device_node *np)
758{
759 struct dma_device *device, *_d;
760 struct dma_chan *chan = NULL;
761
762
763 mutex_lock(&dma_list_mutex);
764 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
765
766 if (np && device->dev->of_node && np != device->dev->of_node)
767 continue;
768
769 chan = find_candidate(device, mask, fn, fn_param);
770 if (!IS_ERR(chan))
771 break;
772
773 chan = NULL;
774 }
775 mutex_unlock(&dma_list_mutex);
776
777 pr_debug("%s: %s (%s)\n",
778 __func__,
779 chan ? "success" : "fail",
780 chan ? dma_chan_name(chan) : NULL);
781
782 return chan;
783}
784EXPORT_SYMBOL_GPL(__dma_request_channel);
785
786static const struct dma_slave_map *dma_filter_match(struct dma_device *device,
787 const char *name,
788 struct device *dev)
789{
790 int i;
791
792 if (!device->filter.mapcnt)
793 return NULL;
794
795 for (i = 0; i < device->filter.mapcnt; i++) {
796 const struct dma_slave_map *map = &device->filter.map[i];
797
798 if (!strcmp(map->devname, dev_name(dev)) &&
799 !strcmp(map->slave, name))
800 return map;
801 }
802
803 return NULL;
804}
805
806
807
808
809
810
811
812
813struct dma_chan *dma_request_chan(struct device *dev, const char *name)
814{
815 struct dma_device *d, *_d;
816 struct dma_chan *chan = NULL;
817
818
819 if (dev->of_node)
820 chan = of_dma_request_slave_channel(dev->of_node, name);
821
822
823 if (has_acpi_companion(dev) && !chan)
824 chan = acpi_dma_request_slave_chan_by_name(dev, name);
825
826 if (PTR_ERR(chan) == -EPROBE_DEFER)
827 return chan;
828
829 if (!IS_ERR_OR_NULL(chan))
830 goto found;
831
832
833 mutex_lock(&dma_list_mutex);
834 list_for_each_entry_safe(d, _d, &dma_device_list, global_node) {
835 dma_cap_mask_t mask;
836 const struct dma_slave_map *map = dma_filter_match(d, name, dev);
837
838 if (!map)
839 continue;
840
841 dma_cap_zero(mask);
842 dma_cap_set(DMA_SLAVE, mask);
843
844 chan = find_candidate(d, &mask, d->filter.fn, map->param);
845 if (!IS_ERR(chan))
846 break;
847 }
848 mutex_unlock(&dma_list_mutex);
849
850 if (IS_ERR(chan))
851 return chan;
852 if (!chan)
853 return ERR_PTR(-EPROBE_DEFER);
854
855found:
856#ifdef CONFIG_DEBUG_FS
857 chan->dbg_client_name = kasprintf(GFP_KERNEL, "%s:%s", dev_name(dev),
858 name);
859#endif
860
861 chan->name = kasprintf(GFP_KERNEL, "dma:%s", name);
862 if (!chan->name)
863 return chan;
864 chan->slave = dev;
865
866 if (sysfs_create_link(&chan->dev->device.kobj, &dev->kobj,
867 DMA_SLAVE_NAME))
868 dev_warn(dev, "Cannot create DMA %s symlink\n", DMA_SLAVE_NAME);
869 if (sysfs_create_link(&dev->kobj, &chan->dev->device.kobj, chan->name))
870 dev_warn(dev, "Cannot create DMA %s symlink\n", chan->name);
871
872 return chan;
873}
874EXPORT_SYMBOL_GPL(dma_request_chan);
875
876
877
878
879
880
881
882struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask)
883{
884 struct dma_chan *chan;
885
886 if (!mask)
887 return ERR_PTR(-ENODEV);
888
889 chan = __dma_request_channel(mask, NULL, NULL, NULL);
890 if (!chan) {
891 mutex_lock(&dma_list_mutex);
892 if (list_empty(&dma_device_list))
893 chan = ERR_PTR(-EPROBE_DEFER);
894 else
895 chan = ERR_PTR(-ENODEV);
896 mutex_unlock(&dma_list_mutex);
897 }
898
899 return chan;
900}
901EXPORT_SYMBOL_GPL(dma_request_chan_by_mask);
902
903void dma_release_channel(struct dma_chan *chan)
904{
905 mutex_lock(&dma_list_mutex);
906 WARN_ONCE(chan->client_count != 1,
907 "chan reference count %d != 1\n", chan->client_count);
908 dma_chan_put(chan);
909
910 if (--chan->device->privatecnt == 0)
911 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
912
913 if (chan->slave) {
914 sysfs_remove_link(&chan->dev->device.kobj, DMA_SLAVE_NAME);
915 sysfs_remove_link(&chan->slave->kobj, chan->name);
916 kfree(chan->name);
917 chan->name = NULL;
918 chan->slave = NULL;
919 }
920
921#ifdef CONFIG_DEBUG_FS
922 kfree(chan->dbg_client_name);
923 chan->dbg_client_name = NULL;
924#endif
925 mutex_unlock(&dma_list_mutex);
926}
927EXPORT_SYMBOL_GPL(dma_release_channel);
928
929
930
931
932void dmaengine_get(void)
933{
934 struct dma_device *device, *_d;
935 struct dma_chan *chan;
936 int err;
937
938 mutex_lock(&dma_list_mutex);
939 dmaengine_ref_count++;
940
941
942 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
943 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
944 continue;
945 list_for_each_entry(chan, &device->channels, device_node) {
946 err = dma_chan_get(chan);
947 if (err == -ENODEV) {
948
949 list_del_rcu(&device->global_node);
950 break;
951 } else if (err)
952 dev_dbg(chan->device->dev,
953 "%s: failed to get %s: (%d)\n",
954 __func__, dma_chan_name(chan), err);
955 }
956 }
957
958
959
960
961
962 if (dmaengine_ref_count == 1)
963 dma_channel_rebalance();
964 mutex_unlock(&dma_list_mutex);
965}
966EXPORT_SYMBOL(dmaengine_get);
967
968
969
970
971void dmaengine_put(void)
972{
973 struct dma_device *device, *_d;
974 struct dma_chan *chan;
975
976 mutex_lock(&dma_list_mutex);
977 dmaengine_ref_count--;
978 BUG_ON(dmaengine_ref_count < 0);
979
980 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
981 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
982 continue;
983 list_for_each_entry(chan, &device->channels, device_node)
984 dma_chan_put(chan);
985 }
986 mutex_unlock(&dma_list_mutex);
987}
988EXPORT_SYMBOL(dmaengine_put);
989
990static bool device_has_all_tx_types(struct dma_device *device)
991{
992
993
994
995
996 #ifdef CONFIG_ASYNC_TX_DMA
997 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
998 return false;
999 #endif
1000
1001 #if IS_ENABLED(CONFIG_ASYNC_MEMCPY)
1002 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
1003 return false;
1004 #endif
1005
1006 #if IS_ENABLED(CONFIG_ASYNC_XOR)
1007 if (!dma_has_cap(DMA_XOR, device->cap_mask))
1008 return false;
1009
1010 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
1011 if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
1012 return false;
1013 #endif
1014 #endif
1015
1016 #if IS_ENABLED(CONFIG_ASYNC_PQ)
1017 if (!dma_has_cap(DMA_PQ, device->cap_mask))
1018 return false;
1019
1020 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
1021 if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
1022 return false;
1023 #endif
1024 #endif
1025
1026 return true;
1027}
1028
1029static int get_dma_id(struct dma_device *device)
1030{
1031 int rc = ida_alloc(&dma_ida, GFP_KERNEL);
1032
1033 if (rc < 0)
1034 return rc;
1035 device->dev_id = rc;
1036 return 0;
1037}
1038
1039static int __dma_async_device_channel_register(struct dma_device *device,
1040 struct dma_chan *chan)
1041{
1042 int rc;
1043
1044 chan->local = alloc_percpu(typeof(*chan->local));
1045 if (!chan->local)
1046 return -ENOMEM;
1047 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
1048 if (!chan->dev) {
1049 rc = -ENOMEM;
1050 goto err_free_local;
1051 }
1052
1053
1054
1055
1056
1057 mutex_lock(&device->chan_mutex);
1058 chan->chan_id = ida_alloc(&device->chan_ida, GFP_KERNEL);
1059 mutex_unlock(&device->chan_mutex);
1060 if (chan->chan_id < 0) {
1061 pr_err("%s: unable to alloc ida for chan: %d\n",
1062 __func__, chan->chan_id);
1063 rc = chan->chan_id;
1064 goto err_free_dev;
1065 }
1066
1067 chan->dev->device.class = &dma_devclass;
1068 chan->dev->device.parent = device->dev;
1069 chan->dev->chan = chan;
1070 chan->dev->dev_id = device->dev_id;
1071 dev_set_name(&chan->dev->device, "dma%dchan%d",
1072 device->dev_id, chan->chan_id);
1073 rc = device_register(&chan->dev->device);
1074 if (rc)
1075 goto err_out_ida;
1076 chan->client_count = 0;
1077 device->chancnt++;
1078
1079 return 0;
1080
1081 err_out_ida:
1082 mutex_lock(&device->chan_mutex);
1083 ida_free(&device->chan_ida, chan->chan_id);
1084 mutex_unlock(&device->chan_mutex);
1085 err_free_dev:
1086 kfree(chan->dev);
1087 err_free_local:
1088 free_percpu(chan->local);
1089 return rc;
1090}
1091
1092int dma_async_device_channel_register(struct dma_device *device,
1093 struct dma_chan *chan)
1094{
1095 int rc;
1096
1097 rc = __dma_async_device_channel_register(device, chan);
1098 if (rc < 0)
1099 return rc;
1100
1101 dma_channel_rebalance();
1102 return 0;
1103}
1104EXPORT_SYMBOL_GPL(dma_async_device_channel_register);
1105
1106static void __dma_async_device_channel_unregister(struct dma_device *device,
1107 struct dma_chan *chan)
1108{
1109 WARN_ONCE(!device->device_release && chan->client_count,
1110 "%s called while %d clients hold a reference\n",
1111 __func__, chan->client_count);
1112 mutex_lock(&dma_list_mutex);
1113 device->chancnt--;
1114 chan->dev->chan = NULL;
1115 mutex_unlock(&dma_list_mutex);
1116 mutex_lock(&device->chan_mutex);
1117 ida_free(&device->chan_ida, chan->chan_id);
1118 mutex_unlock(&device->chan_mutex);
1119 device_unregister(&chan->dev->device);
1120 free_percpu(chan->local);
1121}
1122
1123void dma_async_device_channel_unregister(struct dma_device *device,
1124 struct dma_chan *chan)
1125{
1126 __dma_async_device_channel_unregister(device, chan);
1127 dma_channel_rebalance();
1128}
1129EXPORT_SYMBOL_GPL(dma_async_device_channel_unregister);
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139int dma_async_device_register(struct dma_device *device)
1140{
1141 int rc;
1142 struct dma_chan* chan;
1143
1144 if (!device)
1145 return -ENODEV;
1146
1147
1148 if (!device->dev) {
1149 pr_err("DMAdevice must have dev\n");
1150 return -EIO;
1151 }
1152
1153 device->owner = device->dev->driver->owner;
1154
1155 if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) {
1156 dev_err(device->dev,
1157 "Device claims capability %s, but op is not defined\n",
1158 "DMA_MEMCPY");
1159 return -EIO;
1160 }
1161
1162 if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) {
1163 dev_err(device->dev,
1164 "Device claims capability %s, but op is not defined\n",
1165 "DMA_XOR");
1166 return -EIO;
1167 }
1168
1169 if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) {
1170 dev_err(device->dev,
1171 "Device claims capability %s, but op is not defined\n",
1172 "DMA_XOR_VAL");
1173 return -EIO;
1174 }
1175
1176 if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) {
1177 dev_err(device->dev,
1178 "Device claims capability %s, but op is not defined\n",
1179 "DMA_PQ");
1180 return -EIO;
1181 }
1182
1183 if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) {
1184 dev_err(device->dev,
1185 "Device claims capability %s, but op is not defined\n",
1186 "DMA_PQ_VAL");
1187 return -EIO;
1188 }
1189
1190 if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) {
1191 dev_err(device->dev,
1192 "Device claims capability %s, but op is not defined\n",
1193 "DMA_MEMSET");
1194 return -EIO;
1195 }
1196
1197 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) {
1198 dev_err(device->dev,
1199 "Device claims capability %s, but op is not defined\n",
1200 "DMA_INTERRUPT");
1201 return -EIO;
1202 }
1203
1204 if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) {
1205 dev_err(device->dev,
1206 "Device claims capability %s, but op is not defined\n",
1207 "DMA_CYCLIC");
1208 return -EIO;
1209 }
1210
1211 if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) {
1212 dev_err(device->dev,
1213 "Device claims capability %s, but op is not defined\n",
1214 "DMA_INTERLEAVE");
1215 return -EIO;
1216 }
1217
1218
1219 if (!device->device_tx_status) {
1220 dev_err(device->dev, "Device tx_status is not defined\n");
1221 return -EIO;
1222 }
1223
1224
1225 if (!device->device_issue_pending) {
1226 dev_err(device->dev, "Device issue_pending is not defined\n");
1227 return -EIO;
1228 }
1229
1230 if (!device->device_release)
1231 dev_dbg(device->dev,
1232 "WARN: Device release is not defined so it is not safe to unbind this driver while in use\n");
1233
1234 kref_init(&device->ref);
1235
1236
1237
1238
1239 if (device_has_all_tx_types(device))
1240 dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
1241
1242 rc = get_dma_id(device);
1243 if (rc != 0)
1244 return rc;
1245
1246 mutex_init(&device->chan_mutex);
1247 ida_init(&device->chan_ida);
1248
1249
1250 list_for_each_entry(chan, &device->channels, device_node) {
1251 rc = __dma_async_device_channel_register(device, chan);
1252 if (rc < 0)
1253 goto err_out;
1254 }
1255
1256 mutex_lock(&dma_list_mutex);
1257
1258 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
1259 list_for_each_entry(chan, &device->channels, device_node) {
1260
1261
1262
1263 if (dma_chan_get(chan) == -ENODEV) {
1264
1265
1266
1267
1268 rc = -ENODEV;
1269 mutex_unlock(&dma_list_mutex);
1270 goto err_out;
1271 }
1272 }
1273 list_add_tail_rcu(&device->global_node, &dma_device_list);
1274 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
1275 device->privatecnt++;
1276 dma_channel_rebalance();
1277 mutex_unlock(&dma_list_mutex);
1278
1279 dmaengine_debug_register(device);
1280
1281 return 0;
1282
1283err_out:
1284
1285 if (!device->chancnt) {
1286 ida_free(&dma_ida, device->dev_id);
1287 return rc;
1288 }
1289
1290 list_for_each_entry(chan, &device->channels, device_node) {
1291 if (chan->local == NULL)
1292 continue;
1293 mutex_lock(&dma_list_mutex);
1294 chan->dev->chan = NULL;
1295 mutex_unlock(&dma_list_mutex);
1296 device_unregister(&chan->dev->device);
1297 free_percpu(chan->local);
1298 }
1299 return rc;
1300}
1301EXPORT_SYMBOL(dma_async_device_register);
1302
1303
1304
1305
1306
1307
1308
1309
1310void dma_async_device_unregister(struct dma_device *device)
1311{
1312 struct dma_chan *chan, *n;
1313
1314 dmaengine_debug_unregister(device);
1315
1316 list_for_each_entry_safe(chan, n, &device->channels, device_node)
1317 __dma_async_device_channel_unregister(device, chan);
1318
1319 mutex_lock(&dma_list_mutex);
1320
1321
1322
1323
1324 dma_cap_set(DMA_PRIVATE, device->cap_mask);
1325 dma_channel_rebalance();
1326 ida_free(&dma_ida, device->dev_id);
1327 dma_device_put(device);
1328 mutex_unlock(&dma_list_mutex);
1329}
1330EXPORT_SYMBOL(dma_async_device_unregister);
1331
1332static void dmam_device_release(struct device *dev, void *res)
1333{
1334 struct dma_device *device;
1335
1336 device = *(struct dma_device **)res;
1337 dma_async_device_unregister(device);
1338}
1339
1340
1341
1342
1343
1344
1345
1346int dmaenginem_async_device_register(struct dma_device *device)
1347{
1348 void *p;
1349 int ret;
1350
1351 p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL);
1352 if (!p)
1353 return -ENOMEM;
1354
1355 ret = dma_async_device_register(device);
1356 if (!ret) {
1357 *(struct dma_device **)p = device;
1358 devres_add(device->dev, p);
1359 } else {
1360 devres_free(p);
1361 }
1362
1363 return ret;
1364}
1365EXPORT_SYMBOL(dmaenginem_async_device_register);
1366
1367struct dmaengine_unmap_pool {
1368 struct kmem_cache *cache;
1369 const char *name;
1370 mempool_t *pool;
1371 size_t size;
1372};
1373
1374#define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
1375static struct dmaengine_unmap_pool unmap_pool[] = {
1376 __UNMAP_POOL(2),
1377 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
1378 __UNMAP_POOL(16),
1379 __UNMAP_POOL(128),
1380 __UNMAP_POOL(256),
1381 #endif
1382};
1383
1384static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
1385{
1386 int order = get_count_order(nr);
1387
1388 switch (order) {
1389 case 0 ... 1:
1390 return &unmap_pool[0];
1391#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
1392 case 2 ... 4:
1393 return &unmap_pool[1];
1394 case 5 ... 7:
1395 return &unmap_pool[2];
1396 case 8:
1397 return &unmap_pool[3];
1398#endif
1399 default:
1400 BUG();
1401 return NULL;
1402 }
1403}
1404
1405static void dmaengine_unmap(struct kref *kref)
1406{
1407 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
1408 struct device *dev = unmap->dev;
1409 int cnt, i;
1410
1411 cnt = unmap->to_cnt;
1412 for (i = 0; i < cnt; i++)
1413 dma_unmap_page(dev, unmap->addr[i], unmap->len,
1414 DMA_TO_DEVICE);
1415 cnt += unmap->from_cnt;
1416 for (; i < cnt; i++)
1417 dma_unmap_page(dev, unmap->addr[i], unmap->len,
1418 DMA_FROM_DEVICE);
1419 cnt += unmap->bidi_cnt;
1420 for (; i < cnt; i++) {
1421 if (unmap->addr[i] == 0)
1422 continue;
1423 dma_unmap_page(dev, unmap->addr[i], unmap->len,
1424 DMA_BIDIRECTIONAL);
1425 }
1426 cnt = unmap->map_cnt;
1427 mempool_free(unmap, __get_unmap_pool(cnt)->pool);
1428}
1429
1430void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
1431{
1432 if (unmap)
1433 kref_put(&unmap->kref, dmaengine_unmap);
1434}
1435EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
1436
1437static void dmaengine_destroy_unmap_pool(void)
1438{
1439 int i;
1440
1441 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1442 struct dmaengine_unmap_pool *p = &unmap_pool[i];
1443
1444 mempool_destroy(p->pool);
1445 p->pool = NULL;
1446 kmem_cache_destroy(p->cache);
1447 p->cache = NULL;
1448 }
1449}
1450
1451static int __init dmaengine_init_unmap_pool(void)
1452{
1453 int i;
1454
1455 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1456 struct dmaengine_unmap_pool *p = &unmap_pool[i];
1457 size_t size;
1458
1459 size = sizeof(struct dmaengine_unmap_data) +
1460 sizeof(dma_addr_t) * p->size;
1461
1462 p->cache = kmem_cache_create(p->name, size, 0,
1463 SLAB_HWCACHE_ALIGN, NULL);
1464 if (!p->cache)
1465 break;
1466 p->pool = mempool_create_slab_pool(1, p->cache);
1467 if (!p->pool)
1468 break;
1469 }
1470
1471 if (i == ARRAY_SIZE(unmap_pool))
1472 return 0;
1473
1474 dmaengine_destroy_unmap_pool();
1475 return -ENOMEM;
1476}
1477
1478struct dmaengine_unmap_data *
1479dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
1480{
1481 struct dmaengine_unmap_data *unmap;
1482
1483 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
1484 if (!unmap)
1485 return NULL;
1486
1487 memset(unmap, 0, sizeof(*unmap));
1488 kref_init(&unmap->kref);
1489 unmap->dev = dev;
1490 unmap->map_cnt = nr;
1491
1492 return unmap;
1493}
1494EXPORT_SYMBOL(dmaengine_get_unmap_data);
1495
1496void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
1497 struct dma_chan *chan)
1498{
1499 tx->chan = chan;
1500 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
1501 spin_lock_init(&tx->lock);
1502 #endif
1503}
1504EXPORT_SYMBOL(dma_async_tx_descriptor_init);
1505
1506static inline int desc_check_and_set_metadata_mode(
1507 struct dma_async_tx_descriptor *desc, enum dma_desc_metadata_mode mode)
1508{
1509
1510 if (!desc->desc_metadata_mode) {
1511 if (dmaengine_is_metadata_mode_supported(desc->chan, mode))
1512 desc->desc_metadata_mode = mode;
1513 else
1514 return -ENOTSUPP;
1515 } else if (desc->desc_metadata_mode != mode) {
1516 return -EINVAL;
1517 }
1518
1519 return 0;
1520}
1521
1522int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc,
1523 void *data, size_t len)
1524{
1525 int ret;
1526
1527 if (!desc)
1528 return -EINVAL;
1529
1530 ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_CLIENT);
1531 if (ret)
1532 return ret;
1533
1534 if (!desc->metadata_ops || !desc->metadata_ops->attach)
1535 return -ENOTSUPP;
1536
1537 return desc->metadata_ops->attach(desc, data, len);
1538}
1539EXPORT_SYMBOL_GPL(dmaengine_desc_attach_metadata);
1540
1541void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc,
1542 size_t *payload_len, size_t *max_len)
1543{
1544 int ret;
1545
1546 if (!desc)
1547 return ERR_PTR(-EINVAL);
1548
1549 ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
1550 if (ret)
1551 return ERR_PTR(ret);
1552
1553 if (!desc->metadata_ops || !desc->metadata_ops->get_ptr)
1554 return ERR_PTR(-ENOTSUPP);
1555
1556 return desc->metadata_ops->get_ptr(desc, payload_len, max_len);
1557}
1558EXPORT_SYMBOL_GPL(dmaengine_desc_get_metadata_ptr);
1559
1560int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc,
1561 size_t payload_len)
1562{
1563 int ret;
1564
1565 if (!desc)
1566 return -EINVAL;
1567
1568 ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
1569 if (ret)
1570 return ret;
1571
1572 if (!desc->metadata_ops || !desc->metadata_ops->set_len)
1573 return -ENOTSUPP;
1574
1575 return desc->metadata_ops->set_len(desc, payload_len);
1576}
1577EXPORT_SYMBOL_GPL(dmaengine_desc_set_metadata_len);
1578
1579
1580
1581
1582
1583enum dma_status
1584dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
1585{
1586 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
1587
1588 if (!tx)
1589 return DMA_COMPLETE;
1590
1591 while (tx->cookie == -EBUSY) {
1592 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
1593 dev_err(tx->chan->device->dev,
1594 "%s timeout waiting for descriptor submission\n",
1595 __func__);
1596 return DMA_ERROR;
1597 }
1598 cpu_relax();
1599 }
1600 return dma_sync_wait(tx->chan, tx->cookie);
1601}
1602EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
1603
1604
1605
1606
1607
1608
1609
1610
1611void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1612{
1613 struct dma_async_tx_descriptor *dep = txd_next(tx);
1614 struct dma_async_tx_descriptor *dep_next;
1615 struct dma_chan *chan;
1616
1617 if (!dep)
1618 return;
1619
1620
1621 txd_clear_next(tx);
1622 chan = dep->chan;
1623
1624
1625
1626
1627
1628 for (; dep; dep = dep_next) {
1629 txd_lock(dep);
1630 txd_clear_parent(dep);
1631 dep_next = txd_next(dep);
1632 if (dep_next && dep_next->chan == chan)
1633 txd_clear_next(dep);
1634 else
1635 dep_next = NULL;
1636 txd_unlock(dep);
1637
1638 dep->tx_submit(dep);
1639 }
1640
1641 chan->device->device_issue_pending(chan);
1642}
1643EXPORT_SYMBOL_GPL(dma_run_dependencies);
1644
1645static int __init dma_bus_init(void)
1646{
1647 int err = dmaengine_init_unmap_pool();
1648
1649 if (err)
1650 return err;
1651
1652 err = class_register(&dma_devclass);
1653 if (!err)
1654 dmaengine_debugfs_init();
1655
1656 return err;
1657}
1658arch_initcall(dma_bus_init);
1659