1
2
3#include <linux/bitmap.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/interrupt.h>
7#include <linux/irq.h>
8#include <linux/spinlock.h>
9#include <linux/list.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
15#include <linux/idr.h>
16#include <linux/slab.h>
17#include <linux/acpi.h>
18#include <linux/gpio/driver.h>
19#include <linux/gpio/machine.h>
20#include <linux/pinctrl/consumer.h>
21#include <linux/fs.h>
22#include <linux/compat.h>
23#include <linux/file.h>
24#include <uapi/linux/gpio.h>
25
26#include "gpiolib.h"
27#include "gpiolib-of.h"
28#include "gpiolib-acpi.h"
29#include "gpiolib-cdev.h"
30#include "gpiolib-sysfs.h"
31
32#define CREATE_TRACE_POINTS
33#include <trace/events/gpio.h>
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49#ifdef DEBUG
50#define extra_checks 1
51#else
52#define extra_checks 0
53#endif
54
55
56static DEFINE_IDA(gpio_ida);
57static dev_t gpio_devt;
58#define GPIO_DEV_MAX 256
59static struct bus_type gpio_bus_type = {
60 .name = "gpio",
61};
62
63
64
65
66#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
67
68
69
70
71
72DEFINE_SPINLOCK(gpio_lock);
73
74static DEFINE_MUTEX(gpio_lookup_lock);
75static LIST_HEAD(gpio_lookup_list);
76LIST_HEAD(gpio_devices);
77
78static DEFINE_MUTEX(gpio_machine_hogs_mutex);
79static LIST_HEAD(gpio_machine_hogs);
80
81static void gpiochip_free_hogs(struct gpio_chip *gc);
82static int gpiochip_add_irqchip(struct gpio_chip *gc,
83 struct lock_class_key *lock_key,
84 struct lock_class_key *request_key);
85static void gpiochip_irqchip_remove(struct gpio_chip *gc);
86static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
87static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
88static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
89
90static bool gpiolib_initialized;
91
92static inline void desc_set_label(struct gpio_desc *d, const char *label)
93{
94 d->label = label;
95}
96
97
98
99
100
101
102
103
104
105struct gpio_desc *gpio_to_desc(unsigned gpio)
106{
107 struct gpio_device *gdev;
108 unsigned long flags;
109
110 spin_lock_irqsave(&gpio_lock, flags);
111
112 list_for_each_entry(gdev, &gpio_devices, list) {
113 if (gdev->base <= gpio &&
114 gdev->base + gdev->ngpio > gpio) {
115 spin_unlock_irqrestore(&gpio_lock, flags);
116 return &gdev->descs[gpio - gdev->base];
117 }
118 }
119
120 spin_unlock_irqrestore(&gpio_lock, flags);
121
122 if (!gpio_is_valid(gpio))
123 pr_warn("invalid GPIO %d\n", gpio);
124
125 return NULL;
126}
127EXPORT_SYMBOL_GPL(gpio_to_desc);
128
129
130
131
132
133
134
135
136
137
138
139struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
140 unsigned int hwnum)
141{
142 struct gpio_device *gdev = gc->gpiodev;
143
144 if (hwnum >= gdev->ngpio)
145 return ERR_PTR(-EINVAL);
146
147 return &gdev->descs[hwnum];
148}
149EXPORT_SYMBOL_GPL(gpiochip_get_desc);
150
151
152
153
154
155
156
157
158
159
160
161int desc_to_gpio(const struct gpio_desc *desc)
162{
163 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
164}
165EXPORT_SYMBOL_GPL(desc_to_gpio);
166
167
168
169
170
171
172struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
173{
174 if (!desc || !desc->gdev)
175 return NULL;
176 return desc->gdev->chip;
177}
178EXPORT_SYMBOL_GPL(gpiod_to_chip);
179
180
181static int gpiochip_find_base(int ngpio)
182{
183 struct gpio_device *gdev;
184 int base = ARCH_NR_GPIOS - ngpio;
185
186 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
187
188 if (gdev->base + gdev->ngpio <= base)
189 break;
190 else
191
192 base = gdev->base - ngpio;
193 }
194
195 if (gpio_is_valid(base)) {
196 pr_debug("%s: found new base at %d\n", __func__, base);
197 return base;
198 } else {
199 pr_err("%s: cannot find free range\n", __func__);
200 return -ENOSPC;
201 }
202}
203
204
205
206
207
208
209
210
211
212int gpiod_get_direction(struct gpio_desc *desc)
213{
214 struct gpio_chip *gc;
215 unsigned int offset;
216 int ret;
217
218 gc = gpiod_to_chip(desc);
219 offset = gpio_chip_hwgpio(desc);
220
221
222
223
224
225 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
226 test_bit(FLAG_IS_OUT, &desc->flags))
227 return 0;
228
229 if (!gc->get_direction)
230 return -ENOTSUPP;
231
232 ret = gc->get_direction(gc, offset);
233 if (ret < 0)
234 return ret;
235
236
237 if (ret > 0)
238 ret = 1;
239
240 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
241
242 return ret;
243}
244EXPORT_SYMBOL_GPL(gpiod_get_direction);
245
246
247
248
249
250
251
252
253static int gpiodev_add_to_list(struct gpio_device *gdev)
254{
255 struct gpio_device *prev, *next;
256
257 if (list_empty(&gpio_devices)) {
258
259 list_add_tail(&gdev->list, &gpio_devices);
260 return 0;
261 }
262
263 next = list_entry(gpio_devices.next, struct gpio_device, list);
264 if (gdev->base + gdev->ngpio <= next->base) {
265
266 list_add(&gdev->list, &gpio_devices);
267 return 0;
268 }
269
270 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
271 if (prev->base + prev->ngpio <= gdev->base) {
272
273 list_add_tail(&gdev->list, &gpio_devices);
274 return 0;
275 }
276
277 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
278
279 if (&next->list == &gpio_devices)
280 break;
281
282
283 if (prev->base + prev->ngpio <= gdev->base
284 && gdev->base + gdev->ngpio <= next->base) {
285 list_add(&gdev->list, &prev->list);
286 return 0;
287 }
288 }
289
290 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
291 return -EBUSY;
292}
293
294
295
296
297
298
299
300static struct gpio_desc *gpio_name_to_desc(const char * const name)
301{
302 struct gpio_device *gdev;
303 unsigned long flags;
304
305 if (!name)
306 return NULL;
307
308 spin_lock_irqsave(&gpio_lock, flags);
309
310 list_for_each_entry(gdev, &gpio_devices, list) {
311 int i;
312
313 for (i = 0; i != gdev->ngpio; ++i) {
314 struct gpio_desc *desc = &gdev->descs[i];
315
316 if (!desc->name)
317 continue;
318
319 if (!strcmp(desc->name, name)) {
320 spin_unlock_irqrestore(&gpio_lock, flags);
321 return desc;
322 }
323 }
324 }
325
326 spin_unlock_irqrestore(&gpio_lock, flags);
327
328 return NULL;
329}
330
331
332
333
334
335
336
337
338
339static int gpiochip_set_desc_names(struct gpio_chip *gc)
340{
341 struct gpio_device *gdev = gc->gpiodev;
342 int i;
343
344
345 for (i = 0; i != gc->ngpio; ++i) {
346 struct gpio_desc *gpio;
347
348 gpio = gpio_name_to_desc(gc->names[i]);
349 if (gpio)
350 dev_warn(&gdev->dev,
351 "Detected name collision for GPIO name '%s'\n",
352 gc->names[i]);
353 }
354
355
356 for (i = 0; i != gc->ngpio; ++i)
357 gdev->descs[i].name = gc->names[i];
358
359 return 0;
360}
361
362
363
364
365
366
367
368
369
370
371static int devprop_gpiochip_set_names(struct gpio_chip *chip)
372{
373 struct gpio_device *gdev = chip->gpiodev;
374 struct device *dev = chip->parent;
375 const char **names;
376 int ret, i;
377 int count;
378
379
380 if (!dev)
381 return 0;
382
383 count = device_property_string_array_count(dev, "gpio-line-names");
384 if (count < 0)
385 return 0;
386
387 if (count > gdev->ngpio) {
388 dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d",
389 count, gdev->ngpio);
390 count = gdev->ngpio;
391 }
392
393 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
394 if (!names)
395 return -ENOMEM;
396
397 ret = device_property_read_string_array(dev, "gpio-line-names",
398 names, count);
399 if (ret < 0) {
400 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
401 kfree(names);
402 return ret;
403 }
404
405 for (i = 0; i < count; i++)
406 gdev->descs[i].name = names[i];
407
408 kfree(names);
409
410 return 0;
411}
412
413static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
414{
415 unsigned long *p;
416
417 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
418 if (!p)
419 return NULL;
420
421
422 bitmap_fill(p, gc->ngpio);
423
424 return p;
425}
426
427static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
428{
429 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
430 return 0;
431
432 gc->valid_mask = gpiochip_allocate_mask(gc);
433 if (!gc->valid_mask)
434 return -ENOMEM;
435
436 return 0;
437}
438
439static int gpiochip_init_valid_mask(struct gpio_chip *gc)
440{
441 if (gc->init_valid_mask)
442 return gc->init_valid_mask(gc,
443 gc->valid_mask,
444 gc->ngpio);
445
446 return 0;
447}
448
449static void gpiochip_free_valid_mask(struct gpio_chip *gc)
450{
451 bitmap_free(gc->valid_mask);
452 gc->valid_mask = NULL;
453}
454
455static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
456{
457 if (gc->add_pin_ranges)
458 return gc->add_pin_ranges(gc);
459
460 return 0;
461}
462
463bool gpiochip_line_is_valid(const struct gpio_chip *gc,
464 unsigned int offset)
465{
466
467 if (likely(!gc->valid_mask))
468 return true;
469 return test_bit(offset, gc->valid_mask);
470}
471EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
472
473static void gpiodevice_release(struct device *dev)
474{
475 struct gpio_device *gdev = dev_get_drvdata(dev);
476
477 list_del(&gdev->list);
478 ida_free(&gpio_ida, gdev->id);
479 kfree_const(gdev->label);
480 kfree(gdev->descs);
481 kfree(gdev);
482}
483
484#ifdef CONFIG_GPIO_CDEV
485#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
486#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
487#else
488
489
490
491
492#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
493#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
494#endif
495
496static int gpiochip_setup_dev(struct gpio_device *gdev)
497{
498 int ret;
499
500 ret = gcdev_register(gdev, gpio_devt);
501 if (ret)
502 return ret;
503
504 ret = gpiochip_sysfs_register(gdev);
505 if (ret)
506 goto err_remove_device;
507
508
509 gdev->dev.release = gpiodevice_release;
510 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
511 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
512
513 return 0;
514
515err_remove_device:
516 gcdev_unregister(gdev);
517 return ret;
518}
519
520static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
521{
522 struct gpio_desc *desc;
523 int rv;
524
525 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
526 if (IS_ERR(desc)) {
527 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
528 PTR_ERR(desc));
529 return;
530 }
531
532 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
533 return;
534
535 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
536 if (rv)
537 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
538 __func__, gc->label, hog->chip_hwnum, rv);
539}
540
541static void machine_gpiochip_add(struct gpio_chip *gc)
542{
543 struct gpiod_hog *hog;
544
545 mutex_lock(&gpio_machine_hogs_mutex);
546
547 list_for_each_entry(hog, &gpio_machine_hogs, list) {
548 if (!strcmp(gc->label, hog->chip_label))
549 gpiochip_machine_hog(gc, hog);
550 }
551
552 mutex_unlock(&gpio_machine_hogs_mutex);
553}
554
555static void gpiochip_setup_devs(void)
556{
557 struct gpio_device *gdev;
558 int ret;
559
560 list_for_each_entry(gdev, &gpio_devices, list) {
561 ret = gpiochip_setup_dev(gdev);
562 if (ret)
563 dev_err(&gdev->dev,
564 "Failed to initialize gpio device (%d)\n", ret);
565 }
566}
567
568int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
569 struct lock_class_key *lock_key,
570 struct lock_class_key *request_key)
571{
572 unsigned long flags;
573 int ret = 0;
574 unsigned i;
575 int base = gc->base;
576 struct gpio_device *gdev;
577
578
579
580
581
582 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
583 if (!gdev)
584 return -ENOMEM;
585 gdev->dev.bus = &gpio_bus_type;
586 gdev->chip = gc;
587 gc->gpiodev = gdev;
588 if (gc->parent) {
589 gdev->dev.parent = gc->parent;
590 gdev->dev.of_node = gc->parent->of_node;
591 }
592
593#ifdef CONFIG_OF_GPIO
594
595 if (gc->of_node)
596 gdev->dev.of_node = gc->of_node;
597 else
598 gc->of_node = gdev->dev.of_node;
599#endif
600
601 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
602 if (gdev->id < 0) {
603 ret = gdev->id;
604 goto err_free_gdev;
605 }
606
607 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
608 if (ret)
609 goto err_free_ida;
610
611 device_initialize(&gdev->dev);
612 dev_set_drvdata(&gdev->dev, gdev);
613 if (gc->parent && gc->parent->driver)
614 gdev->owner = gc->parent->driver->owner;
615 else if (gc->owner)
616
617 gdev->owner = gc->owner;
618 else
619 gdev->owner = THIS_MODULE;
620
621 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
622 if (!gdev->descs) {
623 ret = -ENOMEM;
624 goto err_free_dev_name;
625 }
626
627 if (gc->ngpio == 0) {
628 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
629 ret = -EINVAL;
630 goto err_free_descs;
631 }
632
633 if (gc->ngpio > FASTPATH_NGPIO)
634 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
635 gc->ngpio, FASTPATH_NGPIO);
636
637 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
638 if (!gdev->label) {
639 ret = -ENOMEM;
640 goto err_free_descs;
641 }
642
643 gdev->ngpio = gc->ngpio;
644 gdev->data = data;
645
646 spin_lock_irqsave(&gpio_lock, flags);
647
648
649
650
651
652
653
654
655 if (base < 0) {
656 base = gpiochip_find_base(gc->ngpio);
657 if (base < 0) {
658 ret = base;
659 spin_unlock_irqrestore(&gpio_lock, flags);
660 goto err_free_label;
661 }
662
663
664
665
666
667
668 gc->base = base;
669 }
670 gdev->base = base;
671
672 ret = gpiodev_add_to_list(gdev);
673 if (ret) {
674 spin_unlock_irqrestore(&gpio_lock, flags);
675 goto err_free_label;
676 }
677
678 for (i = 0; i < gc->ngpio; i++)
679 gdev->descs[i].gdev = gdev;
680
681 spin_unlock_irqrestore(&gpio_lock, flags);
682
683 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
684
685#ifdef CONFIG_PINCTRL
686 INIT_LIST_HEAD(&gdev->pin_ranges);
687#endif
688
689 if (gc->names)
690 ret = gpiochip_set_desc_names(gc);
691 else
692 ret = devprop_gpiochip_set_names(gc);
693 if (ret)
694 goto err_remove_from_list;
695
696 ret = gpiochip_alloc_valid_mask(gc);
697 if (ret)
698 goto err_remove_from_list;
699
700 ret = of_gpiochip_add(gc);
701 if (ret)
702 goto err_free_gpiochip_mask;
703
704 ret = gpiochip_init_valid_mask(gc);
705 if (ret)
706 goto err_remove_of_chip;
707
708 for (i = 0; i < gc->ngpio; i++) {
709 struct gpio_desc *desc = &gdev->descs[i];
710
711 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
712 assign_bit(FLAG_IS_OUT,
713 &desc->flags, !gc->get_direction(gc, i));
714 } else {
715 assign_bit(FLAG_IS_OUT,
716 &desc->flags, !gc->direction_input);
717 }
718 }
719
720 ret = gpiochip_add_pin_ranges(gc);
721 if (ret)
722 goto err_remove_of_chip;
723
724 acpi_gpiochip_add(gc);
725
726 machine_gpiochip_add(gc);
727
728 ret = gpiochip_irqchip_init_valid_mask(gc);
729 if (ret)
730 goto err_remove_acpi_chip;
731
732 ret = gpiochip_irqchip_init_hw(gc);
733 if (ret)
734 goto err_remove_acpi_chip;
735
736 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
737 if (ret)
738 goto err_remove_irqchip_mask;
739
740
741
742
743
744
745
746
747
748 if (gpiolib_initialized) {
749 ret = gpiochip_setup_dev(gdev);
750 if (ret)
751 goto err_remove_irqchip;
752 }
753 return 0;
754
755err_remove_irqchip:
756 gpiochip_irqchip_remove(gc);
757err_remove_irqchip_mask:
758 gpiochip_irqchip_free_valid_mask(gc);
759err_remove_acpi_chip:
760 acpi_gpiochip_remove(gc);
761err_remove_of_chip:
762 gpiochip_free_hogs(gc);
763 of_gpiochip_remove(gc);
764err_free_gpiochip_mask:
765 gpiochip_remove_pin_ranges(gc);
766 gpiochip_free_valid_mask(gc);
767err_remove_from_list:
768 spin_lock_irqsave(&gpio_lock, flags);
769 list_del(&gdev->list);
770 spin_unlock_irqrestore(&gpio_lock, flags);
771err_free_label:
772 kfree_const(gdev->label);
773err_free_descs:
774 kfree(gdev->descs);
775err_free_dev_name:
776 kfree(dev_name(&gdev->dev));
777err_free_ida:
778 ida_free(&gpio_ida, gdev->id);
779err_free_gdev:
780
781 if (ret != -EPROBE_DEFER) {
782 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
783 gdev->base, gdev->base + gdev->ngpio - 1,
784 gc->label ? : "generic", ret);
785 }
786 kfree(gdev);
787 return ret;
788}
789EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
790
791
792
793
794
795
796
797
798void *gpiochip_get_data(struct gpio_chip *gc)
799{
800 return gc->gpiodev->data;
801}
802EXPORT_SYMBOL_GPL(gpiochip_get_data);
803
804
805
806
807
808
809
810void gpiochip_remove(struct gpio_chip *gc)
811{
812 struct gpio_device *gdev = gc->gpiodev;
813 unsigned long flags;
814 unsigned int i;
815
816
817 gpiochip_sysfs_unregister(gdev);
818 gpiochip_free_hogs(gc);
819
820 gdev->chip = NULL;
821 gpiochip_irqchip_remove(gc);
822 acpi_gpiochip_remove(gc);
823 of_gpiochip_remove(gc);
824 gpiochip_remove_pin_ranges(gc);
825 gpiochip_free_valid_mask(gc);
826
827
828
829
830 gdev->data = NULL;
831
832 spin_lock_irqsave(&gpio_lock, flags);
833 for (i = 0; i < gdev->ngpio; i++) {
834 if (gpiochip_is_requested(gc, i))
835 break;
836 }
837 spin_unlock_irqrestore(&gpio_lock, flags);
838
839 if (i != gdev->ngpio)
840 dev_crit(&gdev->dev,
841 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
842
843
844
845
846
847
848
849 gcdev_unregister(gdev);
850 put_device(&gdev->dev);
851}
852EXPORT_SYMBOL_GPL(gpiochip_remove);
853
854
855
856
857
858
859
860
861
862
863
864
865struct gpio_chip *gpiochip_find(void *data,
866 int (*match)(struct gpio_chip *gc,
867 void *data))
868{
869 struct gpio_device *gdev;
870 struct gpio_chip *gc = NULL;
871 unsigned long flags;
872
873 spin_lock_irqsave(&gpio_lock, flags);
874 list_for_each_entry(gdev, &gpio_devices, list)
875 if (gdev->chip && match(gdev->chip, data)) {
876 gc = gdev->chip;
877 break;
878 }
879
880 spin_unlock_irqrestore(&gpio_lock, flags);
881
882 return gc;
883}
884EXPORT_SYMBOL_GPL(gpiochip_find);
885
886static int gpiochip_match_name(struct gpio_chip *gc, void *data)
887{
888 const char *name = data;
889
890 return !strcmp(gc->label, name);
891}
892
893static struct gpio_chip *find_chip_by_name(const char *name)
894{
895 return gpiochip_find((void *)name, gpiochip_match_name);
896}
897
898#ifdef CONFIG_GPIOLIB_IRQCHIP
899
900
901
902
903
904static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
905{
906 struct gpio_irq_chip *girq = &gc->irq;
907
908 if (!girq->init_hw)
909 return 0;
910
911 return girq->init_hw(gc);
912}
913
914static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
915{
916 struct gpio_irq_chip *girq = &gc->irq;
917
918 if (!girq->init_valid_mask)
919 return 0;
920
921 girq->valid_mask = gpiochip_allocate_mask(gc);
922 if (!girq->valid_mask)
923 return -ENOMEM;
924
925 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
926
927 return 0;
928}
929
930static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
931{
932 bitmap_free(gc->irq.valid_mask);
933 gc->irq.valid_mask = NULL;
934}
935
936bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
937 unsigned int offset)
938{
939 if (!gpiochip_line_is_valid(gc, offset))
940 return false;
941
942 if (likely(!gc->irq.valid_mask))
943 return true;
944 return test_bit(offset, gc->irq.valid_mask);
945}
946EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
947
948#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
949
950
951
952
953
954
955
956
957static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
958 struct irq_chip *irqchip)
959{
960
961 if (is_of_node(gc->irq.fwnode))
962 return;
963
964
965
966
967
968
969
970
971
972 if (is_fwnode_irqchip(gc->irq.fwnode)) {
973 int i;
974 int ret;
975
976 for (i = 0; i < gc->ngpio; i++) {
977 struct irq_fwspec fwspec;
978 unsigned int parent_hwirq;
979 unsigned int parent_type;
980 struct gpio_irq_chip *girq = &gc->irq;
981
982
983
984
985
986
987
988 ret = girq->child_to_parent_hwirq(gc, i,
989 IRQ_TYPE_EDGE_RISING,
990 &parent_hwirq,
991 &parent_type);
992 if (ret) {
993 chip_err(gc, "skip set-up on hwirq %d\n",
994 i);
995 continue;
996 }
997
998 fwspec.fwnode = gc->irq.fwnode;
999
1000 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1001
1002 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1003 fwspec.param_count = 2;
1004 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1005
1006 -1,
1007 1,
1008 NUMA_NO_NODE,
1009 &fwspec,
1010 false,
1011 NULL);
1012 if (ret < 0) {
1013 chip_err(gc,
1014 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1015 i, parent_hwirq,
1016 ret);
1017 }
1018 }
1019 }
1020
1021 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1022
1023 return;
1024}
1025
1026static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1027 struct irq_fwspec *fwspec,
1028 unsigned long *hwirq,
1029 unsigned int *type)
1030{
1031
1032 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1033 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1034 }
1035
1036
1037 if (is_fwnode_irqchip(fwspec->fwnode)) {
1038 int ret;
1039
1040 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1041 if (ret)
1042 return ret;
1043 WARN_ON(*type == IRQ_TYPE_NONE);
1044 return 0;
1045 }
1046 return -EINVAL;
1047}
1048
1049static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1050 unsigned int irq,
1051 unsigned int nr_irqs,
1052 void *data)
1053{
1054 struct gpio_chip *gc = d->host_data;
1055 irq_hw_number_t hwirq;
1056 unsigned int type = IRQ_TYPE_NONE;
1057 struct irq_fwspec *fwspec = data;
1058 void *parent_arg;
1059 unsigned int parent_hwirq;
1060 unsigned int parent_type;
1061 struct gpio_irq_chip *girq = &gc->irq;
1062 int ret;
1063
1064
1065
1066
1067
1068 WARN_ON(nr_irqs != 1);
1069
1070 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1071 if (ret)
1072 return ret;
1073
1074 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
1075
1076 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1077 &parent_hwirq, &parent_type);
1078 if (ret) {
1079 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1080 return ret;
1081 }
1082 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
1083
1084
1085
1086
1087
1088 irq_domain_set_info(d,
1089 irq,
1090 hwirq,
1091 gc->irq.chip,
1092 gc,
1093 girq->handler,
1094 NULL, NULL);
1095 irq_set_probe(irq);
1096
1097
1098 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
1099 if (!parent_arg)
1100 return -ENOMEM;
1101
1102 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
1103 irq, parent_hwirq);
1104 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1105 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
1106
1107
1108
1109
1110 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1111 ret = 0;
1112 if (ret)
1113 chip_err(gc,
1114 "failed to allocate parent hwirq %d for hwirq %lu\n",
1115 parent_hwirq, hwirq);
1116
1117 kfree(parent_arg);
1118 return ret;
1119}
1120
1121static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
1122 unsigned int offset)
1123{
1124 return offset;
1125}
1126
1127static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1128{
1129 ops->activate = gpiochip_irq_domain_activate;
1130 ops->deactivate = gpiochip_irq_domain_deactivate;
1131 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1132 ops->free = irq_domain_free_irqs_common;
1133
1134
1135
1136
1137
1138
1139 if (!ops->translate)
1140 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1141}
1142
1143static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1144{
1145 if (!gc->irq.child_to_parent_hwirq ||
1146 !gc->irq.fwnode) {
1147 chip_err(gc, "missing irqdomain vital data\n");
1148 return -EINVAL;
1149 }
1150
1151 if (!gc->irq.child_offset_to_irq)
1152 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1153
1154 if (!gc->irq.populate_parent_alloc_arg)
1155 gc->irq.populate_parent_alloc_arg =
1156 gpiochip_populate_parent_fwspec_twocell;
1157
1158 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1159
1160 gc->irq.domain = irq_domain_create_hierarchy(
1161 gc->irq.parent_domain,
1162 0,
1163 gc->ngpio,
1164 gc->irq.fwnode,
1165 &gc->irq.child_irq_domain_ops,
1166 gc);
1167
1168 if (!gc->irq.domain)
1169 return -ENOMEM;
1170
1171 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1172
1173 return 0;
1174}
1175
1176static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1177{
1178 return !!gc->irq.parent_domain;
1179}
1180
1181void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1182 unsigned int parent_hwirq,
1183 unsigned int parent_type)
1184{
1185 struct irq_fwspec *fwspec;
1186
1187 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1188 if (!fwspec)
1189 return NULL;
1190
1191 fwspec->fwnode = gc->irq.parent_domain->fwnode;
1192 fwspec->param_count = 2;
1193 fwspec->param[0] = parent_hwirq;
1194 fwspec->param[1] = parent_type;
1195
1196 return fwspec;
1197}
1198EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1199
1200void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1201 unsigned int parent_hwirq,
1202 unsigned int parent_type)
1203{
1204 struct irq_fwspec *fwspec;
1205
1206 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1207 if (!fwspec)
1208 return NULL;
1209
1210 fwspec->fwnode = gc->irq.parent_domain->fwnode;
1211 fwspec->param_count = 4;
1212 fwspec->param[0] = 0;
1213 fwspec->param[1] = parent_hwirq;
1214 fwspec->param[2] = 0;
1215 fwspec->param[3] = parent_type;
1216
1217 return fwspec;
1218}
1219EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1220
1221#else
1222
1223static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1224{
1225 return -EINVAL;
1226}
1227
1228static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1229{
1230 return false;
1231}
1232
1233#endif
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1246 irq_hw_number_t hwirq)
1247{
1248 struct gpio_chip *gc = d->host_data;
1249 int ret = 0;
1250
1251 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
1252 return -ENXIO;
1253
1254 irq_set_chip_data(irq, gc);
1255
1256
1257
1258
1259 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1260 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
1261
1262 if (gc->irq.threaded)
1263 irq_set_nested_thread(irq, 1);
1264 irq_set_noprobe(irq);
1265
1266 if (gc->irq.num_parents == 1)
1267 ret = irq_set_parent(irq, gc->irq.parents[0]);
1268 else if (gc->irq.map)
1269 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
1270
1271 if (ret < 0)
1272 return ret;
1273
1274
1275
1276
1277
1278 if (gc->irq.default_type != IRQ_TYPE_NONE)
1279 irq_set_irq_type(irq, gc->irq.default_type);
1280
1281 return 0;
1282}
1283EXPORT_SYMBOL_GPL(gpiochip_irq_map);
1284
1285void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
1286{
1287 struct gpio_chip *gc = d->host_data;
1288
1289 if (gc->irq.threaded)
1290 irq_set_nested_thread(irq, 0);
1291 irq_set_chip_and_handler(irq, NULL, NULL);
1292 irq_set_chip_data(irq, NULL);
1293}
1294EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
1295
1296static const struct irq_domain_ops gpiochip_domain_ops = {
1297 .map = gpiochip_irq_map,
1298 .unmap = gpiochip_irq_unmap,
1299
1300 .xlate = irq_domain_xlate_twocell,
1301};
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318int gpiochip_irq_domain_activate(struct irq_domain *domain,
1319 struct irq_data *data, bool reserve)
1320{
1321 struct gpio_chip *gc = domain->host_data;
1322
1323 return gpiochip_lock_as_irq(gc, data->hwirq);
1324}
1325EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1337 struct irq_data *data)
1338{
1339 struct gpio_chip *gc = domain->host_data;
1340
1341 return gpiochip_unlock_as_irq(gc, data->hwirq);
1342}
1343EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1344
1345static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
1346{
1347 struct irq_domain *domain = gc->irq.domain;
1348
1349 if (!gpiochip_irqchip_irq_valid(gc, offset))
1350 return -ENXIO;
1351
1352#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1353 if (irq_domain_is_hierarchy(domain)) {
1354 struct irq_fwspec spec;
1355
1356 spec.fwnode = domain->fwnode;
1357 spec.param_count = 2;
1358 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
1359 spec.param[1] = IRQ_TYPE_NONE;
1360
1361 return irq_create_fwspec_mapping(&spec);
1362 }
1363#endif
1364
1365 return irq_create_mapping(domain, offset);
1366}
1367
1368static int gpiochip_irq_reqres(struct irq_data *d)
1369{
1370 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1371
1372 return gpiochip_reqres_irq(gc, d->hwirq);
1373}
1374
1375static void gpiochip_irq_relres(struct irq_data *d)
1376{
1377 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1378
1379 gpiochip_relres_irq(gc, d->hwirq);
1380}
1381
1382static void gpiochip_irq_mask(struct irq_data *d)
1383{
1384 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1385
1386 if (gc->irq.irq_mask)
1387 gc->irq.irq_mask(d);
1388 gpiochip_disable_irq(gc, d->hwirq);
1389}
1390
1391static void gpiochip_irq_unmask(struct irq_data *d)
1392{
1393 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1394
1395 gpiochip_enable_irq(gc, d->hwirq);
1396 if (gc->irq.irq_unmask)
1397 gc->irq.irq_unmask(d);
1398}
1399
1400static void gpiochip_irq_enable(struct irq_data *d)
1401{
1402 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1403
1404 gpiochip_enable_irq(gc, d->hwirq);
1405 gc->irq.irq_enable(d);
1406}
1407
1408static void gpiochip_irq_disable(struct irq_data *d)
1409{
1410 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1411
1412 gc->irq.irq_disable(d);
1413 gpiochip_disable_irq(gc, d->hwirq);
1414}
1415
1416static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
1417{
1418 struct irq_chip *irqchip = gc->irq.chip;
1419
1420 if (!irqchip->irq_request_resources &&
1421 !irqchip->irq_release_resources) {
1422 irqchip->irq_request_resources = gpiochip_irq_reqres;
1423 irqchip->irq_release_resources = gpiochip_irq_relres;
1424 }
1425 if (WARN_ON(gc->irq.irq_enable))
1426 return;
1427
1428 if (irqchip->irq_enable == gpiochip_irq_enable ||
1429 irqchip->irq_mask == gpiochip_irq_mask) {
1430
1431
1432
1433
1434 chip_info(gc,
1435 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1436 return;
1437 }
1438
1439 if (irqchip->irq_disable) {
1440 gc->irq.irq_disable = irqchip->irq_disable;
1441 irqchip->irq_disable = gpiochip_irq_disable;
1442 } else {
1443 gc->irq.irq_mask = irqchip->irq_mask;
1444 irqchip->irq_mask = gpiochip_irq_mask;
1445 }
1446
1447 if (irqchip->irq_enable) {
1448 gc->irq.irq_enable = irqchip->irq_enable;
1449 irqchip->irq_enable = gpiochip_irq_enable;
1450 } else {
1451 gc->irq.irq_unmask = irqchip->irq_unmask;
1452 irqchip->irq_unmask = gpiochip_irq_unmask;
1453 }
1454}
1455
1456
1457
1458
1459
1460
1461
1462static int gpiochip_add_irqchip(struct gpio_chip *gc,
1463 struct lock_class_key *lock_key,
1464 struct lock_class_key *request_key)
1465{
1466 struct irq_chip *irqchip = gc->irq.chip;
1467 const struct irq_domain_ops *ops = NULL;
1468 struct device_node *np;
1469 unsigned int type;
1470 unsigned int i;
1471
1472 if (!irqchip)
1473 return 0;
1474
1475 if (gc->irq.parent_handler && gc->can_sleep) {
1476 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
1477 return -EINVAL;
1478 }
1479
1480 np = gc->gpiodev->dev.of_node;
1481 type = gc->irq.default_type;
1482
1483
1484
1485
1486
1487
1488 if (WARN(np && type != IRQ_TYPE_NONE,
1489 "%s: Ignoring %u default trigger\n", np->full_name, type))
1490 type = IRQ_TYPE_NONE;
1491
1492 if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
1493 acpi_handle_warn(ACPI_HANDLE(gc->parent),
1494 "Ignoring %u default trigger\n", type);
1495 type = IRQ_TYPE_NONE;
1496 }
1497
1498 if (gc->to_irq)
1499 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1500
1501 gc->to_irq = gpiochip_to_irq;
1502 gc->irq.default_type = type;
1503 gc->irq.lock_key = lock_key;
1504 gc->irq.request_key = request_key;
1505
1506
1507 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1508 int ret = gpiochip_hierarchy_add_domain(gc);
1509 if (ret)
1510 return ret;
1511 } else {
1512
1513 if (gc->irq.domain_ops)
1514 ops = gc->irq.domain_ops;
1515
1516 if (!ops)
1517 ops = &gpiochip_domain_ops;
1518 gc->irq.domain = irq_domain_add_simple(np,
1519 gc->ngpio,
1520 gc->irq.first,
1521 ops, gc);
1522 if (!gc->irq.domain)
1523 return -EINVAL;
1524 }
1525
1526 if (gc->irq.parent_handler) {
1527 void *data = gc->irq.parent_handler_data ?: gc;
1528
1529 for (i = 0; i < gc->irq.num_parents; i++) {
1530
1531
1532
1533
1534
1535 irq_set_chained_handler_and_data(gc->irq.parents[i],
1536 gc->irq.parent_handler,
1537 data);
1538 }
1539 }
1540
1541 gpiochip_set_irq_hooks(gc);
1542
1543 acpi_gpiochip_request_interrupts(gc);
1544
1545 return 0;
1546}
1547
1548
1549
1550
1551
1552
1553
1554static void gpiochip_irqchip_remove(struct gpio_chip *gc)
1555{
1556 struct irq_chip *irqchip = gc->irq.chip;
1557 unsigned int offset;
1558
1559 acpi_gpiochip_free_interrupts(gc);
1560
1561 if (irqchip && gc->irq.parent_handler) {
1562 struct gpio_irq_chip *irq = &gc->irq;
1563 unsigned int i;
1564
1565 for (i = 0; i < irq->num_parents; i++)
1566 irq_set_chained_handler_and_data(irq->parents[i],
1567 NULL, NULL);
1568 }
1569
1570
1571 if (gc->irq.domain) {
1572 unsigned int irq;
1573
1574 for (offset = 0; offset < gc->ngpio; offset++) {
1575 if (!gpiochip_irqchip_irq_valid(gc, offset))
1576 continue;
1577
1578 irq = irq_find_mapping(gc->irq.domain, offset);
1579 irq_dispose_mapping(irq);
1580 }
1581
1582 irq_domain_remove(gc->irq.domain);
1583 }
1584
1585 if (irqchip) {
1586 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1587 irqchip->irq_request_resources = NULL;
1588 irqchip->irq_release_resources = NULL;
1589 }
1590 if (irqchip->irq_enable == gpiochip_irq_enable) {
1591 irqchip->irq_enable = gc->irq.irq_enable;
1592 irqchip->irq_disable = gc->irq.irq_disable;
1593 }
1594 }
1595 gc->irq.irq_enable = NULL;
1596 gc->irq.irq_disable = NULL;
1597 gc->irq.chip = NULL;
1598
1599 gpiochip_irqchip_free_valid_mask(gc);
1600}
1601
1602
1603
1604
1605
1606
1607
1608
1609int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1610 struct irq_domain *domain)
1611{
1612 if (!domain)
1613 return -EINVAL;
1614
1615 gc->to_irq = gpiochip_to_irq;
1616 gc->irq.domain = domain;
1617
1618 return 0;
1619}
1620EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1621
1622#else
1623
1624static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
1625 struct lock_class_key *lock_key,
1626 struct lock_class_key *request_key)
1627{
1628 return 0;
1629}
1630static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
1631
1632static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1633{
1634 return 0;
1635}
1636
1637static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
1638{
1639 return 0;
1640}
1641static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
1642{ }
1643
1644#endif
1645
1646
1647
1648
1649
1650
1651int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
1652{
1653#ifdef CONFIG_PINCTRL
1654 if (list_empty(&gc->gpiodev->pin_ranges))
1655 return 0;
1656#endif
1657
1658 return pinctrl_gpio_request(gc->gpiodev->base + offset);
1659}
1660EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1661
1662
1663
1664
1665
1666
1667void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
1668{
1669#ifdef CONFIG_PINCTRL
1670 if (list_empty(&gc->gpiodev->pin_ranges))
1671 return;
1672#endif
1673
1674 pinctrl_gpio_free(gc->gpiodev->base + offset);
1675}
1676EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1677
1678
1679
1680
1681
1682
1683
1684int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
1685 unsigned long config)
1686{
1687 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
1688}
1689EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1690
1691#ifdef CONFIG_PINCTRL
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705int gpiochip_add_pingroup_range(struct gpio_chip *gc,
1706 struct pinctrl_dev *pctldev,
1707 unsigned int gpio_offset, const char *pin_group)
1708{
1709 struct gpio_pin_range *pin_range;
1710 struct gpio_device *gdev = gc->gpiodev;
1711 int ret;
1712
1713 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1714 if (!pin_range) {
1715 chip_err(gc, "failed to allocate pin ranges\n");
1716 return -ENOMEM;
1717 }
1718
1719
1720 pin_range->range.id = gpio_offset;
1721 pin_range->range.gc = gc;
1722 pin_range->range.name = gc->label;
1723 pin_range->range.base = gdev->base + gpio_offset;
1724 pin_range->pctldev = pctldev;
1725
1726 ret = pinctrl_get_group_pins(pctldev, pin_group,
1727 &pin_range->range.pins,
1728 &pin_range->range.npins);
1729 if (ret < 0) {
1730 kfree(pin_range);
1731 return ret;
1732 }
1733
1734 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1735
1736 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1737 gpio_offset, gpio_offset + pin_range->range.npins - 1,
1738 pinctrl_dev_get_devname(pctldev), pin_group);
1739
1740 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1741
1742 return 0;
1743}
1744EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
1764 unsigned int gpio_offset, unsigned int pin_offset,
1765 unsigned int npins)
1766{
1767 struct gpio_pin_range *pin_range;
1768 struct gpio_device *gdev = gc->gpiodev;
1769 int ret;
1770
1771 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1772 if (!pin_range) {
1773 chip_err(gc, "failed to allocate pin ranges\n");
1774 return -ENOMEM;
1775 }
1776
1777
1778 pin_range->range.id = gpio_offset;
1779 pin_range->range.gc = gc;
1780 pin_range->range.name = gc->label;
1781 pin_range->range.base = gdev->base + gpio_offset;
1782 pin_range->range.pin_base = pin_offset;
1783 pin_range->range.npins = npins;
1784 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
1785 &pin_range->range);
1786 if (IS_ERR(pin_range->pctldev)) {
1787 ret = PTR_ERR(pin_range->pctldev);
1788 chip_err(gc, "could not create pin range\n");
1789 kfree(pin_range);
1790 return ret;
1791 }
1792 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1793 gpio_offset, gpio_offset + npins - 1,
1794 pinctl_name,
1795 pin_offset, pin_offset + npins - 1);
1796
1797 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1798
1799 return 0;
1800}
1801EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
1802
1803
1804
1805
1806
1807void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
1808{
1809 struct gpio_pin_range *pin_range, *tmp;
1810 struct gpio_device *gdev = gc->gpiodev;
1811
1812 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
1813 list_del(&pin_range->node);
1814 pinctrl_remove_gpio_range(pin_range->pctldev,
1815 &pin_range->range);
1816 kfree(pin_range);
1817 }
1818}
1819EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1820
1821#endif
1822
1823
1824
1825
1826
1827static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
1828{
1829 struct gpio_chip *gc = desc->gdev->chip;
1830 int ret;
1831 unsigned long flags;
1832 unsigned offset;
1833
1834 if (label) {
1835 label = kstrdup_const(label, GFP_KERNEL);
1836 if (!label)
1837 return -ENOMEM;
1838 }
1839
1840 spin_lock_irqsave(&gpio_lock, flags);
1841
1842
1843
1844
1845
1846 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1847 desc_set_label(desc, label ? : "?");
1848 } else {
1849 ret = -EBUSY;
1850 goto out_free_unlock;
1851 }
1852
1853 if (gc->request) {
1854
1855 spin_unlock_irqrestore(&gpio_lock, flags);
1856 offset = gpio_chip_hwgpio(desc);
1857 if (gpiochip_line_is_valid(gc, offset))
1858 ret = gc->request(gc, offset);
1859 else
1860 ret = -EINVAL;
1861 spin_lock_irqsave(&gpio_lock, flags);
1862
1863 if (ret) {
1864 desc_set_label(desc, NULL);
1865 clear_bit(FLAG_REQUESTED, &desc->flags);
1866 goto out_free_unlock;
1867 }
1868 }
1869 if (gc->get_direction) {
1870
1871 spin_unlock_irqrestore(&gpio_lock, flags);
1872 gpiod_get_direction(desc);
1873 spin_lock_irqsave(&gpio_lock, flags);
1874 }
1875 spin_unlock_irqrestore(&gpio_lock, flags);
1876 return 0;
1877
1878out_free_unlock:
1879 spin_unlock_irqrestore(&gpio_lock, flags);
1880 kfree_const(label);
1881 return ret;
1882}
1883
1884
1885
1886
1887
1888
1889
1890static int validate_desc(const struct gpio_desc *desc, const char *func)
1891{
1892 if (!desc)
1893 return 0;
1894 if (IS_ERR(desc)) {
1895 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1896 return PTR_ERR(desc);
1897 }
1898 if (!desc->gdev) {
1899 pr_warn("%s: invalid GPIO (no device)\n", func);
1900 return -EINVAL;
1901 }
1902 if (!desc->gdev->chip) {
1903 dev_warn(&desc->gdev->dev,
1904 "%s: backing chip is gone\n", func);
1905 return 0;
1906 }
1907 return 1;
1908}
1909
1910#define VALIDATE_DESC(desc) do { \
1911 int __valid = validate_desc(desc, __func__); \
1912 if (__valid <= 0) \
1913 return __valid; \
1914 } while (0)
1915
1916#define VALIDATE_DESC_VOID(desc) do { \
1917 int __valid = validate_desc(desc, __func__); \
1918 if (__valid <= 0) \
1919 return; \
1920 } while (0)
1921
1922int gpiod_request(struct gpio_desc *desc, const char *label)
1923{
1924 int ret = -EPROBE_DEFER;
1925 struct gpio_device *gdev;
1926
1927 VALIDATE_DESC(desc);
1928 gdev = desc->gdev;
1929
1930 if (try_module_get(gdev->owner)) {
1931 ret = gpiod_request_commit(desc, label);
1932 if (ret)
1933 module_put(gdev->owner);
1934 else
1935 get_device(&gdev->dev);
1936 }
1937
1938 if (ret)
1939 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
1940
1941 return ret;
1942}
1943
1944static bool gpiod_free_commit(struct gpio_desc *desc)
1945{
1946 bool ret = false;
1947 unsigned long flags;
1948 struct gpio_chip *gc;
1949
1950 might_sleep();
1951
1952 gpiod_unexport(desc);
1953
1954 spin_lock_irqsave(&gpio_lock, flags);
1955
1956 gc = desc->gdev->chip;
1957 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
1958 if (gc->free) {
1959 spin_unlock_irqrestore(&gpio_lock, flags);
1960 might_sleep_if(gc->can_sleep);
1961 gc->free(gc, gpio_chip_hwgpio(desc));
1962 spin_lock_irqsave(&gpio_lock, flags);
1963 }
1964 kfree_const(desc->label);
1965 desc_set_label(desc, NULL);
1966 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
1967 clear_bit(FLAG_REQUESTED, &desc->flags);
1968 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
1969 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
1970 clear_bit(FLAG_PULL_UP, &desc->flags);
1971 clear_bit(FLAG_PULL_DOWN, &desc->flags);
1972 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
1973 clear_bit(FLAG_EDGE_RISING, &desc->flags);
1974 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
1975 clear_bit(FLAG_IS_HOGGED, &desc->flags);
1976#ifdef CONFIG_OF_DYNAMIC
1977 desc->hog = NULL;
1978#endif
1979#ifdef CONFIG_GPIO_CDEV
1980 WRITE_ONCE(desc->debounce_period_us, 0);
1981#endif
1982 ret = true;
1983 }
1984
1985 spin_unlock_irqrestore(&gpio_lock, flags);
1986 blocking_notifier_call_chain(&desc->gdev->notifier,
1987 GPIOLINE_CHANGED_RELEASED, desc);
1988
1989 return ret;
1990}
1991
1992void gpiod_free(struct gpio_desc *desc)
1993{
1994 if (desc && desc->gdev && gpiod_free_commit(desc)) {
1995 module_put(desc->gdev->owner);
1996 put_device(&desc->gdev->dev);
1997 } else {
1998 WARN_ON(extra_checks);
1999 }
2000}
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
2016{
2017 struct gpio_desc *desc;
2018
2019 if (offset >= gc->ngpio)
2020 return NULL;
2021
2022 desc = gpiochip_get_desc(gc, offset);
2023 if (IS_ERR(desc))
2024 return NULL;
2025
2026 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
2027 return NULL;
2028 return desc->label;
2029}
2030EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
2054 unsigned int hwnum,
2055 const char *label,
2056 enum gpio_lookup_flags lflags,
2057 enum gpiod_flags dflags)
2058{
2059 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
2060 int ret;
2061
2062 if (IS_ERR(desc)) {
2063 chip_err(gc, "failed to get GPIO descriptor\n");
2064 return desc;
2065 }
2066
2067 ret = gpiod_request_commit(desc, label);
2068 if (ret < 0)
2069 return ERR_PTR(ret);
2070
2071 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2072 if (ret) {
2073 chip_err(gc, "setup of own GPIO %s failed\n", label);
2074 gpiod_free_commit(desc);
2075 return ERR_PTR(ret);
2076 }
2077
2078 return desc;
2079}
2080EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
2081
2082
2083
2084
2085
2086
2087
2088
2089void gpiochip_free_own_desc(struct gpio_desc *desc)
2090{
2091 if (desc)
2092 gpiod_free_commit(desc);
2093}
2094EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
2107 unsigned long config)
2108{
2109 if (!gc->set_config)
2110 return -ENOTSUPP;
2111
2112 return gc->set_config(gc, offset, config);
2113}
2114
2115static int gpio_set_config_with_argument(struct gpio_desc *desc,
2116 enum pin_config_param mode,
2117 u32 argument)
2118{
2119 struct gpio_chip *gc = desc->gdev->chip;
2120 unsigned long config;
2121
2122 config = pinconf_to_config_packed(mode, argument);
2123 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2124}
2125
2126static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2127 enum pin_config_param mode,
2128 u32 argument)
2129{
2130 struct device *dev = &desc->gdev->dev;
2131 int gpio = gpio_chip_hwgpio(desc);
2132 int ret;
2133
2134 ret = gpio_set_config_with_argument(desc, mode, argument);
2135 if (ret != -ENOTSUPP)
2136 return ret;
2137
2138 switch (mode) {
2139 case PIN_CONFIG_PERSIST_STATE:
2140 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
2141 break;
2142 default:
2143 break;
2144 }
2145
2146 return 0;
2147}
2148
2149static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2150{
2151 return gpio_set_config_with_argument(desc, mode, 0);
2152}
2153
2154static int gpio_set_bias(struct gpio_desc *desc)
2155{
2156 enum pin_config_param bias;
2157 unsigned int arg;
2158
2159 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2160 bias = PIN_CONFIG_BIAS_DISABLE;
2161 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2162 bias = PIN_CONFIG_BIAS_PULL_UP;
2163 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2164 bias = PIN_CONFIG_BIAS_PULL_DOWN;
2165 else
2166 return 0;
2167
2168 switch (bias) {
2169 case PIN_CONFIG_BIAS_PULL_DOWN:
2170 case PIN_CONFIG_BIAS_PULL_UP:
2171 arg = 1;
2172 break;
2173
2174 default:
2175 arg = 0;
2176 break;
2177 }
2178
2179 return gpio_set_config_with_argument_optional(desc, bias, arg);
2180}
2181
2182int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2183{
2184 return gpio_set_config_with_argument_optional(desc,
2185 PIN_CONFIG_INPUT_DEBOUNCE,
2186 debounce);
2187}
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198int gpiod_direction_input(struct gpio_desc *desc)
2199{
2200 struct gpio_chip *gc;
2201 int ret = 0;
2202
2203 VALIDATE_DESC(desc);
2204 gc = desc->gdev->chip;
2205
2206
2207
2208
2209
2210
2211 if (!gc->get && gc->direction_input) {
2212 gpiod_warn(desc,
2213 "%s: missing get() but have direction_input()\n",
2214 __func__);
2215 return -EIO;
2216 }
2217
2218
2219
2220
2221
2222
2223
2224 if (gc->direction_input) {
2225 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2226 } else if (gc->get_direction &&
2227 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
2228 gpiod_warn(desc,
2229 "%s: missing direction_input() operation and line is output\n",
2230 __func__);
2231 return -EIO;
2232 }
2233 if (ret == 0) {
2234 clear_bit(FLAG_IS_OUT, &desc->flags);
2235 ret = gpio_set_bias(desc);
2236 }
2237
2238 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
2239
2240 return ret;
2241}
2242EXPORT_SYMBOL_GPL(gpiod_direction_input);
2243
2244static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
2245{
2246 struct gpio_chip *gc = desc->gdev->chip;
2247 int val = !!value;
2248 int ret = 0;
2249
2250
2251
2252
2253
2254
2255 if (!gc->set && !gc->direction_output) {
2256 gpiod_warn(desc,
2257 "%s: missing set() and direction_output() operations\n",
2258 __func__);
2259 return -EIO;
2260 }
2261
2262 if (gc->direction_output) {
2263 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2264 } else {
2265
2266 if (gc->get_direction &&
2267 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2268 gpiod_warn(desc,
2269 "%s: missing direction_output() operation\n",
2270 __func__);
2271 return -EIO;
2272 }
2273
2274
2275
2276
2277 gc->set(gc, gpio_chip_hwgpio(desc), val);
2278 }
2279
2280 if (!ret)
2281 set_bit(FLAG_IS_OUT, &desc->flags);
2282 trace_gpio_value(desc_to_gpio(desc), 0, val);
2283 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2284 return ret;
2285}
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2299{
2300 VALIDATE_DESC(desc);
2301 return gpiod_direction_output_raw_commit(desc, value);
2302}
2303EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317int gpiod_direction_output(struct gpio_desc *desc, int value)
2318{
2319 int ret;
2320
2321 VALIDATE_DESC(desc);
2322 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2323 value = !value;
2324 else
2325 value = !!value;
2326
2327
2328 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2329 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
2330 gpiod_err(desc,
2331 "%s: tried to set a GPIO tied to an IRQ as output\n",
2332 __func__);
2333 return -EIO;
2334 }
2335
2336 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2337
2338 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
2339 if (!ret)
2340 goto set_output_value;
2341
2342 if (value) {
2343 ret = gpiod_direction_input(desc);
2344 goto set_output_flag;
2345 }
2346 }
2347 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
2348 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
2349 if (!ret)
2350 goto set_output_value;
2351
2352 if (!value) {
2353 ret = gpiod_direction_input(desc);
2354 goto set_output_flag;
2355 }
2356 } else {
2357 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
2358 }
2359
2360set_output_value:
2361 ret = gpio_set_bias(desc);
2362 if (ret)
2363 return ret;
2364 return gpiod_direction_output_raw_commit(desc, value);
2365
2366set_output_flag:
2367
2368
2369
2370
2371
2372
2373 if (ret == 0)
2374 set_bit(FLAG_IS_OUT, &desc->flags);
2375 return ret;
2376}
2377EXPORT_SYMBOL_GPL(gpiod_direction_output);
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2389{
2390 struct gpio_chip *gc;
2391
2392 VALIDATE_DESC(desc);
2393 gc = desc->gdev->chip;
2394
2395 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2396}
2397EXPORT_SYMBOL_GPL(gpiod_set_config);
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
2409{
2410 unsigned long config;
2411
2412 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
2413 return gpiod_set_config(desc, config);
2414}
2415EXPORT_SYMBOL_GPL(gpiod_set_debounce);
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2426{
2427 VALIDATE_DESC(desc);
2428
2429
2430
2431
2432 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
2433
2434
2435 return gpio_set_config_with_argument_optional(desc,
2436 PIN_CONFIG_PERSIST_STATE,
2437 !transitory);
2438}
2439EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2440
2441
2442
2443
2444
2445
2446
2447int gpiod_is_active_low(const struct gpio_desc *desc)
2448{
2449 VALIDATE_DESC(desc);
2450 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
2451}
2452EXPORT_SYMBOL_GPL(gpiod_is_active_low);
2453
2454
2455
2456
2457
2458void gpiod_toggle_active_low(struct gpio_desc *desc)
2459{
2460 VALIDATE_DESC_VOID(desc);
2461 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2462}
2463EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
2488{
2489 struct gpio_chip *gc;
2490 int offset;
2491 int value;
2492
2493 gc = desc->gdev->chip;
2494 offset = gpio_chip_hwgpio(desc);
2495 value = gc->get ? gc->get(gc, offset) : -EIO;
2496 value = value < 0 ? value : !!value;
2497 trace_gpio_value(desc_to_gpio(desc), 1, value);
2498 return value;
2499}
2500
2501static int gpio_chip_get_multiple(struct gpio_chip *gc,
2502 unsigned long *mask, unsigned long *bits)
2503{
2504 if (gc->get_multiple) {
2505 return gc->get_multiple(gc, mask, bits);
2506 } else if (gc->get) {
2507 int i, value;
2508
2509 for_each_set_bit(i, mask, gc->ngpio) {
2510 value = gc->get(gc, i);
2511 if (value < 0)
2512 return value;
2513 __assign_bit(i, bits, value);
2514 }
2515 return 0;
2516 }
2517 return -EIO;
2518}
2519
2520int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2521 unsigned int array_size,
2522 struct gpio_desc **desc_array,
2523 struct gpio_array *array_info,
2524 unsigned long *value_bitmap)
2525{
2526 int ret, i = 0;
2527
2528
2529
2530
2531
2532
2533 if (array_info && array_info->desc == desc_array &&
2534 array_size <= array_info->size &&
2535 (void *)array_info == desc_array + array_info->size) {
2536 if (!can_sleep)
2537 WARN_ON(array_info->chip->can_sleep);
2538
2539 ret = gpio_chip_get_multiple(array_info->chip,
2540 array_info->get_mask,
2541 value_bitmap);
2542 if (ret)
2543 return ret;
2544
2545 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2546 bitmap_xor(value_bitmap, value_bitmap,
2547 array_info->invert_mask, array_size);
2548
2549 i = find_first_zero_bit(array_info->get_mask, array_size);
2550 if (i == array_size)
2551 return 0;
2552 } else {
2553 array_info = NULL;
2554 }
2555
2556 while (i < array_size) {
2557 struct gpio_chip *gc = desc_array[i]->gdev->chip;
2558 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
2559 unsigned long *mask, *bits;
2560 int first, j;
2561
2562 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
2563 mask = fastpath;
2564 } else {
2565 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
2566 sizeof(*mask),
2567 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
2568 if (!mask)
2569 return -ENOMEM;
2570 }
2571
2572 bits = mask + BITS_TO_LONGS(gc->ngpio);
2573 bitmap_zero(mask, gc->ngpio);
2574
2575 if (!can_sleep)
2576 WARN_ON(gc->can_sleep);
2577
2578
2579 first = i;
2580 do {
2581 const struct gpio_desc *desc = desc_array[i];
2582 int hwgpio = gpio_chip_hwgpio(desc);
2583
2584 __set_bit(hwgpio, mask);
2585 i++;
2586
2587 if (array_info)
2588 i = find_next_zero_bit(array_info->get_mask,
2589 array_size, i);
2590 } while ((i < array_size) &&
2591 (desc_array[i]->gdev->chip == gc));
2592
2593 ret = gpio_chip_get_multiple(gc, mask, bits);
2594 if (ret) {
2595 if (mask != fastpath)
2596 kfree(mask);
2597 return ret;
2598 }
2599
2600 for (j = first; j < i; ) {
2601 const struct gpio_desc *desc = desc_array[j];
2602 int hwgpio = gpio_chip_hwgpio(desc);
2603 int value = test_bit(hwgpio, bits);
2604
2605 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2606 value = !value;
2607 __assign_bit(j, value_bitmap, value);
2608 trace_gpio_value(desc_to_gpio(desc), 1, value);
2609 j++;
2610
2611 if (array_info)
2612 j = find_next_zero_bit(array_info->get_mask, i,
2613 j);
2614 }
2615
2616 if (mask != fastpath)
2617 kfree(mask);
2618 }
2619 return 0;
2620}
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632int gpiod_get_raw_value(const struct gpio_desc *desc)
2633{
2634 VALIDATE_DESC(desc);
2635
2636 WARN_ON(desc->gdev->chip->can_sleep);
2637 return gpiod_get_raw_value_commit(desc);
2638}
2639EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651int gpiod_get_value(const struct gpio_desc *desc)
2652{
2653 int value;
2654
2655 VALIDATE_DESC(desc);
2656
2657 WARN_ON(desc->gdev->chip->can_sleep);
2658
2659 value = gpiod_get_raw_value_commit(desc);
2660 if (value < 0)
2661 return value;
2662
2663 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2664 value = !value;
2665
2666 return value;
2667}
2668EXPORT_SYMBOL_GPL(gpiod_get_value);
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684int gpiod_get_raw_array_value(unsigned int array_size,
2685 struct gpio_desc **desc_array,
2686 struct gpio_array *array_info,
2687 unsigned long *value_bitmap)
2688{
2689 if (!desc_array)
2690 return -EINVAL;
2691 return gpiod_get_array_value_complex(true, false, array_size,
2692 desc_array, array_info,
2693 value_bitmap);
2694}
2695EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710int gpiod_get_array_value(unsigned int array_size,
2711 struct gpio_desc **desc_array,
2712 struct gpio_array *array_info,
2713 unsigned long *value_bitmap)
2714{
2715 if (!desc_array)
2716 return -EINVAL;
2717 return gpiod_get_array_value_complex(false, false, array_size,
2718 desc_array, array_info,
2719 value_bitmap);
2720}
2721EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2722
2723
2724
2725
2726
2727
2728static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
2729{
2730 int ret = 0;
2731 struct gpio_chip *gc = desc->gdev->chip;
2732 int offset = gpio_chip_hwgpio(desc);
2733
2734 if (value) {
2735 ret = gc->direction_input(gc, offset);
2736 } else {
2737 ret = gc->direction_output(gc, offset, 0);
2738 if (!ret)
2739 set_bit(FLAG_IS_OUT, &desc->flags);
2740 }
2741 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2742 if (ret < 0)
2743 gpiod_err(desc,
2744 "%s: Error in set_value for open drain err %d\n",
2745 __func__, ret);
2746}
2747
2748
2749
2750
2751
2752
2753static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
2754{
2755 int ret = 0;
2756 struct gpio_chip *gc = desc->gdev->chip;
2757 int offset = gpio_chip_hwgpio(desc);
2758
2759 if (value) {
2760 ret = gc->direction_output(gc, offset, 1);
2761 if (!ret)
2762 set_bit(FLAG_IS_OUT, &desc->flags);
2763 } else {
2764 ret = gc->direction_input(gc, offset);
2765 }
2766 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2767 if (ret < 0)
2768 gpiod_err(desc,
2769 "%s: Error in set_value for open source err %d\n",
2770 __func__, ret);
2771}
2772
2773static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
2774{
2775 struct gpio_chip *gc;
2776
2777 gc = desc->gdev->chip;
2778 trace_gpio_value(desc_to_gpio(desc), 0, value);
2779 gc->set(gc, gpio_chip_hwgpio(desc), value);
2780}
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792static void gpio_chip_set_multiple(struct gpio_chip *gc,
2793 unsigned long *mask, unsigned long *bits)
2794{
2795 if (gc->set_multiple) {
2796 gc->set_multiple(gc, mask, bits);
2797 } else {
2798 unsigned int i;
2799
2800
2801 for_each_set_bit(i, mask, gc->ngpio)
2802 gc->set(gc, i, test_bit(i, bits));
2803 }
2804}
2805
2806int gpiod_set_array_value_complex(bool raw, bool can_sleep,
2807 unsigned int array_size,
2808 struct gpio_desc **desc_array,
2809 struct gpio_array *array_info,
2810 unsigned long *value_bitmap)
2811{
2812 int i = 0;
2813
2814
2815
2816
2817
2818
2819 if (array_info && array_info->desc == desc_array &&
2820 array_size <= array_info->size &&
2821 (void *)array_info == desc_array + array_info->size) {
2822 if (!can_sleep)
2823 WARN_ON(array_info->chip->can_sleep);
2824
2825 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2826 bitmap_xor(value_bitmap, value_bitmap,
2827 array_info->invert_mask, array_size);
2828
2829 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2830 value_bitmap);
2831
2832 i = find_first_zero_bit(array_info->set_mask, array_size);
2833 if (i == array_size)
2834 return 0;
2835 } else {
2836 array_info = NULL;
2837 }
2838
2839 while (i < array_size) {
2840 struct gpio_chip *gc = desc_array[i]->gdev->chip;
2841 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
2842 unsigned long *mask, *bits;
2843 int count = 0;
2844
2845 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
2846 mask = fastpath;
2847 } else {
2848 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
2849 sizeof(*mask),
2850 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
2851 if (!mask)
2852 return -ENOMEM;
2853 }
2854
2855 bits = mask + BITS_TO_LONGS(gc->ngpio);
2856 bitmap_zero(mask, gc->ngpio);
2857
2858 if (!can_sleep)
2859 WARN_ON(gc->can_sleep);
2860
2861 do {
2862 struct gpio_desc *desc = desc_array[i];
2863 int hwgpio = gpio_chip_hwgpio(desc);
2864 int value = test_bit(i, value_bitmap);
2865
2866
2867
2868
2869
2870
2871 if (!raw && !(array_info &&
2872 test_bit(i, array_info->invert_mask)) &&
2873 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2874 value = !value;
2875 trace_gpio_value(desc_to_gpio(desc), 0, value);
2876
2877
2878
2879
2880 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
2881 gpio_set_open_drain_value_commit(desc, value);
2882 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
2883 gpio_set_open_source_value_commit(desc, value);
2884 } else {
2885 __set_bit(hwgpio, mask);
2886 __assign_bit(hwgpio, bits, value);
2887 count++;
2888 }
2889 i++;
2890
2891 if (array_info)
2892 i = find_next_zero_bit(array_info->set_mask,
2893 array_size, i);
2894 } while ((i < array_size) &&
2895 (desc_array[i]->gdev->chip == gc));
2896
2897 if (count != 0)
2898 gpio_chip_set_multiple(gc, mask, bits);
2899
2900 if (mask != fastpath)
2901 kfree(mask);
2902 }
2903 return 0;
2904}
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917void gpiod_set_raw_value(struct gpio_desc *desc, int value)
2918{
2919 VALIDATE_DESC_VOID(desc);
2920
2921 WARN_ON(desc->gdev->chip->can_sleep);
2922 gpiod_set_raw_value_commit(desc, value);
2923}
2924EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
2936{
2937 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2938 value = !value;
2939 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2940 gpio_set_open_drain_value_commit(desc, value);
2941 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2942 gpio_set_open_source_value_commit(desc, value);
2943 else
2944 gpiod_set_raw_value_commit(desc, value);
2945}
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958void gpiod_set_value(struct gpio_desc *desc, int value)
2959{
2960 VALIDATE_DESC_VOID(desc);
2961
2962 WARN_ON(desc->gdev->chip->can_sleep);
2963 gpiod_set_value_nocheck(desc, value);
2964}
2965EXPORT_SYMBOL_GPL(gpiod_set_value);
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980int gpiod_set_raw_array_value(unsigned int array_size,
2981 struct gpio_desc **desc_array,
2982 struct gpio_array *array_info,
2983 unsigned long *value_bitmap)
2984{
2985 if (!desc_array)
2986 return -EINVAL;
2987 return gpiod_set_array_value_complex(true, false, array_size,
2988 desc_array, array_info, value_bitmap);
2989}
2990EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005int gpiod_set_array_value(unsigned int array_size,
3006 struct gpio_desc **desc_array,
3007 struct gpio_array *array_info,
3008 unsigned long *value_bitmap)
3009{
3010 if (!desc_array)
3011 return -EINVAL;
3012 return gpiod_set_array_value_complex(false, false, array_size,
3013 desc_array, array_info,
3014 value_bitmap);
3015}
3016EXPORT_SYMBOL_GPL(gpiod_set_array_value);
3017
3018
3019
3020
3021
3022
3023int gpiod_cansleep(const struct gpio_desc *desc)
3024{
3025 VALIDATE_DESC(desc);
3026 return desc->gdev->chip->can_sleep;
3027}
3028EXPORT_SYMBOL_GPL(gpiod_cansleep);
3029
3030
3031
3032
3033
3034
3035int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
3036{
3037 VALIDATE_DESC(desc);
3038 if (name) {
3039 name = kstrdup_const(name, GFP_KERNEL);
3040 if (!name)
3041 return -ENOMEM;
3042 }
3043
3044 kfree_const(desc->label);
3045 desc_set_label(desc, name);
3046
3047 return 0;
3048}
3049EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3050
3051
3052
3053
3054
3055
3056
3057
3058int gpiod_to_irq(const struct gpio_desc *desc)
3059{
3060 struct gpio_chip *gc;
3061 int offset;
3062
3063
3064
3065
3066
3067
3068 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
3069 return -EINVAL;
3070
3071 gc = desc->gdev->chip;
3072 offset = gpio_chip_hwgpio(desc);
3073 if (gc->to_irq) {
3074 int retirq = gc->to_irq(gc, offset);
3075
3076
3077 if (!retirq)
3078 return -ENXIO;
3079
3080 return retirq;
3081 }
3082 return -ENXIO;
3083}
3084EXPORT_SYMBOL_GPL(gpiod_to_irq);
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
3095{
3096 struct gpio_desc *desc;
3097
3098 desc = gpiochip_get_desc(gc, offset);
3099 if (IS_ERR(desc))
3100 return PTR_ERR(desc);
3101
3102
3103
3104
3105
3106 if (!gc->can_sleep && gc->get_direction) {
3107 int dir = gpiod_get_direction(desc);
3108
3109 if (dir < 0) {
3110 chip_err(gc, "%s: cannot get GPIO direction\n",
3111 __func__);
3112 return dir;
3113 }
3114 }
3115
3116
3117 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3118 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3119 chip_err(gc,
3120 "%s: tried to flag a GPIO set as output for IRQ\n",
3121 __func__);
3122 return -EIO;
3123 }
3124
3125 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
3126 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3127
3128
3129
3130
3131
3132
3133 if (!desc->label)
3134 desc_set_label(desc, "interrupt");
3135
3136 return 0;
3137}
3138EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
3149{
3150 struct gpio_desc *desc;
3151
3152 desc = gpiochip_get_desc(gc, offset);
3153 if (IS_ERR(desc))
3154 return;
3155
3156 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
3157 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3158
3159
3160 if (desc->label && !strcmp(desc->label, "interrupt"))
3161 desc_set_label(desc, NULL);
3162}
3163EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
3164
3165void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
3166{
3167 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
3168
3169 if (!IS_ERR(desc) &&
3170 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3171 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3172}
3173EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3174
3175void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
3176{
3177 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
3178
3179 if (!IS_ERR(desc) &&
3180 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
3181
3182
3183
3184
3185 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3186 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
3187 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3188 }
3189}
3190EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3191
3192bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
3193{
3194 if (offset >= gc->ngpio)
3195 return false;
3196
3197 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
3198}
3199EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3200
3201int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
3202{
3203 int ret;
3204
3205 if (!try_module_get(gc->gpiodev->owner))
3206 return -ENODEV;
3207
3208 ret = gpiochip_lock_as_irq(gc, offset);
3209 if (ret) {
3210 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3211 module_put(gc->gpiodev->owner);
3212 return ret;
3213 }
3214 return 0;
3215}
3216EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3217
3218void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
3219{
3220 gpiochip_unlock_as_irq(gc, offset);
3221 module_put(gc->gpiodev->owner);
3222}
3223EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3224
3225bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
3226{
3227 if (offset >= gc->ngpio)
3228 return false;
3229
3230 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
3231}
3232EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3233
3234bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
3235{
3236 if (offset >= gc->ngpio)
3237 return false;
3238
3239 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
3240}
3241EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3242
3243bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
3244{
3245 if (offset >= gc->ngpio)
3246 return false;
3247
3248 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
3249}
3250EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
3262{
3263 might_sleep_if(extra_checks);
3264 VALIDATE_DESC(desc);
3265 return gpiod_get_raw_value_commit(desc);
3266}
3267EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278int gpiod_get_value_cansleep(const struct gpio_desc *desc)
3279{
3280 int value;
3281
3282 might_sleep_if(extra_checks);
3283 VALIDATE_DESC(desc);
3284 value = gpiod_get_raw_value_commit(desc);
3285 if (value < 0)
3286 return value;
3287
3288 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3289 value = !value;
3290
3291 return value;
3292}
3293EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3309 struct gpio_desc **desc_array,
3310 struct gpio_array *array_info,
3311 unsigned long *value_bitmap)
3312{
3313 might_sleep_if(extra_checks);
3314 if (!desc_array)
3315 return -EINVAL;
3316 return gpiod_get_array_value_complex(true, true, array_size,
3317 desc_array, array_info,
3318 value_bitmap);
3319}
3320EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334int gpiod_get_array_value_cansleep(unsigned int array_size,
3335 struct gpio_desc **desc_array,
3336 struct gpio_array *array_info,
3337 unsigned long *value_bitmap)
3338{
3339 might_sleep_if(extra_checks);
3340 if (!desc_array)
3341 return -EINVAL;
3342 return gpiod_get_array_value_complex(false, true, array_size,
3343 desc_array, array_info,
3344 value_bitmap);
3345}
3346EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
3359{
3360 might_sleep_if(extra_checks);
3361 VALIDATE_DESC_VOID(desc);
3362 gpiod_set_raw_value_commit(desc, value);
3363}
3364EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
3377{
3378 might_sleep_if(extra_checks);
3379 VALIDATE_DESC_VOID(desc);
3380 gpiod_set_value_nocheck(desc, value);
3381}
3382EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3397 struct gpio_desc **desc_array,
3398 struct gpio_array *array_info,
3399 unsigned long *value_bitmap)
3400{
3401 might_sleep_if(extra_checks);
3402 if (!desc_array)
3403 return -EINVAL;
3404 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
3405 array_info, value_bitmap);
3406}
3407EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
3408
3409
3410
3411
3412
3413
3414void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3415{
3416 unsigned int i;
3417
3418 mutex_lock(&gpio_lookup_lock);
3419
3420 for (i = 0; i < n; i++)
3421 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3422
3423 mutex_unlock(&gpio_lookup_lock);
3424}
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438int gpiod_set_array_value_cansleep(unsigned int array_size,
3439 struct gpio_desc **desc_array,
3440 struct gpio_array *array_info,
3441 unsigned long *value_bitmap)
3442{
3443 might_sleep_if(extra_checks);
3444 if (!desc_array)
3445 return -EINVAL;
3446 return gpiod_set_array_value_complex(false, true, array_size,
3447 desc_array, array_info,
3448 value_bitmap);
3449}
3450EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
3451
3452
3453
3454
3455
3456void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
3457{
3458 mutex_lock(&gpio_lookup_lock);
3459
3460 list_add_tail(&table->list, &gpio_lookup_list);
3461
3462 mutex_unlock(&gpio_lookup_lock);
3463}
3464EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
3465
3466
3467
3468
3469
3470void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3471{
3472 mutex_lock(&gpio_lookup_lock);
3473
3474 list_del(&table->list);
3475
3476 mutex_unlock(&gpio_lookup_lock);
3477}
3478EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
3479
3480
3481
3482
3483
3484void gpiod_add_hogs(struct gpiod_hog *hogs)
3485{
3486 struct gpio_chip *gc;
3487 struct gpiod_hog *hog;
3488
3489 mutex_lock(&gpio_machine_hogs_mutex);
3490
3491 for (hog = &hogs[0]; hog->chip_label; hog++) {
3492 list_add_tail(&hog->list, &gpio_machine_hogs);
3493
3494
3495
3496
3497
3498 gc = find_chip_by_name(hog->chip_label);
3499 if (gc)
3500 gpiochip_machine_hog(gc, hog);
3501 }
3502
3503 mutex_unlock(&gpio_machine_hogs_mutex);
3504}
3505EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3506
3507static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
3508{
3509 const char *dev_id = dev ? dev_name(dev) : NULL;
3510 struct gpiod_lookup_table *table;
3511
3512 mutex_lock(&gpio_lookup_lock);
3513
3514 list_for_each_entry(table, &gpio_lookup_list, list) {
3515 if (table->dev_id && dev_id) {
3516
3517
3518
3519
3520 if (!strcmp(table->dev_id, dev_id))
3521 goto found;
3522 } else {
3523
3524
3525
3526
3527 if (dev_id == table->dev_id)
3528 goto found;
3529 }
3530 }
3531 table = NULL;
3532
3533found:
3534 mutex_unlock(&gpio_lookup_lock);
3535 return table;
3536}
3537
3538static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
3539 unsigned int idx, unsigned long *flags)
3540{
3541 struct gpio_desc *desc = ERR_PTR(-ENOENT);
3542 struct gpiod_lookup_table *table;
3543 struct gpiod_lookup *p;
3544
3545 table = gpiod_find_lookup_table(dev);
3546 if (!table)
3547 return desc;
3548
3549 for (p = &table->table[0]; p->key; p++) {
3550 struct gpio_chip *gc;
3551
3552
3553 if (p->idx != idx)
3554 continue;
3555
3556
3557 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3558 continue;
3559
3560 if (p->chip_hwnum == U16_MAX) {
3561 desc = gpio_name_to_desc(p->key);
3562 if (desc) {
3563 *flags = p->flags;
3564 return desc;
3565 }
3566
3567 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3568 p->key);
3569 return ERR_PTR(-EPROBE_DEFER);
3570 }
3571
3572 gc = find_chip_by_name(p->key);
3573
3574 if (!gc) {
3575
3576
3577
3578
3579
3580
3581
3582 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
3583 p->key);
3584 return ERR_PTR(-EPROBE_DEFER);
3585 }
3586
3587 if (gc->ngpio <= p->chip_hwnum) {
3588 dev_err(dev,
3589 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
3590 idx, p->chip_hwnum, gc->ngpio - 1,
3591 gc->label);
3592 return ERR_PTR(-EINVAL);
3593 }
3594
3595 desc = gpiochip_get_desc(gc, p->chip_hwnum);
3596 *flags = p->flags;
3597
3598 return desc;
3599 }
3600
3601 return desc;
3602}
3603
3604static int platform_gpio_count(struct device *dev, const char *con_id)
3605{
3606 struct gpiod_lookup_table *table;
3607 struct gpiod_lookup *p;
3608 unsigned int count = 0;
3609
3610 table = gpiod_find_lookup_table(dev);
3611 if (!table)
3612 return -ENOENT;
3613
3614 for (p = &table->table[0]; p->key; p++) {
3615 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3616 (!con_id && !p->con_id))
3617 count++;
3618 }
3619 if (!count)
3620 return -ENOENT;
3621
3622 return count;
3623}
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3647 const char *con_id, int index,
3648 enum gpiod_flags flags,
3649 const char *label)
3650{
3651 struct gpio_desc *desc;
3652 char prop_name[32];
3653 unsigned int i;
3654
3655 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3656 if (con_id)
3657 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3658 con_id, gpio_suffixes[i]);
3659 else
3660 snprintf(prop_name, sizeof(prop_name), "%s",
3661 gpio_suffixes[i]);
3662
3663 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3664 label);
3665 if (!gpiod_not_found(desc))
3666 break;
3667 }
3668
3669 return desc;
3670}
3671EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3672
3673
3674
3675
3676
3677
3678
3679int gpiod_count(struct device *dev, const char *con_id)
3680{
3681 int count = -ENOENT;
3682
3683 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
3684 count = of_gpio_get_count(dev, con_id);
3685 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
3686 count = acpi_gpio_count(dev, con_id);
3687
3688 if (count < 0)
3689 count = platform_gpio_count(dev, con_id);
3690
3691 return count;
3692}
3693EXPORT_SYMBOL_GPL(gpiod_count);
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
3706 enum gpiod_flags flags)
3707{
3708 return gpiod_get_index(dev, con_id, 0, flags);
3709}
3710EXPORT_SYMBOL_GPL(gpiod_get);
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
3723 const char *con_id,
3724 enum gpiod_flags flags)
3725{
3726 return gpiod_get_index_optional(dev, con_id, 0, flags);
3727}
3728EXPORT_SYMBOL_GPL(gpiod_get_optional);
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
3744 unsigned long lflags, enum gpiod_flags dflags)
3745{
3746 int ret;
3747
3748 if (lflags & GPIO_ACTIVE_LOW)
3749 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
3750
3751 if (lflags & GPIO_OPEN_DRAIN)
3752 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3753 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3754
3755
3756
3757
3758
3759
3760 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3761 gpiod_warn(desc,
3762 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3763 }
3764
3765 if (lflags & GPIO_OPEN_SOURCE)
3766 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
3767
3768 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3769 gpiod_err(desc,
3770 "both pull-up and pull-down enabled, invalid configuration\n");
3771 return -EINVAL;
3772 }
3773
3774 if (lflags & GPIO_PULL_UP)
3775 set_bit(FLAG_PULL_UP, &desc->flags);
3776 else if (lflags & GPIO_PULL_DOWN)
3777 set_bit(FLAG_PULL_DOWN, &desc->flags);
3778
3779 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3780 if (ret < 0)
3781 return ret;
3782
3783
3784 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
3785 gpiod_dbg(desc, "no flags found for %s\n", con_id);
3786 return 0;
3787 }
3788
3789
3790 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
3791 ret = gpiod_direction_output(desc,
3792 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
3793 else
3794 ret = gpiod_direction_input(desc);
3795
3796 return ret;
3797}
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
3814 const char *con_id,
3815 unsigned int idx,
3816 enum gpiod_flags flags)
3817{
3818 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
3819 struct gpio_desc *desc = NULL;
3820 int ret;
3821
3822 const char *devname = dev ? dev_name(dev) : "?";
3823
3824 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
3825
3826 if (dev) {
3827
3828 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
3829 dev_dbg(dev, "using device tree for GPIO lookup\n");
3830 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
3831 } else if (ACPI_COMPANION(dev)) {
3832 dev_dbg(dev, "using ACPI for GPIO lookup\n");
3833 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
3834 }
3835 }
3836
3837
3838
3839
3840
3841 if (!desc || gpiod_not_found(desc)) {
3842 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
3843 desc = gpiod_find(dev, con_id, idx, &lookupflags);
3844 }
3845
3846 if (IS_ERR(desc)) {
3847 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
3848 return desc;
3849 }
3850
3851
3852
3853
3854
3855 ret = gpiod_request(desc, con_id ? con_id : devname);
3856 if (ret) {
3857 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
3858
3859
3860
3861
3862
3863
3864
3865
3866 dev_info(dev, "nonexclusive access to GPIO for %s\n",
3867 con_id ? con_id : devname);
3868 return desc;
3869 } else {
3870 return ERR_PTR(ret);
3871 }
3872 }
3873
3874 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
3875 if (ret < 0) {
3876 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
3877 gpiod_put(desc);
3878 return ERR_PTR(ret);
3879 }
3880
3881 blocking_notifier_call_chain(&desc->gdev->notifier,
3882 GPIOLINE_CHANGED_REQUESTED, desc);
3883
3884 return desc;
3885}
3886EXPORT_SYMBOL_GPL(gpiod_get_index);
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
3910 const char *propname, int index,
3911 enum gpiod_flags dflags,
3912 const char *label)
3913{
3914 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
3915 struct gpio_desc *desc = ERR_PTR(-ENODEV);
3916 int ret;
3917
3918 if (!fwnode)
3919 return ERR_PTR(-EINVAL);
3920
3921 if (is_of_node(fwnode)) {
3922 desc = gpiod_get_from_of_node(to_of_node(fwnode),
3923 propname, index,
3924 dflags,
3925 label);
3926 return desc;
3927 } else if (is_acpi_node(fwnode)) {
3928 struct acpi_gpio_info info;
3929
3930 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
3931 if (IS_ERR(desc))
3932 return desc;
3933
3934 acpi_gpio_update_gpiod_flags(&dflags, &info);
3935 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
3936 }
3937
3938
3939 ret = gpiod_request(desc, label);
3940 if (ret)
3941 return ERR_PTR(ret);
3942
3943 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
3944 if (ret < 0) {
3945 gpiod_put(desc);
3946 return ERR_PTR(ret);
3947 }
3948
3949 blocking_notifier_call_chain(&desc->gdev->notifier,
3950 GPIOLINE_CHANGED_REQUESTED, desc);
3951
3952 return desc;
3953}
3954EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
3969 const char *con_id,
3970 unsigned int index,
3971 enum gpiod_flags flags)
3972{
3973 struct gpio_desc *desc;
3974
3975 desc = gpiod_get_index(dev, con_id, index, flags);
3976 if (gpiod_not_found(desc))
3977 return NULL;
3978
3979 return desc;
3980}
3981EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991int gpiod_hog(struct gpio_desc *desc, const char *name,
3992 unsigned long lflags, enum gpiod_flags dflags)
3993{
3994 struct gpio_chip *gc;
3995 struct gpio_desc *local_desc;
3996 int hwnum;
3997 int ret;
3998
3999 gc = gpiod_to_chip(desc);
4000 hwnum = gpio_chip_hwgpio(desc);
4001
4002 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
4003 lflags, dflags);
4004 if (IS_ERR(local_desc)) {
4005 ret = PTR_ERR(local_desc);
4006 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
4007 name, gc->label, hwnum, ret);
4008 return ret;
4009 }
4010
4011
4012 set_bit(FLAG_IS_HOGGED, &desc->flags);
4013
4014 gpiod_info(desc, "hogged as %s%s\n",
4015 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4016 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4017 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
4018
4019 return 0;
4020}
4021
4022
4023
4024
4025
4026static void gpiochip_free_hogs(struct gpio_chip *gc)
4027{
4028 int id;
4029
4030 for (id = 0; id < gc->ngpio; id++) {
4031 if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags))
4032 gpiochip_free_own_desc(&gc->gpiodev->descs[id]);
4033 }
4034}
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4049 const char *con_id,
4050 enum gpiod_flags flags)
4051{
4052 struct gpio_desc *desc;
4053 struct gpio_descs *descs;
4054 struct gpio_array *array_info = NULL;
4055 struct gpio_chip *gc;
4056 int count, bitmap_size;
4057
4058 count = gpiod_count(dev, con_id);
4059 if (count < 0)
4060 return ERR_PTR(count);
4061
4062 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
4063 if (!descs)
4064 return ERR_PTR(-ENOMEM);
4065
4066 for (descs->ndescs = 0; descs->ndescs < count; ) {
4067 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4068 if (IS_ERR(desc)) {
4069 gpiod_put_array(descs);
4070 return ERR_CAST(desc);
4071 }
4072
4073 descs->desc[descs->ndescs] = desc;
4074
4075 gc = gpiod_to_chip(desc);
4076
4077
4078
4079
4080 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
4081 struct gpio_descs *array;
4082
4083 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4084 gc->ngpio : count);
4085
4086 array = kzalloc(struct_size(descs, desc, count) +
4087 struct_size(array_info, invert_mask,
4088 3 * bitmap_size), GFP_KERNEL);
4089 if (!array) {
4090 gpiod_put_array(descs);
4091 return ERR_PTR(-ENOMEM);
4092 }
4093
4094 memcpy(array, descs,
4095 struct_size(descs, desc, descs->ndescs + 1));
4096 kfree(descs);
4097
4098 descs = array;
4099 array_info = (void *)(descs->desc + count);
4100 array_info->get_mask = array_info->invert_mask +
4101 bitmap_size;
4102 array_info->set_mask = array_info->get_mask +
4103 bitmap_size;
4104
4105 array_info->desc = descs->desc;
4106 array_info->size = count;
4107 array_info->chip = gc;
4108 bitmap_set(array_info->get_mask, descs->ndescs,
4109 count - descs->ndescs);
4110 bitmap_set(array_info->set_mask, descs->ndescs,
4111 count - descs->ndescs);
4112 descs->info = array_info;
4113 }
4114
4115 if (array_info && array_info->chip != gc) {
4116 __clear_bit(descs->ndescs, array_info->get_mask);
4117 __clear_bit(descs->ndescs, array_info->set_mask);
4118 }
4119
4120
4121
4122
4123 else if (array_info &&
4124 gpio_chip_hwgpio(desc) != descs->ndescs) {
4125
4126
4127
4128
4129
4130 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4131 array_info = NULL;
4132 } else {
4133 __clear_bit(descs->ndescs,
4134 array_info->get_mask);
4135 __clear_bit(descs->ndescs,
4136 array_info->set_mask);
4137 }
4138 } else if (array_info) {
4139
4140 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4141 gpiochip_line_is_open_source(gc, descs->ndescs))
4142 __clear_bit(descs->ndescs,
4143 array_info->set_mask);
4144
4145 if (gpiod_is_active_low(desc))
4146 __set_bit(descs->ndescs,
4147 array_info->invert_mask);
4148 }
4149
4150 descs->ndescs++;
4151 }
4152 if (array_info)
4153 dev_dbg(dev,
4154 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4155 array_info->chip->label, array_info->size,
4156 *array_info->get_mask, *array_info->set_mask,
4157 *array_info->invert_mask);
4158 return descs;
4159}
4160EXPORT_SYMBOL_GPL(gpiod_get_array);
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4173 const char *con_id,
4174 enum gpiod_flags flags)
4175{
4176 struct gpio_descs *descs;
4177
4178 descs = gpiod_get_array(dev, con_id, flags);
4179 if (gpiod_not_found(descs))
4180 return NULL;
4181
4182 return descs;
4183}
4184EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4185
4186
4187
4188
4189
4190
4191
4192void gpiod_put(struct gpio_desc *desc)
4193{
4194 if (desc)
4195 gpiod_free(desc);
4196}
4197EXPORT_SYMBOL_GPL(gpiod_put);
4198
4199
4200
4201
4202
4203void gpiod_put_array(struct gpio_descs *descs)
4204{
4205 unsigned int i;
4206
4207 for (i = 0; i < descs->ndescs; i++)
4208 gpiod_put(descs->desc[i]);
4209
4210 kfree(descs);
4211}
4212EXPORT_SYMBOL_GPL(gpiod_put_array);
4213
4214static int __init gpiolib_dev_init(void)
4215{
4216 int ret;
4217
4218
4219 ret = bus_register(&gpio_bus_type);
4220 if (ret < 0) {
4221 pr_err("gpiolib: could not register GPIO bus type\n");
4222 return ret;
4223 }
4224
4225 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
4226 if (ret < 0) {
4227 pr_err("gpiolib: failed to allocate char dev region\n");
4228 bus_unregister(&gpio_bus_type);
4229 return ret;
4230 }
4231
4232 gpiolib_initialized = true;
4233 gpiochip_setup_devs();
4234
4235#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4236 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4237#endif
4238
4239 return ret;
4240}
4241core_initcall(gpiolib_dev_init);
4242
4243#ifdef CONFIG_DEBUG_FS
4244
4245static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
4246{
4247 unsigned i;
4248 struct gpio_chip *gc = gdev->chip;
4249 unsigned gpio = gdev->base;
4250 struct gpio_desc *gdesc = &gdev->descs[0];
4251 bool is_out;
4252 bool is_irq;
4253 bool active_low;
4254
4255 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
4256 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4257 if (gdesc->name) {
4258 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4259 gpio, gdesc->name);
4260 }
4261 continue;
4262 }
4263
4264 gpiod_get_direction(gdesc);
4265 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
4266 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
4267 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4268 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
4269 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
4270 is_out ? "out" : "in ",
4271 gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
4272 is_irq ? "IRQ " : "",
4273 active_low ? "ACTIVE LOW" : "");
4274 seq_printf(s, "\n");
4275 }
4276}
4277
4278static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
4279{
4280 unsigned long flags;
4281 struct gpio_device *gdev = NULL;
4282 loff_t index = *pos;
4283
4284 s->private = "";
4285
4286 spin_lock_irqsave(&gpio_lock, flags);
4287 list_for_each_entry(gdev, &gpio_devices, list)
4288 if (index-- == 0) {
4289 spin_unlock_irqrestore(&gpio_lock, flags);
4290 return gdev;
4291 }
4292 spin_unlock_irqrestore(&gpio_lock, flags);
4293
4294 return NULL;
4295}
4296
4297static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4298{
4299 unsigned long flags;
4300 struct gpio_device *gdev = v;
4301 void *ret = NULL;
4302
4303 spin_lock_irqsave(&gpio_lock, flags);
4304 if (list_is_last(&gdev->list, &gpio_devices))
4305 ret = NULL;
4306 else
4307 ret = list_entry(gdev->list.next, struct gpio_device, list);
4308 spin_unlock_irqrestore(&gpio_lock, flags);
4309
4310 s->private = "\n";
4311 ++*pos;
4312
4313 return ret;
4314}
4315
4316static void gpiolib_seq_stop(struct seq_file *s, void *v)
4317{
4318}
4319
4320static int gpiolib_seq_show(struct seq_file *s, void *v)
4321{
4322 struct gpio_device *gdev = v;
4323 struct gpio_chip *gc = gdev->chip;
4324 struct device *parent;
4325
4326 if (!gc) {
4327 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4328 dev_name(&gdev->dev));
4329 return 0;
4330 }
4331
4332 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4333 dev_name(&gdev->dev),
4334 gdev->base, gdev->base + gdev->ngpio - 1);
4335 parent = gc->parent;
4336 if (parent)
4337 seq_printf(s, ", parent: %s/%s",
4338 parent->bus ? parent->bus->name : "no-bus",
4339 dev_name(parent));
4340 if (gc->label)
4341 seq_printf(s, ", %s", gc->label);
4342 if (gc->can_sleep)
4343 seq_printf(s, ", can sleep");
4344 seq_printf(s, ":\n");
4345
4346 if (gc->dbg_show)
4347 gc->dbg_show(s, gc);
4348 else
4349 gpiolib_dbg_show(s, gdev);
4350
4351 return 0;
4352}
4353
4354static const struct seq_operations gpiolib_sops = {
4355 .start = gpiolib_seq_start,
4356 .next = gpiolib_seq_next,
4357 .stop = gpiolib_seq_stop,
4358 .show = gpiolib_seq_show,
4359};
4360DEFINE_SEQ_ATTRIBUTE(gpiolib);
4361
4362static int __init gpiolib_debugfs_init(void)
4363{
4364
4365 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
4366 return 0;
4367}
4368subsys_initcall(gpiolib_debugfs_init);
4369
4370#endif
4371