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16#include <linux/module.h>
17#include <linux/i2c.h>
18#include <linux/interrupt.h>
19#include <linux/delay.h>
20#include <linux/of_device.h>
21#include <linux/of.h>
22#include <linux/bitops.h>
23#include <linux/regulator/consumer.h>
24#include <linux/slab.h>
25#include <linux/string.h>
26#include <linux/iio/iio.h>
27#include <linux/iio/sysfs.h>
28#include <linux/iio/buffer.h>
29#include <linux/iio/trigger.h>
30#include <linux/iio/trigger_consumer.h>
31#include <linux/iio/triggered_buffer.h>
32
33#define BMA180_DRV_NAME "bma180"
34#define BMA180_IRQ_NAME "bma180_event"
35
36enum chip_ids {
37 BMA023,
38 BMA150,
39 BMA180,
40 BMA250,
41 BMA254,
42};
43
44struct bma180_data;
45
46struct bma180_part_info {
47 u8 chip_id;
48 const struct iio_chan_spec *channels;
49 unsigned int num_channels;
50 const int *scale_table;
51 unsigned int num_scales;
52 const int *bw_table;
53 unsigned int num_bw;
54 int temp_offset;
55
56 u8 int_reset_reg, int_reset_mask;
57 u8 sleep_reg, sleep_mask;
58 u8 bw_reg, bw_mask;
59 u8 scale_reg, scale_mask;
60 u8 power_reg, power_mask, lowpower_val;
61 u8 int_enable_reg, int_enable_mask;
62 u8 int_map_reg, int_enable_dataready_int1_mask;
63 u8 softreset_reg, softreset_val;
64
65 int (*chip_config)(struct bma180_data *data);
66 void (*chip_disable)(struct bma180_data *data);
67};
68
69
70#define BMA023_CTRL_REG0 0x0a
71#define BMA023_CTRL_REG1 0x0b
72#define BMA023_CTRL_REG2 0x14
73#define BMA023_CTRL_REG3 0x15
74
75#define BMA023_RANGE_MASK GENMASK(4, 3)
76#define BMA023_BW_MASK GENMASK(2, 0)
77#define BMA023_SLEEP BIT(0)
78#define BMA023_INT_RESET_MASK BIT(6)
79#define BMA023_NEW_DATA_INT BIT(5)
80#define BMA023_RESET_VAL BIT(1)
81
82#define BMA180_CHIP_ID 0x00
83#define BMA180_ACC_X_LSB 0x02
84#define BMA180_TEMP 0x08
85#define BMA180_CTRL_REG0 0x0d
86#define BMA180_RESET 0x10
87#define BMA180_BW_TCS 0x20
88#define BMA180_CTRL_REG3 0x21
89#define BMA180_TCO_Z 0x30
90#define BMA180_OFFSET_LSB1 0x35
91
92
93#define BMA180_DIS_WAKE_UP BIT(0)
94#define BMA180_SLEEP BIT(1)
95#define BMA180_EE_W BIT(4)
96#define BMA180_RESET_INT BIT(6)
97
98
99#define BMA180_NEW_DATA_INT BIT(1)
100
101
102#define BMA180_SMP_SKIP BIT(0)
103
104
105#define BMA180_RANGE 0x0e
106#define BMA180_BW 0xf0
107#define BMA180_MODE_CONFIG 0x03
108
109
110#define BMA180_RESET_VAL 0xb6
111
112#define BMA023_ID_REG_VAL 0x02
113#define BMA180_ID_REG_VAL 0x03
114#define BMA250_ID_REG_VAL 0x03
115#define BMA254_ID_REG_VAL 0xfa
116
117
118#define BMA180_LOW_POWER 0x03
119
120#define BMA250_RANGE_REG 0x0f
121#define BMA250_BW_REG 0x10
122#define BMA250_POWER_REG 0x11
123#define BMA250_RESET_REG 0x14
124#define BMA250_INT_ENABLE_REG 0x17
125#define BMA250_INT_MAP_REG 0x1a
126#define BMA250_INT_RESET_REG 0x21
127
128#define BMA250_RANGE_MASK GENMASK(3, 0)
129#define BMA250_BW_MASK GENMASK(4, 0)
130#define BMA250_SUSPEND_MASK BIT(7)
131#define BMA250_LOWPOWER_MASK BIT(6)
132#define BMA250_DATA_INTEN_MASK BIT(4)
133#define BMA250_INT1_DATA_MASK BIT(0)
134#define BMA250_INT_RESET_MASK BIT(7)
135
136#define BMA254_RANGE_REG 0x0f
137#define BMA254_BW_REG 0x10
138#define BMA254_POWER_REG 0x11
139#define BMA254_RESET_REG 0x14
140#define BMA254_INT_ENABLE_REG 0x17
141#define BMA254_INT_MAP_REG 0x1a
142#define BMA254_INT_RESET_REG 0x21
143
144#define BMA254_RANGE_MASK GENMASK(3, 0)
145#define BMA254_BW_MASK GENMASK(4, 0)
146#define BMA254_SUSPEND_MASK BIT(7)
147#define BMA254_LOWPOWER_MASK BIT(6)
148#define BMA254_DATA_INTEN_MASK BIT(4)
149#define BMA254_INT2_DATA_MASK BIT(7)
150#define BMA254_INT1_DATA_MASK BIT(0)
151#define BMA254_INT_RESET_MASK BIT(7)
152
153struct bma180_data {
154 struct regulator *vdd_supply;
155 struct regulator *vddio_supply;
156 struct i2c_client *client;
157 struct iio_trigger *trig;
158 const struct bma180_part_info *part_info;
159 struct iio_mount_matrix orientation;
160 struct mutex mutex;
161 bool sleep_state;
162 int scale;
163 int bw;
164 bool pmode;
165 u8 buff[16];
166};
167
168enum bma180_chan {
169 AXIS_X,
170 AXIS_Y,
171 AXIS_Z,
172 TEMP
173};
174
175static int bma023_bw_table[] = { 25, 50, 100, 190, 375, 750, 1500 };
176static int bma023_scale_table[] = { 2452, 4903, 9709, };
177
178static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 };
179static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
180
181static int bma25x_bw_table[] = { 8, 16, 31, 63, 125, 250 };
182static int bma25x_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0,
183 0, 0, 306458 };
184
185static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan)
186{
187 int ret;
188
189 if (data->sleep_state)
190 return -EBUSY;
191
192 switch (chan) {
193 case TEMP:
194 ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP);
195 if (ret < 0)
196 dev_err(&data->client->dev, "failed to read temp register\n");
197 break;
198 default:
199 ret = i2c_smbus_read_word_data(data->client,
200 BMA180_ACC_X_LSB + chan * 2);
201 if (ret < 0)
202 dev_err(&data->client->dev,
203 "failed to read accel_%c register\n",
204 'x' + chan);
205 }
206
207 return ret;
208}
209
210static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val)
211{
212 int ret = i2c_smbus_read_byte_data(data->client, reg);
213 u8 reg_val = (ret & ~mask) | (val << (ffs(mask) - 1));
214
215 if (ret < 0)
216 return ret;
217
218 return i2c_smbus_write_byte_data(data->client, reg, reg_val);
219}
220
221static int bma180_reset_intr(struct bma180_data *data)
222{
223 int ret = bma180_set_bits(data, data->part_info->int_reset_reg,
224 data->part_info->int_reset_mask, 1);
225
226 if (ret)
227 dev_err(&data->client->dev, "failed to reset interrupt\n");
228
229 return ret;
230}
231
232static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state)
233{
234 int ret = bma180_set_bits(data, data->part_info->int_enable_reg,
235 data->part_info->int_enable_mask, state);
236 if (ret)
237 goto err;
238 ret = bma180_reset_intr(data);
239 if (ret)
240 goto err;
241
242 return 0;
243
244err:
245 dev_err(&data->client->dev,
246 "failed to set new data interrupt state %d\n", state);
247 return ret;
248}
249
250static int bma180_set_sleep_state(struct bma180_data *data, bool state)
251{
252 int ret = bma180_set_bits(data, data->part_info->sleep_reg,
253 data->part_info->sleep_mask, state);
254
255 if (ret) {
256 dev_err(&data->client->dev,
257 "failed to set sleep state %d\n", state);
258 return ret;
259 }
260 data->sleep_state = state;
261
262 return 0;
263}
264
265static int bma180_set_ee_writing_state(struct bma180_data *data, bool state)
266{
267 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state);
268
269 if (ret)
270 dev_err(&data->client->dev,
271 "failed to set ee writing state %d\n", state);
272
273 return ret;
274}
275
276static int bma180_set_bw(struct bma180_data *data, int val)
277{
278 int ret, i;
279
280 if (data->sleep_state)
281 return -EBUSY;
282
283 for (i = 0; i < data->part_info->num_bw; ++i) {
284 if (data->part_info->bw_table[i] == val) {
285 ret = bma180_set_bits(data, data->part_info->bw_reg,
286 data->part_info->bw_mask, i);
287 if (ret) {
288 dev_err(&data->client->dev,
289 "failed to set bandwidth\n");
290 return ret;
291 }
292 data->bw = val;
293 return 0;
294 }
295 }
296
297 return -EINVAL;
298}
299
300static int bma180_set_scale(struct bma180_data *data, int val)
301{
302 int ret, i;
303
304 if (data->sleep_state)
305 return -EBUSY;
306
307 for (i = 0; i < data->part_info->num_scales; ++i)
308 if (data->part_info->scale_table[i] == val) {
309 ret = bma180_set_bits(data, data->part_info->scale_reg,
310 data->part_info->scale_mask, i);
311 if (ret) {
312 dev_err(&data->client->dev,
313 "failed to set scale\n");
314 return ret;
315 }
316 data->scale = val;
317 return 0;
318 }
319
320 return -EINVAL;
321}
322
323static int bma180_set_pmode(struct bma180_data *data, bool mode)
324{
325 u8 reg_val = mode ? data->part_info->lowpower_val : 0;
326 int ret = bma180_set_bits(data, data->part_info->power_reg,
327 data->part_info->power_mask, reg_val);
328
329 if (ret) {
330 dev_err(&data->client->dev, "failed to set power mode\n");
331 return ret;
332 }
333 data->pmode = mode;
334
335 return 0;
336}
337
338static int bma180_soft_reset(struct bma180_data *data)
339{
340 int ret = i2c_smbus_write_byte_data(data->client,
341 data->part_info->softreset_reg,
342 data->part_info->softreset_val);
343
344 if (ret)
345 dev_err(&data->client->dev, "failed to reset the chip\n");
346
347 return ret;
348}
349
350static int bma180_chip_init(struct bma180_data *data)
351{
352
353 int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID);
354
355 if (ret < 0)
356 return ret;
357 if (ret != data->part_info->chip_id) {
358 dev_err(&data->client->dev, "wrong chip ID %d expected %d\n",
359 ret, data->part_info->chip_id);
360 return -ENODEV;
361 }
362
363 ret = bma180_soft_reset(data);
364 if (ret)
365 return ret;
366
367
368
369
370 msleep(20);
371
372 return bma180_set_new_data_intr_state(data, false);
373}
374
375static int bma023_chip_config(struct bma180_data *data)
376{
377 int ret = bma180_chip_init(data);
378
379 if (ret)
380 goto err;
381
382 ret = bma180_set_bw(data, 50);
383 if (ret)
384 goto err;
385 ret = bma180_set_scale(data, 2452);
386 if (ret)
387 goto err;
388
389 return 0;
390
391err:
392 dev_err(&data->client->dev, "failed to config the chip\n");
393 return ret;
394}
395
396static int bma180_chip_config(struct bma180_data *data)
397{
398 int ret = bma180_chip_init(data);
399
400 if (ret)
401 goto err;
402 ret = bma180_set_pmode(data, false);
403 if (ret)
404 goto err;
405 ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1);
406 if (ret)
407 goto err;
408 ret = bma180_set_ee_writing_state(data, true);
409 if (ret)
410 goto err;
411 ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1);
412 if (ret)
413 goto err;
414 ret = bma180_set_bw(data, 20);
415 if (ret)
416 goto err;
417 ret = bma180_set_scale(data, 2452);
418 if (ret)
419 goto err;
420
421 return 0;
422
423err:
424 dev_err(&data->client->dev, "failed to config the chip\n");
425 return ret;
426}
427
428static int bma25x_chip_config(struct bma180_data *data)
429{
430 int ret = bma180_chip_init(data);
431
432 if (ret)
433 goto err;
434 ret = bma180_set_pmode(data, false);
435 if (ret)
436 goto err;
437 ret = bma180_set_bw(data, 16);
438 if (ret)
439 goto err;
440 ret = bma180_set_scale(data, 38344);
441 if (ret)
442 goto err;
443
444
445
446
447 ret = bma180_set_bits(data, data->part_info->int_map_reg,
448 data->part_info->int_enable_dataready_int1_mask, 1);
449 if (ret)
450 goto err;
451
452 return 0;
453
454err:
455 dev_err(&data->client->dev, "failed to config the chip\n");
456 return ret;
457}
458
459static void bma023_chip_disable(struct bma180_data *data)
460{
461 if (bma180_set_sleep_state(data, true))
462 goto err;
463
464 return;
465
466err:
467 dev_err(&data->client->dev, "failed to disable the chip\n");
468}
469
470static void bma180_chip_disable(struct bma180_data *data)
471{
472 if (bma180_set_new_data_intr_state(data, false))
473 goto err;
474 if (bma180_set_ee_writing_state(data, false))
475 goto err;
476 if (bma180_set_sleep_state(data, true))
477 goto err;
478
479 return;
480
481err:
482 dev_err(&data->client->dev, "failed to disable the chip\n");
483}
484
485static void bma25x_chip_disable(struct bma180_data *data)
486{
487 if (bma180_set_new_data_intr_state(data, false))
488 goto err;
489 if (bma180_set_sleep_state(data, true))
490 goto err;
491
492 return;
493
494err:
495 dev_err(&data->client->dev, "failed to disable the chip\n");
496}
497
498static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned int n,
499 bool micros)
500{
501 size_t len = 0;
502 int i;
503
504 for (i = 0; i < n; i++) {
505 if (!vals[i])
506 continue;
507 len += scnprintf(buf + len, PAGE_SIZE - len,
508 micros ? "0.%06d " : "%d ", vals[i]);
509 }
510 buf[len - 1] = '\n';
511
512 return len;
513}
514
515static ssize_t bma180_show_filter_freq_avail(struct device *dev,
516 struct device_attribute *attr, char *buf)
517{
518 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
519
520 return bma180_show_avail(buf, data->part_info->bw_table,
521 data->part_info->num_bw, false);
522}
523
524static ssize_t bma180_show_scale_avail(struct device *dev,
525 struct device_attribute *attr, char *buf)
526{
527 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
528
529 return bma180_show_avail(buf, data->part_info->scale_table,
530 data->part_info->num_scales, true);
531}
532
533static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
534 S_IRUGO, bma180_show_filter_freq_avail, NULL, 0);
535
536static IIO_DEVICE_ATTR(in_accel_scale_available,
537 S_IRUGO, bma180_show_scale_avail, NULL, 0);
538
539static struct attribute *bma180_attributes[] = {
540 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.
541 dev_attr.attr,
542 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
543 NULL,
544};
545
546static const struct attribute_group bma180_attrs_group = {
547 .attrs = bma180_attributes,
548};
549
550static int bma180_read_raw(struct iio_dev *indio_dev,
551 struct iio_chan_spec const *chan, int *val, int *val2,
552 long mask)
553{
554 struct bma180_data *data = iio_priv(indio_dev);
555 int ret;
556
557 switch (mask) {
558 case IIO_CHAN_INFO_RAW:
559 ret = iio_device_claim_direct_mode(indio_dev);
560 if (ret)
561 return ret;
562
563 mutex_lock(&data->mutex);
564 ret = bma180_get_data_reg(data, chan->scan_index);
565 mutex_unlock(&data->mutex);
566 iio_device_release_direct_mode(indio_dev);
567 if (ret < 0)
568 return ret;
569 if (chan->scan_type.sign == 's') {
570 *val = sign_extend32(ret >> chan->scan_type.shift,
571 chan->scan_type.realbits - 1);
572 } else {
573 *val = ret;
574 }
575 return IIO_VAL_INT;
576 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
577 *val = data->bw;
578 return IIO_VAL_INT;
579 case IIO_CHAN_INFO_SCALE:
580 switch (chan->type) {
581 case IIO_ACCEL:
582 *val = 0;
583 *val2 = data->scale;
584 return IIO_VAL_INT_PLUS_MICRO;
585 case IIO_TEMP:
586 *val = 500;
587 return IIO_VAL_INT;
588 default:
589 return -EINVAL;
590 }
591 case IIO_CHAN_INFO_OFFSET:
592 *val = data->part_info->temp_offset;
593 return IIO_VAL_INT;
594 default:
595 return -EINVAL;
596 }
597}
598
599static int bma180_write_raw(struct iio_dev *indio_dev,
600 struct iio_chan_spec const *chan, int val, int val2, long mask)
601{
602 struct bma180_data *data = iio_priv(indio_dev);
603 int ret;
604
605 switch (mask) {
606 case IIO_CHAN_INFO_SCALE:
607 if (val)
608 return -EINVAL;
609 mutex_lock(&data->mutex);
610 ret = bma180_set_scale(data, val2);
611 mutex_unlock(&data->mutex);
612 return ret;
613 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
614 if (val2)
615 return -EINVAL;
616 mutex_lock(&data->mutex);
617 ret = bma180_set_bw(data, val);
618 mutex_unlock(&data->mutex);
619 return ret;
620 default:
621 return -EINVAL;
622 }
623}
624
625static const struct iio_info bma180_info = {
626 .attrs = &bma180_attrs_group,
627 .read_raw = bma180_read_raw,
628 .write_raw = bma180_write_raw,
629};
630
631static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
632
633static int bma180_get_power_mode(struct iio_dev *indio_dev,
634 const struct iio_chan_spec *chan)
635{
636 struct bma180_data *data = iio_priv(indio_dev);
637
638 return data->pmode;
639}
640
641static int bma180_set_power_mode(struct iio_dev *indio_dev,
642 const struct iio_chan_spec *chan, unsigned int mode)
643{
644 struct bma180_data *data = iio_priv(indio_dev);
645 int ret;
646
647 mutex_lock(&data->mutex);
648 ret = bma180_set_pmode(data, mode);
649 mutex_unlock(&data->mutex);
650
651 return ret;
652}
653
654static const struct iio_mount_matrix *
655bma180_accel_get_mount_matrix(const struct iio_dev *indio_dev,
656 const struct iio_chan_spec *chan)
657{
658 struct bma180_data *data = iio_priv(indio_dev);
659
660 return &data->orientation;
661}
662
663static const struct iio_enum bma180_power_mode_enum = {
664 .items = bma180_power_modes,
665 .num_items = ARRAY_SIZE(bma180_power_modes),
666 .get = bma180_get_power_mode,
667 .set = bma180_set_power_mode,
668};
669
670static const struct iio_chan_spec_ext_info bma023_ext_info[] = {
671 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
672 { }
673};
674
675static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
676 IIO_ENUM("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
677 IIO_ENUM_AVAILABLE("power_mode", &bma180_power_mode_enum),
678 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
679 { }
680};
681
682#define BMA023_ACC_CHANNEL(_axis, _bits) { \
683 .type = IIO_ACCEL, \
684 .modified = 1, \
685 .channel2 = IIO_MOD_##_axis, \
686 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
687 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
688 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
689 .scan_index = AXIS_##_axis, \
690 .scan_type = { \
691 .sign = 's', \
692 .realbits = _bits, \
693 .storagebits = 16, \
694 .shift = 16 - _bits, \
695 }, \
696 .ext_info = bma023_ext_info, \
697}
698
699#define BMA150_TEMP_CHANNEL { \
700 .type = IIO_TEMP, \
701 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
702 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
703 .scan_index = TEMP, \
704 .scan_type = { \
705 .sign = 'u', \
706 .realbits = 8, \
707 .storagebits = 16, \
708 }, \
709}
710
711#define BMA180_ACC_CHANNEL(_axis, _bits) { \
712 .type = IIO_ACCEL, \
713 .modified = 1, \
714 .channel2 = IIO_MOD_##_axis, \
715 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
716 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
717 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
718 .scan_index = AXIS_##_axis, \
719 .scan_type = { \
720 .sign = 's', \
721 .realbits = _bits, \
722 .storagebits = 16, \
723 .shift = 16 - _bits, \
724 }, \
725 .ext_info = bma180_ext_info, \
726}
727
728#define BMA180_TEMP_CHANNEL { \
729 .type = IIO_TEMP, \
730 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
731 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
732 .scan_index = TEMP, \
733 .scan_type = { \
734 .sign = 's', \
735 .realbits = 8, \
736 .storagebits = 16, \
737 }, \
738}
739
740static const struct iio_chan_spec bma023_channels[] = {
741 BMA023_ACC_CHANNEL(X, 10),
742 BMA023_ACC_CHANNEL(Y, 10),
743 BMA023_ACC_CHANNEL(Z, 10),
744 IIO_CHAN_SOFT_TIMESTAMP(4),
745};
746
747static const struct iio_chan_spec bma150_channels[] = {
748 BMA023_ACC_CHANNEL(X, 10),
749 BMA023_ACC_CHANNEL(Y, 10),
750 BMA023_ACC_CHANNEL(Z, 10),
751 BMA150_TEMP_CHANNEL,
752 IIO_CHAN_SOFT_TIMESTAMP(4),
753};
754
755static const struct iio_chan_spec bma180_channels[] = {
756 BMA180_ACC_CHANNEL(X, 14),
757 BMA180_ACC_CHANNEL(Y, 14),
758 BMA180_ACC_CHANNEL(Z, 14),
759 BMA180_TEMP_CHANNEL,
760 IIO_CHAN_SOFT_TIMESTAMP(4),
761};
762
763static const struct iio_chan_spec bma250_channels[] = {
764 BMA180_ACC_CHANNEL(X, 10),
765 BMA180_ACC_CHANNEL(Y, 10),
766 BMA180_ACC_CHANNEL(Z, 10),
767 BMA180_TEMP_CHANNEL,
768 IIO_CHAN_SOFT_TIMESTAMP(4),
769};
770
771static const struct iio_chan_spec bma254_channels[] = {
772 BMA180_ACC_CHANNEL(X, 12),
773 BMA180_ACC_CHANNEL(Y, 12),
774 BMA180_ACC_CHANNEL(Z, 12),
775 BMA180_TEMP_CHANNEL,
776 IIO_CHAN_SOFT_TIMESTAMP(4),
777};
778
779static const struct bma180_part_info bma180_part_info[] = {
780 [BMA023] = {
781 .chip_id = BMA023_ID_REG_VAL,
782 .channels = bma023_channels,
783 .num_channels = ARRAY_SIZE(bma023_channels),
784 .scale_table = bma023_scale_table,
785 .num_scales = ARRAY_SIZE(bma023_scale_table),
786 .bw_table = bma023_bw_table,
787 .num_bw = ARRAY_SIZE(bma023_bw_table),
788
789 .temp_offset = 0,
790 .int_reset_reg = BMA023_CTRL_REG0,
791 .int_reset_mask = BMA023_INT_RESET_MASK,
792 .sleep_reg = BMA023_CTRL_REG0,
793 .sleep_mask = BMA023_SLEEP,
794 .bw_reg = BMA023_CTRL_REG2,
795 .bw_mask = BMA023_BW_MASK,
796 .scale_reg = BMA023_CTRL_REG2,
797 .scale_mask = BMA023_RANGE_MASK,
798
799 .power_reg = 0,
800 .power_mask = 0,
801 .lowpower_val = 0,
802 .int_enable_reg = BMA023_CTRL_REG3,
803 .int_enable_mask = BMA023_NEW_DATA_INT,
804 .softreset_reg = BMA023_CTRL_REG0,
805 .softreset_val = BMA023_RESET_VAL,
806 .chip_config = bma023_chip_config,
807 .chip_disable = bma023_chip_disable,
808 },
809 [BMA150] = {
810 .chip_id = BMA023_ID_REG_VAL,
811 .channels = bma150_channels,
812 .num_channels = ARRAY_SIZE(bma150_channels),
813 .scale_table = bma023_scale_table,
814 .num_scales = ARRAY_SIZE(bma023_scale_table),
815 .bw_table = bma023_bw_table,
816 .num_bw = ARRAY_SIZE(bma023_bw_table),
817 .temp_offset = -60,
818 .int_reset_reg = BMA023_CTRL_REG0,
819 .int_reset_mask = BMA023_INT_RESET_MASK,
820 .sleep_reg = BMA023_CTRL_REG0,
821 .sleep_mask = BMA023_SLEEP,
822 .bw_reg = BMA023_CTRL_REG2,
823 .bw_mask = BMA023_BW_MASK,
824 .scale_reg = BMA023_CTRL_REG2,
825 .scale_mask = BMA023_RANGE_MASK,
826
827 .power_reg = 0,
828 .power_mask = 0,
829 .lowpower_val = 0,
830 .int_enable_reg = BMA023_CTRL_REG3,
831 .int_enable_mask = BMA023_NEW_DATA_INT,
832 .softreset_reg = BMA023_CTRL_REG0,
833 .softreset_val = BMA023_RESET_VAL,
834 .chip_config = bma023_chip_config,
835 .chip_disable = bma023_chip_disable,
836 },
837 [BMA180] = {
838 .chip_id = BMA180_ID_REG_VAL,
839 .channels = bma180_channels,
840 .num_channels = ARRAY_SIZE(bma180_channels),
841 .scale_table = bma180_scale_table,
842 .num_scales = ARRAY_SIZE(bma180_scale_table),
843 .bw_table = bma180_bw_table,
844 .num_bw = ARRAY_SIZE(bma180_bw_table),
845 .temp_offset = 48,
846 .int_reset_reg = BMA180_CTRL_REG0,
847 .int_reset_mask = BMA180_RESET_INT,
848 .sleep_reg = BMA180_CTRL_REG0,
849 .sleep_mask = BMA180_SLEEP,
850 .bw_reg = BMA180_BW_TCS,
851 .bw_mask = BMA180_BW,
852 .scale_reg = BMA180_OFFSET_LSB1,
853 .scale_mask = BMA180_RANGE,
854 .power_reg = BMA180_TCO_Z,
855 .power_mask = BMA180_MODE_CONFIG,
856 .lowpower_val = BMA180_LOW_POWER,
857 .int_enable_reg = BMA180_CTRL_REG3,
858 .int_enable_mask = BMA180_NEW_DATA_INT,
859 .softreset_reg = BMA180_RESET,
860 .softreset_val = BMA180_RESET_VAL,
861 .chip_config = bma180_chip_config,
862 .chip_disable = bma180_chip_disable,
863 },
864 [BMA250] = {
865 .chip_id = BMA250_ID_REG_VAL,
866 .channels = bma250_channels,
867 .num_channels = ARRAY_SIZE(bma250_channels),
868 .scale_table = bma25x_scale_table,
869 .num_scales = ARRAY_SIZE(bma25x_scale_table),
870 .bw_table = bma25x_bw_table,
871 .num_bw = ARRAY_SIZE(bma25x_bw_table),
872 .temp_offset = 48,
873 .int_reset_reg = BMA250_INT_RESET_REG,
874 .int_reset_mask = BMA250_INT_RESET_MASK,
875 .sleep_reg = BMA250_POWER_REG,
876 .sleep_mask = BMA250_SUSPEND_MASK,
877 .bw_reg = BMA250_BW_REG,
878 .bw_mask = BMA250_BW_MASK,
879 .scale_reg = BMA250_RANGE_REG,
880 .scale_mask = BMA250_RANGE_MASK,
881 .power_reg = BMA250_POWER_REG,
882 .power_mask = BMA250_LOWPOWER_MASK,
883 .lowpower_val = 1,
884 .int_enable_reg = BMA250_INT_ENABLE_REG,
885 .int_enable_mask = BMA250_DATA_INTEN_MASK,
886 .int_map_reg = BMA250_INT_MAP_REG,
887 .int_enable_dataready_int1_mask = BMA250_INT1_DATA_MASK,
888 .softreset_reg = BMA250_RESET_REG,
889 .softreset_val = BMA180_RESET_VAL,
890 .chip_config = bma25x_chip_config,
891 .chip_disable = bma25x_chip_disable,
892 },
893 [BMA254] = {
894 .chip_id = BMA254_ID_REG_VAL,
895 .channels = bma254_channels,
896 .num_channels = ARRAY_SIZE(bma254_channels),
897 .scale_table = bma25x_scale_table,
898 .num_scales = ARRAY_SIZE(bma25x_scale_table),
899 .bw_table = bma25x_bw_table,
900 .num_bw = ARRAY_SIZE(bma25x_bw_table),
901 .temp_offset = 46,
902 .int_reset_reg = BMA254_INT_RESET_REG,
903 .int_reset_mask = BMA254_INT_RESET_MASK,
904 .sleep_reg = BMA254_POWER_REG,
905 .sleep_mask = BMA254_SUSPEND_MASK,
906 .bw_reg = BMA254_BW_REG,
907 .bw_mask = BMA254_BW_MASK,
908 .scale_reg = BMA254_RANGE_REG,
909 .scale_mask = BMA254_RANGE_MASK,
910 .power_reg = BMA254_POWER_REG,
911 .power_mask = BMA254_LOWPOWER_MASK,
912 .lowpower_val = 1,
913 .int_enable_reg = BMA254_INT_ENABLE_REG,
914 .int_enable_mask = BMA254_DATA_INTEN_MASK,
915 .int_map_reg = BMA254_INT_MAP_REG,
916 .int_enable_dataready_int1_mask = BMA254_INT1_DATA_MASK,
917 .softreset_reg = BMA254_RESET_REG,
918 .softreset_val = BMA180_RESET_VAL,
919 .chip_config = bma25x_chip_config,
920 .chip_disable = bma25x_chip_disable,
921 },
922};
923
924static irqreturn_t bma180_trigger_handler(int irq, void *p)
925{
926 struct iio_poll_func *pf = p;
927 struct iio_dev *indio_dev = pf->indio_dev;
928 struct bma180_data *data = iio_priv(indio_dev);
929 s64 time_ns = iio_get_time_ns(indio_dev);
930 int bit, ret, i = 0;
931
932 mutex_lock(&data->mutex);
933
934 for_each_set_bit(bit, indio_dev->active_scan_mask,
935 indio_dev->masklength) {
936 ret = bma180_get_data_reg(data, bit);
937 if (ret < 0) {
938 mutex_unlock(&data->mutex);
939 goto err;
940 }
941 ((s16 *)data->buff)[i++] = ret;
942 }
943
944 mutex_unlock(&data->mutex);
945
946 iio_push_to_buffers_with_timestamp(indio_dev, data->buff, time_ns);
947err:
948 iio_trigger_notify_done(indio_dev->trig);
949
950 return IRQ_HANDLED;
951}
952
953static int bma180_data_rdy_trigger_set_state(struct iio_trigger *trig,
954 bool state)
955{
956 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
957 struct bma180_data *data = iio_priv(indio_dev);
958
959 return bma180_set_new_data_intr_state(data, state);
960}
961
962static void bma180_trig_reen(struct iio_trigger *trig)
963{
964 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
965 struct bma180_data *data = iio_priv(indio_dev);
966 int ret;
967
968 ret = bma180_reset_intr(data);
969 if (ret)
970 dev_err(&data->client->dev, "failed to reset interrupt\n");
971}
972
973static const struct iio_trigger_ops bma180_trigger_ops = {
974 .set_trigger_state = bma180_data_rdy_trigger_set_state,
975 .reenable = bma180_trig_reen,
976};
977
978static int bma180_probe(struct i2c_client *client,
979 const struct i2c_device_id *id)
980{
981 struct device *dev = &client->dev;
982 struct bma180_data *data;
983 struct iio_dev *indio_dev;
984 enum chip_ids chip;
985 int ret;
986
987 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
988 if (!indio_dev)
989 return -ENOMEM;
990
991 data = iio_priv(indio_dev);
992 i2c_set_clientdata(client, indio_dev);
993 data->client = client;
994 if (client->dev.of_node)
995 chip = (enum chip_ids)of_device_get_match_data(dev);
996 else
997 chip = id->driver_data;
998 data->part_info = &bma180_part_info[chip];
999
1000 ret = iio_read_mount_matrix(dev, "mount-matrix",
1001 &data->orientation);
1002 if (ret)
1003 return ret;
1004
1005 data->vdd_supply = devm_regulator_get(dev, "vdd");
1006 if (IS_ERR(data->vdd_supply))
1007 return dev_err_probe(dev, PTR_ERR(data->vdd_supply),
1008 "Failed to get vdd regulator\n");
1009
1010 data->vddio_supply = devm_regulator_get(dev, "vddio");
1011 if (IS_ERR(data->vddio_supply))
1012 return dev_err_probe(dev, PTR_ERR(data->vddio_supply),
1013 "Failed to get vddio regulator\n");
1014
1015
1016 ret = regulator_set_voltage(data->vdd_supply, 1620000, 3600000);
1017 if (ret)
1018 return ret;
1019 ret = regulator_set_voltage(data->vddio_supply, 1200000, 3600000);
1020 if (ret)
1021 return ret;
1022 ret = regulator_enable(data->vdd_supply);
1023 if (ret) {
1024 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
1025 return ret;
1026 }
1027 ret = regulator_enable(data->vddio_supply);
1028 if (ret) {
1029 dev_err(dev, "Failed to enable vddio regulator: %d\n", ret);
1030 goto err_disable_vdd;
1031 }
1032
1033 usleep_range(3000, 5000);
1034
1035 ret = data->part_info->chip_config(data);
1036 if (ret < 0)
1037 goto err_chip_disable;
1038
1039 mutex_init(&data->mutex);
1040 indio_dev->channels = data->part_info->channels;
1041 indio_dev->num_channels = data->part_info->num_channels;
1042 indio_dev->name = id->name;
1043 indio_dev->modes = INDIO_DIRECT_MODE;
1044 indio_dev->info = &bma180_info;
1045
1046 if (client->irq > 0) {
1047 data->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
1048 indio_dev->id);
1049 if (!data->trig) {
1050 ret = -ENOMEM;
1051 goto err_chip_disable;
1052 }
1053
1054 ret = devm_request_irq(dev, client->irq,
1055 iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING,
1056 "bma180_event", data->trig);
1057 if (ret) {
1058 dev_err(dev, "unable to request IRQ\n");
1059 goto err_trigger_free;
1060 }
1061
1062 data->trig->dev.parent = dev;
1063 data->trig->ops = &bma180_trigger_ops;
1064 iio_trigger_set_drvdata(data->trig, indio_dev);
1065 indio_dev->trig = iio_trigger_get(data->trig);
1066
1067 ret = iio_trigger_register(data->trig);
1068 if (ret)
1069 goto err_trigger_free;
1070 }
1071
1072 ret = iio_triggered_buffer_setup(indio_dev, NULL,
1073 bma180_trigger_handler, NULL);
1074 if (ret < 0) {
1075 dev_err(dev, "unable to setup iio triggered buffer\n");
1076 goto err_trigger_unregister;
1077 }
1078
1079 ret = iio_device_register(indio_dev);
1080 if (ret < 0) {
1081 dev_err(dev, "unable to register iio device\n");
1082 goto err_buffer_cleanup;
1083 }
1084
1085 return 0;
1086
1087err_buffer_cleanup:
1088 iio_triggered_buffer_cleanup(indio_dev);
1089err_trigger_unregister:
1090 if (data->trig)
1091 iio_trigger_unregister(data->trig);
1092err_trigger_free:
1093 iio_trigger_free(data->trig);
1094err_chip_disable:
1095 data->part_info->chip_disable(data);
1096 regulator_disable(data->vddio_supply);
1097err_disable_vdd:
1098 regulator_disable(data->vdd_supply);
1099
1100 return ret;
1101}
1102
1103static int bma180_remove(struct i2c_client *client)
1104{
1105 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1106 struct bma180_data *data = iio_priv(indio_dev);
1107
1108 iio_device_unregister(indio_dev);
1109 iio_triggered_buffer_cleanup(indio_dev);
1110 if (data->trig) {
1111 iio_trigger_unregister(data->trig);
1112 iio_trigger_free(data->trig);
1113 }
1114
1115 mutex_lock(&data->mutex);
1116 data->part_info->chip_disable(data);
1117 mutex_unlock(&data->mutex);
1118 regulator_disable(data->vddio_supply);
1119 regulator_disable(data->vdd_supply);
1120
1121 return 0;
1122}
1123
1124#ifdef CONFIG_PM_SLEEP
1125static int bma180_suspend(struct device *dev)
1126{
1127 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1128 struct bma180_data *data = iio_priv(indio_dev);
1129 int ret;
1130
1131 mutex_lock(&data->mutex);
1132 ret = bma180_set_sleep_state(data, true);
1133 mutex_unlock(&data->mutex);
1134
1135 return ret;
1136}
1137
1138static int bma180_resume(struct device *dev)
1139{
1140 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1141 struct bma180_data *data = iio_priv(indio_dev);
1142 int ret;
1143
1144 mutex_lock(&data->mutex);
1145 ret = bma180_set_sleep_state(data, false);
1146 mutex_unlock(&data->mutex);
1147
1148 return ret;
1149}
1150
1151static SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
1152#define BMA180_PM_OPS (&bma180_pm_ops)
1153#else
1154#define BMA180_PM_OPS NULL
1155#endif
1156
1157static const struct i2c_device_id bma180_ids[] = {
1158 { "bma023", BMA023 },
1159 { "bma150", BMA150 },
1160 { "bma180", BMA180 },
1161 { "bma250", BMA250 },
1162 { "bma254", BMA254 },
1163 { "smb380", BMA150 },
1164 { }
1165};
1166
1167MODULE_DEVICE_TABLE(i2c, bma180_ids);
1168
1169static const struct of_device_id bma180_of_match[] = {
1170 {
1171 .compatible = "bosch,bma023",
1172 .data = (void *)BMA023
1173 },
1174 {
1175 .compatible = "bosch,bma150",
1176 .data = (void *)BMA150
1177 },
1178 {
1179 .compatible = "bosch,bma180",
1180 .data = (void *)BMA180
1181 },
1182 {
1183 .compatible = "bosch,bma250",
1184 .data = (void *)BMA250
1185 },
1186 {
1187 .compatible = "bosch,bma254",
1188 .data = (void *)BMA254
1189 },
1190 {
1191 .compatible = "bosch,smb380",
1192 .data = (void *)BMA150
1193 },
1194 { }
1195};
1196MODULE_DEVICE_TABLE(of, bma180_of_match);
1197
1198static struct i2c_driver bma180_driver = {
1199 .driver = {
1200 .name = "bma180",
1201 .pm = BMA180_PM_OPS,
1202 .of_match_table = bma180_of_match,
1203 },
1204 .probe = bma180_probe,
1205 .remove = bma180_remove,
1206 .id_table = bma180_ids,
1207};
1208
1209module_i2c_driver(bma180_driver);
1210
1211MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>");
1212MODULE_AUTHOR("Texas Instruments, Inc.");
1213MODULE_DESCRIPTION("Bosch BMA023/BMA1x0/BMA25x triaxial acceleration sensor");
1214MODULE_LICENSE("GPL");
1215
