1
2
3
4
5
6
7
8
9
10
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/i2c.h>
15#include <linux/regmap.h>
16#include <linux/delay.h>
17#include <linux/acpi.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/buffer.h>
21#include <linux/iio/trigger.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/triggered_buffer.h>
24#include <linux/iio/sysfs.h>
25#include <linux/pm_runtime.h>
26
27#define RPR0521_REG_SYSTEM_CTRL 0x40
28#define RPR0521_REG_MODE_CTRL 0x41
29#define RPR0521_REG_ALS_CTRL 0x42
30#define RPR0521_REG_PXS_CTRL 0x43
31#define RPR0521_REG_PXS_DATA 0x44
32#define RPR0521_REG_ALS_DATA0 0x46
33#define RPR0521_REG_ALS_DATA1 0x48
34#define RPR0521_REG_INTERRUPT 0x4A
35#define RPR0521_REG_PS_OFFSET_LSB 0x53
36#define RPR0521_REG_ID 0x92
37
38#define RPR0521_MODE_ALS_MASK BIT(7)
39#define RPR0521_MODE_PXS_MASK BIT(6)
40#define RPR0521_MODE_MEAS_TIME_MASK GENMASK(3, 0)
41#define RPR0521_ALS_DATA0_GAIN_MASK GENMASK(5, 4)
42#define RPR0521_ALS_DATA0_GAIN_SHIFT 4
43#define RPR0521_ALS_DATA1_GAIN_MASK GENMASK(3, 2)
44#define RPR0521_ALS_DATA1_GAIN_SHIFT 2
45#define RPR0521_PXS_GAIN_MASK GENMASK(5, 4)
46#define RPR0521_PXS_GAIN_SHIFT 4
47#define RPR0521_PXS_PERSISTENCE_MASK GENMASK(3, 0)
48#define RPR0521_INTERRUPT_INT_TRIG_PS_MASK BIT(0)
49#define RPR0521_INTERRUPT_INT_TRIG_ALS_MASK BIT(1)
50#define RPR0521_INTERRUPT_INT_REASSERT_MASK BIT(3)
51#define RPR0521_INTERRUPT_ALS_INT_STATUS_MASK BIT(6)
52#define RPR0521_INTERRUPT_PS_INT_STATUS_MASK BIT(7)
53
54#define RPR0521_MODE_ALS_ENABLE BIT(7)
55#define RPR0521_MODE_ALS_DISABLE 0x00
56#define RPR0521_MODE_PXS_ENABLE BIT(6)
57#define RPR0521_MODE_PXS_DISABLE 0x00
58#define RPR0521_PXS_PERSISTENCE_DRDY 0x00
59
60#define RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE BIT(0)
61#define RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE 0x00
62#define RPR0521_INTERRUPT_INT_TRIG_ALS_ENABLE BIT(1)
63#define RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE 0x00
64#define RPR0521_INTERRUPT_INT_REASSERT_ENABLE BIT(3)
65#define RPR0521_INTERRUPT_INT_REASSERT_DISABLE 0x00
66
67#define RPR0521_MANUFACT_ID 0xE0
68#define RPR0521_DEFAULT_MEAS_TIME 0x06
69
70#define RPR0521_DRV_NAME "RPR0521"
71#define RPR0521_IRQ_NAME "rpr0521_event"
72#define RPR0521_REGMAP_NAME "rpr0521_regmap"
73
74#define RPR0521_SLEEP_DELAY_MS 2000
75
76#define RPR0521_ALS_SCALE_AVAIL "0.007812 0.015625 0.5 1"
77#define RPR0521_PXS_SCALE_AVAIL "0.125 0.5 1"
78
79struct rpr0521_gain {
80 int scale;
81 int uscale;
82};
83
84static const struct rpr0521_gain rpr0521_als_gain[4] = {
85 {1, 0},
86 {0, 500000},
87 {0, 15625},
88 {0, 7812},
89};
90
91static const struct rpr0521_gain rpr0521_pxs_gain[3] = {
92 {1, 0},
93 {0, 500000},
94 {0, 125000},
95};
96
97enum rpr0521_channel {
98 RPR0521_CHAN_PXS,
99 RPR0521_CHAN_ALS_DATA0,
100 RPR0521_CHAN_ALS_DATA1,
101};
102
103struct rpr0521_reg_desc {
104 u8 address;
105 u8 device_mask;
106};
107
108static const struct rpr0521_reg_desc rpr0521_data_reg[] = {
109 [RPR0521_CHAN_PXS] = {
110 .address = RPR0521_REG_PXS_DATA,
111 .device_mask = RPR0521_MODE_PXS_MASK,
112 },
113 [RPR0521_CHAN_ALS_DATA0] = {
114 .address = RPR0521_REG_ALS_DATA0,
115 .device_mask = RPR0521_MODE_ALS_MASK,
116 },
117 [RPR0521_CHAN_ALS_DATA1] = {
118 .address = RPR0521_REG_ALS_DATA1,
119 .device_mask = RPR0521_MODE_ALS_MASK,
120 },
121};
122
123static const struct rpr0521_gain_info {
124 u8 reg;
125 u8 mask;
126 u8 shift;
127 const struct rpr0521_gain *gain;
128 int size;
129} rpr0521_gain[] = {
130 [RPR0521_CHAN_PXS] = {
131 .reg = RPR0521_REG_PXS_CTRL,
132 .mask = RPR0521_PXS_GAIN_MASK,
133 .shift = RPR0521_PXS_GAIN_SHIFT,
134 .gain = rpr0521_pxs_gain,
135 .size = ARRAY_SIZE(rpr0521_pxs_gain),
136 },
137 [RPR0521_CHAN_ALS_DATA0] = {
138 .reg = RPR0521_REG_ALS_CTRL,
139 .mask = RPR0521_ALS_DATA0_GAIN_MASK,
140 .shift = RPR0521_ALS_DATA0_GAIN_SHIFT,
141 .gain = rpr0521_als_gain,
142 .size = ARRAY_SIZE(rpr0521_als_gain),
143 },
144 [RPR0521_CHAN_ALS_DATA1] = {
145 .reg = RPR0521_REG_ALS_CTRL,
146 .mask = RPR0521_ALS_DATA1_GAIN_MASK,
147 .shift = RPR0521_ALS_DATA1_GAIN_SHIFT,
148 .gain = rpr0521_als_gain,
149 .size = ARRAY_SIZE(rpr0521_als_gain),
150 },
151};
152
153struct rpr0521_samp_freq {
154 int als_hz;
155 int als_uhz;
156 int pxs_hz;
157 int pxs_uhz;
158};
159
160static const struct rpr0521_samp_freq rpr0521_samp_freq_i[13] = {
161
162 {0, 0, 0, 0},
163 {0, 0, 100, 0},
164 {0, 0, 25, 0},
165 {0, 0, 10, 0},
166 {0, 0, 2, 500000},
167 {10, 0, 20, 0},
168 {10, 0, 10, 0},
169 {10, 0, 2, 500000},
170 {2, 500000, 20, 0},
171 {2, 500000, 10, 0},
172 {2, 500000, 0, 0},
173 {2, 500000, 2, 500000},
174 {20, 0, 20, 0}
175};
176
177struct rpr0521_data {
178 struct i2c_client *client;
179
180
181 struct mutex lock;
182
183
184 bool als_dev_en;
185 bool pxs_dev_en;
186
187 struct iio_trigger *drdy_trigger0;
188 s64 irq_timestamp;
189
190
191 bool als_ps_need_en;
192 bool pxs_ps_need_en;
193 bool als_need_dis;
194 bool pxs_need_dis;
195
196 struct regmap *regmap;
197
198
199
200
201
202
203 struct {
204 __le16 channels[3];
205 u8 garbage;
206 s64 ts __aligned(8);
207 } scan;
208};
209
210static IIO_CONST_ATTR(in_intensity_scale_available, RPR0521_ALS_SCALE_AVAIL);
211static IIO_CONST_ATTR(in_proximity_scale_available, RPR0521_PXS_SCALE_AVAIL);
212
213
214
215
216
217static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("2.5 10");
218
219static struct attribute *rpr0521_attributes[] = {
220 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
221 &iio_const_attr_in_proximity_scale_available.dev_attr.attr,
222 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
223 NULL,
224};
225
226static const struct attribute_group rpr0521_attribute_group = {
227 .attrs = rpr0521_attributes,
228};
229
230
231enum rpr0521_scan_index_order {
232 RPR0521_CHAN_INDEX_PXS,
233 RPR0521_CHAN_INDEX_BOTH,
234 RPR0521_CHAN_INDEX_IR,
235};
236
237static const unsigned long rpr0521_available_scan_masks[] = {
238 BIT(RPR0521_CHAN_INDEX_PXS) | BIT(RPR0521_CHAN_INDEX_BOTH) |
239 BIT(RPR0521_CHAN_INDEX_IR),
240 0
241};
242
243static const struct iio_chan_spec rpr0521_channels[] = {
244 {
245 .type = IIO_PROXIMITY,
246 .address = RPR0521_CHAN_PXS,
247 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
248 BIT(IIO_CHAN_INFO_OFFSET) |
249 BIT(IIO_CHAN_INFO_SCALE),
250 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
251 .scan_index = RPR0521_CHAN_INDEX_PXS,
252 .scan_type = {
253 .sign = 'u',
254 .realbits = 16,
255 .storagebits = 16,
256 .endianness = IIO_LE,
257 },
258 },
259 {
260 .type = IIO_INTENSITY,
261 .modified = 1,
262 .address = RPR0521_CHAN_ALS_DATA0,
263 .channel2 = IIO_MOD_LIGHT_BOTH,
264 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
265 BIT(IIO_CHAN_INFO_SCALE),
266 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
267 .scan_index = RPR0521_CHAN_INDEX_BOTH,
268 .scan_type = {
269 .sign = 'u',
270 .realbits = 16,
271 .storagebits = 16,
272 .endianness = IIO_LE,
273 },
274 },
275 {
276 .type = IIO_INTENSITY,
277 .modified = 1,
278 .address = RPR0521_CHAN_ALS_DATA1,
279 .channel2 = IIO_MOD_LIGHT_IR,
280 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
281 BIT(IIO_CHAN_INFO_SCALE),
282 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
283 .scan_index = RPR0521_CHAN_INDEX_IR,
284 .scan_type = {
285 .sign = 'u',
286 .realbits = 16,
287 .storagebits = 16,
288 .endianness = IIO_LE,
289 },
290 },
291};
292
293static int rpr0521_als_enable(struct rpr0521_data *data, u8 status)
294{
295 int ret;
296
297 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
298 RPR0521_MODE_ALS_MASK,
299 status);
300 if (ret < 0)
301 return ret;
302
303 if (status & RPR0521_MODE_ALS_MASK)
304 data->als_dev_en = true;
305 else
306 data->als_dev_en = false;
307
308 return 0;
309}
310
311static int rpr0521_pxs_enable(struct rpr0521_data *data, u8 status)
312{
313 int ret;
314
315 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
316 RPR0521_MODE_PXS_MASK,
317 status);
318 if (ret < 0)
319 return ret;
320
321 if (status & RPR0521_MODE_PXS_MASK)
322 data->pxs_dev_en = true;
323 else
324 data->pxs_dev_en = false;
325
326 return 0;
327}
328
329
330
331
332
333
334
335
336
337
338
339static int rpr0521_set_power_state(struct rpr0521_data *data, bool on,
340 u8 device_mask)
341{
342#ifdef CONFIG_PM
343 int ret;
344
345 if (device_mask & RPR0521_MODE_ALS_MASK) {
346 data->als_ps_need_en = on;
347 data->als_need_dis = !on;
348 }
349
350 if (device_mask & RPR0521_MODE_PXS_MASK) {
351 data->pxs_ps_need_en = on;
352 data->pxs_need_dis = !on;
353 }
354
355
356
357
358
359
360
361
362 if (on) {
363 ret = pm_runtime_get_sync(&data->client->dev);
364 } else {
365 pm_runtime_mark_last_busy(&data->client->dev);
366 ret = pm_runtime_put_autosuspend(&data->client->dev);
367 }
368 if (ret < 0) {
369 dev_err(&data->client->dev,
370 "Failed: rpr0521_set_power_state for %d, ret %d\n",
371 on, ret);
372 if (on)
373 pm_runtime_put_noidle(&data->client->dev);
374
375 return ret;
376 }
377
378 if (on) {
379
380 if (data->als_ps_need_en) {
381 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
382 if (ret)
383 return ret;
384 data->als_ps_need_en = false;
385 }
386
387 if (data->pxs_ps_need_en) {
388 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
389 if (ret)
390 return ret;
391 data->pxs_ps_need_en = false;
392 }
393 }
394#endif
395 return 0;
396}
397
398
399static inline bool rpr0521_is_triggered(struct rpr0521_data *data)
400{
401 int ret;
402 int reg;
403
404 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, ®);
405 if (ret < 0)
406 return false;
407 if (reg &
408 (RPR0521_INTERRUPT_ALS_INT_STATUS_MASK |
409 RPR0521_INTERRUPT_PS_INT_STATUS_MASK))
410 return true;
411 else
412 return false;
413}
414
415
416static irqreturn_t rpr0521_drdy_irq_handler(int irq, void *private)
417{
418 struct iio_dev *indio_dev = private;
419 struct rpr0521_data *data = iio_priv(indio_dev);
420
421 data->irq_timestamp = iio_get_time_ns(indio_dev);
422
423
424
425
426
427
428 return IRQ_WAKE_THREAD;
429}
430
431static irqreturn_t rpr0521_drdy_irq_thread(int irq, void *private)
432{
433 struct iio_dev *indio_dev = private;
434 struct rpr0521_data *data = iio_priv(indio_dev);
435
436 if (rpr0521_is_triggered(data)) {
437 iio_trigger_poll_chained(data->drdy_trigger0);
438 return IRQ_HANDLED;
439 }
440
441 return IRQ_NONE;
442}
443
444static irqreturn_t rpr0521_trigger_consumer_store_time(int irq, void *p)
445{
446 struct iio_poll_func *pf = p;
447 struct iio_dev *indio_dev = pf->indio_dev;
448
449
450 if (!iio_trigger_using_own(indio_dev))
451 pf->timestamp = iio_get_time_ns(indio_dev);
452
453 return IRQ_WAKE_THREAD;
454}
455
456static irqreturn_t rpr0521_trigger_consumer_handler(int irq, void *p)
457{
458 struct iio_poll_func *pf = p;
459 struct iio_dev *indio_dev = pf->indio_dev;
460 struct rpr0521_data *data = iio_priv(indio_dev);
461 int err;
462
463
464 if (iio_trigger_using_own(indio_dev) && data->irq_timestamp) {
465 pf->timestamp = data->irq_timestamp;
466 data->irq_timestamp = 0;
467 }
468
469 if (!pf->timestamp)
470 pf->timestamp = iio_get_time_ns(indio_dev);
471
472 err = regmap_bulk_read(data->regmap, RPR0521_REG_PXS_DATA,
473 data->scan.channels,
474 (3 * 2) + 1);
475 if (!err)
476 iio_push_to_buffers_with_timestamp(indio_dev,
477 &data->scan, pf->timestamp);
478 else
479 dev_err(&data->client->dev,
480 "Trigger consumer can't read from sensor.\n");
481 pf->timestamp = 0;
482
483 iio_trigger_notify_done(indio_dev->trig);
484
485 return IRQ_HANDLED;
486}
487
488static int rpr0521_write_int_enable(struct rpr0521_data *data)
489{
490 int err;
491
492
493 err = regmap_update_bits(data->regmap, RPR0521_REG_PXS_CTRL,
494 RPR0521_PXS_PERSISTENCE_MASK,
495 RPR0521_PXS_PERSISTENCE_DRDY);
496 if (err) {
497 dev_err(&data->client->dev, "PS control reg write fail.\n");
498 return -EBUSY;
499 }
500
501
502 err = regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
503 RPR0521_INTERRUPT_INT_REASSERT_DISABLE |
504 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
505 RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE
506 );
507 if (err) {
508 dev_err(&data->client->dev, "Interrupt setup write fail.\n");
509 return -EBUSY;
510 }
511
512 return 0;
513}
514
515static int rpr0521_write_int_disable(struct rpr0521_data *data)
516{
517
518 return regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
519 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
520 RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE
521 );
522}
523
524
525
526
527
528static int rpr0521_pxs_drdy_set_state(struct iio_trigger *trigger,
529 bool enable_drdy)
530{
531 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trigger);
532 struct rpr0521_data *data = iio_priv(indio_dev);
533 int err;
534
535 if (enable_drdy)
536 err = rpr0521_write_int_enable(data);
537 else
538 err = rpr0521_write_int_disable(data);
539 if (err)
540 dev_err(&data->client->dev, "rpr0521_pxs_drdy_set_state failed\n");
541
542 return err;
543}
544
545static const struct iio_trigger_ops rpr0521_trigger_ops = {
546 .set_trigger_state = rpr0521_pxs_drdy_set_state,
547 };
548
549
550static int rpr0521_buffer_preenable(struct iio_dev *indio_dev)
551{
552 int err;
553 struct rpr0521_data *data = iio_priv(indio_dev);
554
555 mutex_lock(&data->lock);
556 err = rpr0521_set_power_state(data, true,
557 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
558 mutex_unlock(&data->lock);
559 if (err)
560 dev_err(&data->client->dev, "_buffer_preenable fail\n");
561
562 return err;
563}
564
565static int rpr0521_buffer_postdisable(struct iio_dev *indio_dev)
566{
567 int err;
568 struct rpr0521_data *data = iio_priv(indio_dev);
569
570 mutex_lock(&data->lock);
571 err = rpr0521_set_power_state(data, false,
572 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
573 mutex_unlock(&data->lock);
574 if (err)
575 dev_err(&data->client->dev, "_buffer_postdisable fail\n");
576
577 return err;
578}
579
580static const struct iio_buffer_setup_ops rpr0521_buffer_setup_ops = {
581 .preenable = rpr0521_buffer_preenable,
582 .postdisable = rpr0521_buffer_postdisable,
583};
584
585static int rpr0521_get_gain(struct rpr0521_data *data, int chan,
586 int *val, int *val2)
587{
588 int ret, reg, idx;
589
590 ret = regmap_read(data->regmap, rpr0521_gain[chan].reg, ®);
591 if (ret < 0)
592 return ret;
593
594 idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift;
595 *val = rpr0521_gain[chan].gain[idx].scale;
596 *val2 = rpr0521_gain[chan].gain[idx].uscale;
597
598 return 0;
599}
600
601static int rpr0521_set_gain(struct rpr0521_data *data, int chan,
602 int val, int val2)
603{
604 int i, idx = -EINVAL;
605
606
607 for (i = 0; i < rpr0521_gain[chan].size; i++)
608 if (val == rpr0521_gain[chan].gain[i].scale &&
609 val2 == rpr0521_gain[chan].gain[i].uscale) {
610 idx = i;
611 break;
612 }
613
614 if (idx < 0)
615 return idx;
616
617 return regmap_update_bits(data->regmap, rpr0521_gain[chan].reg,
618 rpr0521_gain[chan].mask,
619 idx << rpr0521_gain[chan].shift);
620}
621
622static int rpr0521_read_samp_freq(struct rpr0521_data *data,
623 enum iio_chan_type chan_type,
624 int *val, int *val2)
625{
626 int reg, ret;
627
628 ret = regmap_read(data->regmap, RPR0521_REG_MODE_CTRL, ®);
629 if (ret < 0)
630 return ret;
631
632 reg &= RPR0521_MODE_MEAS_TIME_MASK;
633 if (reg >= ARRAY_SIZE(rpr0521_samp_freq_i))
634 return -EINVAL;
635
636 switch (chan_type) {
637 case IIO_INTENSITY:
638 *val = rpr0521_samp_freq_i[reg].als_hz;
639 *val2 = rpr0521_samp_freq_i[reg].als_uhz;
640 return 0;
641
642 case IIO_PROXIMITY:
643 *val = rpr0521_samp_freq_i[reg].pxs_hz;
644 *val2 = rpr0521_samp_freq_i[reg].pxs_uhz;
645 return 0;
646
647 default:
648 return -EINVAL;
649 }
650}
651
652static int rpr0521_write_samp_freq_common(struct rpr0521_data *data,
653 enum iio_chan_type chan_type,
654 int val, int val2)
655{
656 int i;
657
658
659
660
661
662 switch (val) {
663 case 0:
664 i = 0;
665 break;
666
667 case 2:
668 if (val2 != 500000)
669 return -EINVAL;
670
671 i = 11;
672 break;
673
674 case 10:
675 i = 6;
676 break;
677
678 default:
679 return -EINVAL;
680 }
681
682 return regmap_update_bits(data->regmap,
683 RPR0521_REG_MODE_CTRL,
684 RPR0521_MODE_MEAS_TIME_MASK,
685 i);
686}
687
688static int rpr0521_read_ps_offset(struct rpr0521_data *data, int *offset)
689{
690 int ret;
691 __le16 buffer;
692
693 ret = regmap_bulk_read(data->regmap,
694 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
695
696 if (ret < 0) {
697 dev_err(&data->client->dev, "Failed to read PS OFFSET register\n");
698 return ret;
699 }
700 *offset = le16_to_cpu(buffer);
701
702 return ret;
703}
704
705static int rpr0521_write_ps_offset(struct rpr0521_data *data, int offset)
706{
707 int ret;
708 __le16 buffer;
709
710 buffer = cpu_to_le16(offset & 0x3ff);
711 ret = regmap_raw_write(data->regmap,
712 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
713
714 if (ret < 0) {
715 dev_err(&data->client->dev, "Failed to write PS OFFSET register\n");
716 return ret;
717 }
718
719 return ret;
720}
721
722static int rpr0521_read_raw(struct iio_dev *indio_dev,
723 struct iio_chan_spec const *chan, int *val,
724 int *val2, long mask)
725{
726 struct rpr0521_data *data = iio_priv(indio_dev);
727 int ret;
728 int busy;
729 u8 device_mask;
730 __le16 raw_data;
731
732 switch (mask) {
733 case IIO_CHAN_INFO_RAW:
734 if (chan->type != IIO_INTENSITY && chan->type != IIO_PROXIMITY)
735 return -EINVAL;
736
737 busy = iio_device_claim_direct_mode(indio_dev);
738 if (busy)
739 return -EBUSY;
740
741 device_mask = rpr0521_data_reg[chan->address].device_mask;
742
743 mutex_lock(&data->lock);
744 ret = rpr0521_set_power_state(data, true, device_mask);
745 if (ret < 0)
746 goto rpr0521_read_raw_out;
747
748 ret = regmap_bulk_read(data->regmap,
749 rpr0521_data_reg[chan->address].address,
750 &raw_data, sizeof(raw_data));
751 if (ret < 0) {
752 rpr0521_set_power_state(data, false, device_mask);
753 goto rpr0521_read_raw_out;
754 }
755
756 ret = rpr0521_set_power_state(data, false, device_mask);
757
758rpr0521_read_raw_out:
759 mutex_unlock(&data->lock);
760 iio_device_release_direct_mode(indio_dev);
761 if (ret < 0)
762 return ret;
763
764 *val = le16_to_cpu(raw_data);
765
766 return IIO_VAL_INT;
767
768 case IIO_CHAN_INFO_SCALE:
769 mutex_lock(&data->lock);
770 ret = rpr0521_get_gain(data, chan->address, val, val2);
771 mutex_unlock(&data->lock);
772 if (ret < 0)
773 return ret;
774
775 return IIO_VAL_INT_PLUS_MICRO;
776
777 case IIO_CHAN_INFO_SAMP_FREQ:
778 mutex_lock(&data->lock);
779 ret = rpr0521_read_samp_freq(data, chan->type, val, val2);
780 mutex_unlock(&data->lock);
781 if (ret < 0)
782 return ret;
783
784 return IIO_VAL_INT_PLUS_MICRO;
785
786 case IIO_CHAN_INFO_OFFSET:
787 mutex_lock(&data->lock);
788 ret = rpr0521_read_ps_offset(data, val);
789 mutex_unlock(&data->lock);
790 if (ret < 0)
791 return ret;
792
793 return IIO_VAL_INT;
794
795 default:
796 return -EINVAL;
797 }
798}
799
800static int rpr0521_write_raw(struct iio_dev *indio_dev,
801 struct iio_chan_spec const *chan, int val,
802 int val2, long mask)
803{
804 struct rpr0521_data *data = iio_priv(indio_dev);
805 int ret;
806
807 switch (mask) {
808 case IIO_CHAN_INFO_SCALE:
809 mutex_lock(&data->lock);
810 ret = rpr0521_set_gain(data, chan->address, val, val2);
811 mutex_unlock(&data->lock);
812
813 return ret;
814
815 case IIO_CHAN_INFO_SAMP_FREQ:
816 mutex_lock(&data->lock);
817 ret = rpr0521_write_samp_freq_common(data, chan->type,
818 val, val2);
819 mutex_unlock(&data->lock);
820
821 return ret;
822
823 case IIO_CHAN_INFO_OFFSET:
824 mutex_lock(&data->lock);
825 ret = rpr0521_write_ps_offset(data, val);
826 mutex_unlock(&data->lock);
827
828 return ret;
829
830 default:
831 return -EINVAL;
832 }
833}
834
835static const struct iio_info rpr0521_info = {
836 .read_raw = rpr0521_read_raw,
837 .write_raw = rpr0521_write_raw,
838 .attrs = &rpr0521_attribute_group,
839};
840
841static int rpr0521_init(struct rpr0521_data *data)
842{
843 int ret;
844 int id;
845
846 ret = regmap_read(data->regmap, RPR0521_REG_ID, &id);
847 if (ret < 0) {
848 dev_err(&data->client->dev, "Failed to read REG_ID register\n");
849 return ret;
850 }
851
852 if (id != RPR0521_MANUFACT_ID) {
853 dev_err(&data->client->dev, "Wrong id, got %x, expected %x\n",
854 id, RPR0521_MANUFACT_ID);
855 return -ENODEV;
856 }
857
858
859 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
860 RPR0521_MODE_MEAS_TIME_MASK,
861 RPR0521_DEFAULT_MEAS_TIME);
862 if (ret) {
863 pr_err("regmap_update_bits returned %d\n", ret);
864 return ret;
865 }
866
867#ifndef CONFIG_PM
868 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
869 if (ret < 0)
870 return ret;
871 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
872 if (ret < 0)
873 return ret;
874#endif
875
876 data->irq_timestamp = 0;
877
878 return 0;
879}
880
881static int rpr0521_poweroff(struct rpr0521_data *data)
882{
883 int ret;
884 int tmp;
885
886 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
887 RPR0521_MODE_ALS_MASK |
888 RPR0521_MODE_PXS_MASK,
889 RPR0521_MODE_ALS_DISABLE |
890 RPR0521_MODE_PXS_DISABLE);
891 if (ret < 0)
892 return ret;
893
894 data->als_dev_en = false;
895 data->pxs_dev_en = false;
896
897
898
899
900
901 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, &tmp);
902 if (ret) {
903 dev_err(&data->client->dev, "Failed to reset int pin.\n");
904 return ret;
905 }
906
907 return 0;
908}
909
910static bool rpr0521_is_volatile_reg(struct device *dev, unsigned int reg)
911{
912 switch (reg) {
913 case RPR0521_REG_MODE_CTRL:
914 case RPR0521_REG_ALS_CTRL:
915 case RPR0521_REG_PXS_CTRL:
916 return false;
917 default:
918 return true;
919 }
920}
921
922static const struct regmap_config rpr0521_regmap_config = {
923 .name = RPR0521_REGMAP_NAME,
924
925 .reg_bits = 8,
926 .val_bits = 8,
927
928 .max_register = RPR0521_REG_ID,
929 .cache_type = REGCACHE_RBTREE,
930 .volatile_reg = rpr0521_is_volatile_reg,
931};
932
933static int rpr0521_probe(struct i2c_client *client,
934 const struct i2c_device_id *id)
935{
936 struct rpr0521_data *data;
937 struct iio_dev *indio_dev;
938 struct regmap *regmap;
939 int ret;
940
941 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
942 if (!indio_dev)
943 return -ENOMEM;
944
945 regmap = devm_regmap_init_i2c(client, &rpr0521_regmap_config);
946 if (IS_ERR(regmap)) {
947 dev_err(&client->dev, "regmap_init failed!\n");
948 return PTR_ERR(regmap);
949 }
950
951 data = iio_priv(indio_dev);
952 i2c_set_clientdata(client, indio_dev);
953 data->client = client;
954 data->regmap = regmap;
955
956 mutex_init(&data->lock);
957
958 indio_dev->info = &rpr0521_info;
959 indio_dev->name = RPR0521_DRV_NAME;
960 indio_dev->channels = rpr0521_channels;
961 indio_dev->num_channels = ARRAY_SIZE(rpr0521_channels);
962 indio_dev->modes = INDIO_DIRECT_MODE;
963
964 ret = rpr0521_init(data);
965 if (ret < 0) {
966 dev_err(&client->dev, "rpr0521 chip init failed\n");
967 return ret;
968 }
969
970 ret = pm_runtime_set_active(&client->dev);
971 if (ret < 0)
972 goto err_poweroff;
973
974 pm_runtime_enable(&client->dev);
975 pm_runtime_set_autosuspend_delay(&client->dev, RPR0521_SLEEP_DELAY_MS);
976 pm_runtime_use_autosuspend(&client->dev);
977
978
979
980
981
982
983
984 if (client->irq) {
985
986 data->drdy_trigger0 = devm_iio_trigger_alloc(
987 indio_dev->dev.parent,
988 "%s-dev%d", indio_dev->name, indio_dev->id);
989 if (!data->drdy_trigger0) {
990 ret = -ENOMEM;
991 goto err_pm_disable;
992 }
993 data->drdy_trigger0->dev.parent = indio_dev->dev.parent;
994 data->drdy_trigger0->ops = &rpr0521_trigger_ops;
995 indio_dev->available_scan_masks = rpr0521_available_scan_masks;
996 iio_trigger_set_drvdata(data->drdy_trigger0, indio_dev);
997
998
999 ret = devm_request_threaded_irq(&client->dev, client->irq,
1000 rpr0521_drdy_irq_handler, rpr0521_drdy_irq_thread,
1001 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
1002 RPR0521_IRQ_NAME, indio_dev);
1003 if (ret < 0) {
1004 dev_err(&client->dev, "request irq %d for trigger0 failed\n",
1005 client->irq);
1006 goto err_pm_disable;
1007 }
1008
1009 ret = devm_iio_trigger_register(indio_dev->dev.parent,
1010 data->drdy_trigger0);
1011 if (ret) {
1012 dev_err(&client->dev, "iio trigger register failed\n");
1013 goto err_pm_disable;
1014 }
1015
1016
1017
1018
1019
1020
1021
1022 ret = devm_iio_triggered_buffer_setup(indio_dev->dev.parent,
1023 indio_dev,
1024 rpr0521_trigger_consumer_store_time,
1025 rpr0521_trigger_consumer_handler,
1026 &rpr0521_buffer_setup_ops);
1027 if (ret < 0) {
1028 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1029 goto err_pm_disable;
1030 }
1031 }
1032
1033 ret = iio_device_register(indio_dev);
1034 if (ret)
1035 goto err_pm_disable;
1036
1037 return 0;
1038
1039err_pm_disable:
1040 pm_runtime_disable(&client->dev);
1041 pm_runtime_set_suspended(&client->dev);
1042 pm_runtime_put_noidle(&client->dev);
1043err_poweroff:
1044 rpr0521_poweroff(data);
1045
1046 return ret;
1047}
1048
1049static int rpr0521_remove(struct i2c_client *client)
1050{
1051 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1052
1053 iio_device_unregister(indio_dev);
1054
1055 pm_runtime_disable(&client->dev);
1056 pm_runtime_set_suspended(&client->dev);
1057 pm_runtime_put_noidle(&client->dev);
1058
1059 rpr0521_poweroff(iio_priv(indio_dev));
1060
1061 return 0;
1062}
1063
1064#ifdef CONFIG_PM
1065static int rpr0521_runtime_suspend(struct device *dev)
1066{
1067 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1068 struct rpr0521_data *data = iio_priv(indio_dev);
1069 int ret;
1070
1071 mutex_lock(&data->lock);
1072
1073 if (!data->als_need_dis)
1074 data->als_ps_need_en = data->als_dev_en;
1075 if (!data->pxs_need_dis)
1076 data->pxs_ps_need_en = data->pxs_dev_en;
1077
1078
1079 ret = rpr0521_poweroff(data);
1080 regcache_mark_dirty(data->regmap);
1081 mutex_unlock(&data->lock);
1082
1083 return ret;
1084}
1085
1086static int rpr0521_runtime_resume(struct device *dev)
1087{
1088 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1089 struct rpr0521_data *data = iio_priv(indio_dev);
1090 int ret;
1091
1092 regcache_sync(data->regmap);
1093 if (data->als_ps_need_en) {
1094 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
1095 if (ret < 0)
1096 return ret;
1097 data->als_ps_need_en = false;
1098 }
1099
1100 if (data->pxs_ps_need_en) {
1101 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
1102 if (ret < 0)
1103 return ret;
1104 data->pxs_ps_need_en = false;
1105 }
1106 msleep(100);
1107
1108 return 0;
1109}
1110#endif
1111
1112static const struct dev_pm_ops rpr0521_pm_ops = {
1113 SET_RUNTIME_PM_OPS(rpr0521_runtime_suspend,
1114 rpr0521_runtime_resume, NULL)
1115};
1116
1117static const struct acpi_device_id rpr0521_acpi_match[] = {
1118 {"RPR0521", 0},
1119 { }
1120};
1121MODULE_DEVICE_TABLE(acpi, rpr0521_acpi_match);
1122
1123static const struct i2c_device_id rpr0521_id[] = {
1124 {"rpr0521", 0},
1125 { }
1126};
1127
1128MODULE_DEVICE_TABLE(i2c, rpr0521_id);
1129
1130static struct i2c_driver rpr0521_driver = {
1131 .driver = {
1132 .name = RPR0521_DRV_NAME,
1133 .pm = &rpr0521_pm_ops,
1134 .acpi_match_table = ACPI_PTR(rpr0521_acpi_match),
1135 },
1136 .probe = rpr0521_probe,
1137 .remove = rpr0521_remove,
1138 .id_table = rpr0521_id,
1139};
1140
1141module_i2c_driver(rpr0521_driver);
1142
1143MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1144MODULE_DESCRIPTION("RPR0521 ROHM Ambient Light and Proximity Sensor driver");
1145MODULE_LICENSE("GPL v2");
1146