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10#ifndef CX25821_H_
11#define CX25821_H_
12
13#include <linux/pci.h>
14#include <linux/i2c.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/sched.h>
18#include <linux/kdev_t.h>
19
20#include <media/v4l2-common.h>
21#include <media/v4l2-device.h>
22#include <media/v4l2-ctrls.h>
23#include <media/videobuf2-v4l2.h>
24#include <media/videobuf2-dma-sg.h>
25
26#include "cx25821-reg.h"
27#include "cx25821-medusa-reg.h"
28#include "cx25821-sram.h"
29#include "cx25821-audio.h"
30
31#include <linux/version.h>
32#include <linux/mutex.h>
33
34#define UNSET (-1U)
35#define NO_SYNC_LINE (-1U)
36
37#define CX25821_MAXBOARDS 2
38
39#define LINE_SIZE_D1 1440
40
41
42#define MAX_DECODERS 8
43#define MAX_ENCODERS 2
44#define QUAD_DECODERS 4
45#define MAX_CAMERAS 16
46
47
48#define MAX_CX25821_INPUT 8
49#define RESOURCE_VIDEO0 1
50#define RESOURCE_VIDEO1 2
51#define RESOURCE_VIDEO2 4
52#define RESOURCE_VIDEO3 8
53#define RESOURCE_VIDEO4 16
54#define RESOURCE_VIDEO5 32
55#define RESOURCE_VIDEO6 64
56#define RESOURCE_VIDEO7 128
57#define RESOURCE_VIDEO8 256
58#define RESOURCE_VIDEO9 512
59#define RESOURCE_VIDEO10 1024
60#define RESOURCE_VIDEO11 2048
61
62#define BUFFER_TIMEOUT (HZ)
63
64#define UNKNOWN_BOARD 0
65#define CX25821_BOARD 1
66
67
68#define CX25821_NORMS (\
69 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_M_KR | \
70 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
71 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_H | \
72 V4L2_STD_PAL_Nc)
73
74#define CX25821_BOARD_CONEXANT_ATHENA10 1
75#define MAX_VID_CHANNEL_NUM 12
76
77
78
79
80
81#define MAX_VID_CAP_CHANNEL_NUM 10
82
83#define VID_CHANNEL_NUM 8
84
85struct cx25821_fmt {
86 u32 fourcc;
87 int depth;
88 int flags;
89 u32 cxformat;
90};
91
92struct cx25821_tvnorm {
93 char *name;
94 v4l2_std_id id;
95 u32 cxiformat;
96 u32 cxoformat;
97};
98
99enum cx25821_src_sel_type {
100 CX25821_SRC_SEL_EXT_656_VIDEO = 0,
101 CX25821_SRC_SEL_PARALLEL_MPEG_VIDEO
102};
103
104struct cx25821_riscmem {
105 unsigned int size;
106 __le32 *cpu;
107 __le32 *jmp;
108 dma_addr_t dma;
109};
110
111
112struct cx25821_buffer {
113
114 struct vb2_v4l2_buffer vb;
115 struct list_head queue;
116
117
118 unsigned int bpl;
119 struct cx25821_riscmem risc;
120 const struct cx25821_fmt *fmt;
121};
122
123enum port {
124 CX25821_UNDEFINED = 0,
125 CX25821_RAW,
126 CX25821_264
127};
128
129struct cx25821_board {
130 const char *name;
131 enum port porta;
132 enum port portb;
133 enum port portc;
134
135 u32 clk_freq;
136};
137
138struct cx25821_i2c {
139 struct cx25821_dev *dev;
140
141 int nr;
142
143
144 struct i2c_adapter i2c_adap;
145 struct i2c_client i2c_client;
146 u32 i2c_rc;
147
148
149 u32 i2c_period;
150 u32 reg_ctrl;
151 u32 reg_stat;
152 u32 reg_addr;
153 u32 reg_rdata;
154 u32 reg_wdata;
155};
156
157struct cx25821_dmaqueue {
158 struct list_head active;
159 u32 count;
160};
161
162struct cx25821_dev;
163
164struct cx25821_channel;
165
166struct cx25821_video_out_data {
167 struct cx25821_channel *chan;
168 int _line_size;
169 int _prog_cnt;
170 int _pixel_format;
171 int _is_first_frame;
172 int _is_running;
173 int _file_status;
174 int _lines_count;
175 int _frame_count;
176 unsigned int _risc_size;
177
178 __le32 *_dma_virt_start_addr;
179 __le32 *_dma_virt_addr;
180 dma_addr_t _dma_phys_addr;
181 dma_addr_t _dma_phys_start_addr;
182
183 unsigned int _data_buf_size;
184 __le32 *_data_buf_virt_addr;
185 dma_addr_t _data_buf_phys_addr;
186
187 u32 upstream_riscbuf_size;
188 u32 upstream_databuf_size;
189 int is_60hz;
190 int _frame_index;
191 int cur_frame_index;
192 int curpos;
193 wait_queue_head_t waitq;
194};
195
196struct cx25821_channel {
197 unsigned id;
198 struct cx25821_dev *dev;
199
200 struct v4l2_ctrl_handler hdl;
201
202 struct video_device vdev;
203 struct cx25821_dmaqueue dma_vidq;
204 struct vb2_queue vidq;
205
206 const struct sram_channel *sram_channels;
207
208 const struct cx25821_fmt *fmt;
209 unsigned field;
210 unsigned int width, height;
211 int pixel_formats;
212 int use_cif_resolution;
213 int cif_width;
214
215
216 struct cx25821_video_out_data *out;
217};
218
219struct snd_card;
220
221struct cx25821_dev {
222 struct v4l2_device v4l2_dev;
223
224
225 struct pci_dev *pci;
226 unsigned char pci_rev, pci_lat;
227 int pci_bus, pci_slot;
228 u32 base_io_addr;
229 u32 __iomem *lmmio;
230 u8 __iomem *bmmio;
231 int pci_irqmask;
232 int hwrevision;
233
234 struct snd_card *card;
235
236 u32 clk_freq;
237
238
239 struct cx25821_i2c i2c_bus[3];
240
241 int nr;
242 struct mutex lock;
243
244 struct cx25821_channel channels[MAX_VID_CHANNEL_NUM];
245
246
247 unsigned int board;
248 char name[32];
249
250
251 unsigned int input;
252 v4l2_std_id tvnorm;
253 unsigned short _max_num_decoders;
254
255
256 int _audio_is_running;
257 int _audiopixel_format;
258 int _is_first_audio_frame;
259 int _audiofile_status;
260 int _audio_lines_count;
261 int _audioframe_count;
262 int _audio_upstream_channel;
263 int _last_index_irq;
264
265 __le32 *_risc_audio_jmp_addr;
266 __le32 *_risc_virt_start_addr;
267 __le32 *_risc_virt_addr;
268 dma_addr_t _risc_phys_addr;
269 dma_addr_t _risc_phys_start_addr;
270
271 unsigned int _audiorisc_size;
272 unsigned int _audiodata_buf_size;
273 __le32 *_audiodata_buf_virt_addr;
274 dma_addr_t _audiodata_buf_phys_addr;
275 char *_audiofilename;
276 u32 audio_upstream_riscbuf_size;
277 u32 audio_upstream_databuf_size;
278 int _audioframe_index;
279 struct work_struct _audio_work_entry;
280 char *input_audiofilename;
281
282
283 spinlock_t slock;
284
285
286 struct cx25821_video_out_data vid_out_data[2];
287};
288
289static inline struct cx25821_dev *get_cx25821(struct v4l2_device *v4l2_dev)
290{
291 return container_of(v4l2_dev, struct cx25821_dev, v4l2_dev);
292}
293
294extern struct cx25821_board cx25821_boards[];
295
296#define SRAM_CH00 0
297#define SRAM_CH01 1
298#define SRAM_CH02 2
299#define SRAM_CH03 3
300#define SRAM_CH04 4
301#define SRAM_CH05 5
302#define SRAM_CH06 6
303#define SRAM_CH07 7
304
305#define SRAM_CH08 8
306#define SRAM_CH09 9
307#define SRAM_CH10 10
308#define SRAM_CH11 11
309
310#define VID_UPSTREAM_SRAM_CHANNEL_I SRAM_CH09
311#define VID_UPSTREAM_SRAM_CHANNEL_J SRAM_CH10
312#define AUDIO_UPSTREAM_SRAM_CHANNEL_B SRAM_CH11
313
314struct sram_channel {
315 char *name;
316 u32 i;
317 u32 cmds_start;
318 u32 ctrl_start;
319 u32 cdt;
320 u32 fifo_start;
321 u32 fifo_size;
322 u32 ptr1_reg;
323 u32 ptr2_reg;
324 u32 cnt1_reg;
325 u32 cnt2_reg;
326 u32 int_msk;
327 u32 int_stat;
328 u32 int_mstat;
329 u32 dma_ctl;
330 u32 gpcnt_ctl;
331 u32 gpcnt;
332 u32 aud_length;
333 u32 aud_cfg;
334 u32 fld_aud_fifo_en;
335 u32 fld_aud_risc_en;
336
337
338 u32 vid_fmt_ctl;
339 u32 vid_active_ctl1;
340 u32 vid_active_ctl2;
341 u32 vid_cdt_size;
342
343 u32 vip_ctl;
344 u32 pix_frmt;
345 u32 jumponly;
346 u32 irq_bit;
347};
348
349extern const struct sram_channel cx25821_sram_channels[];
350
351#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
352#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
353
354#define cx_andor(reg, mask, value) \
355 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
356 ((value) & (mask)), dev->lmmio+((reg)>>2))
357
358#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
359#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
360
361#define Set_GPIO_Bit(Bit) (1 << Bit)
362#define Clear_GPIO_Bit(Bit) (~(1 << Bit))
363
364#define CX25821_ERR(fmt, args...) \
365 pr_err("(%d): " fmt, dev->board, ##args)
366#define CX25821_WARN(fmt, args...) \
367 pr_warn("(%d): " fmt, dev->board, ##args)
368#define CX25821_INFO(fmt, args...) \
369 pr_info("(%d): " fmt, dev->board, ##args)
370
371extern int cx25821_i2c_register(struct cx25821_i2c *bus);
372extern int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value);
373extern int cx25821_i2c_write(struct cx25821_i2c *bus, u16 reg_addr, int value);
374extern int cx25821_i2c_unregister(struct cx25821_i2c *bus);
375extern void cx25821_gpio_init(struct cx25821_dev *dev);
376extern void cx25821_set_gpiopin_direction(struct cx25821_dev *dev,
377 int pin_number, int pin_logic_value);
378
379extern int medusa_video_init(struct cx25821_dev *dev);
380extern int medusa_set_videostandard(struct cx25821_dev *dev);
381extern void medusa_set_resolution(struct cx25821_dev *dev, int width,
382 int decoder_select);
383extern int medusa_set_brightness(struct cx25821_dev *dev, int brightness,
384 int decoder);
385extern int medusa_set_contrast(struct cx25821_dev *dev, int contrast,
386 int decoder);
387extern int medusa_set_hue(struct cx25821_dev *dev, int hue, int decoder);
388extern int medusa_set_saturation(struct cx25821_dev *dev, int saturation,
389 int decoder);
390
391extern int cx25821_sram_channel_setup(struct cx25821_dev *dev,
392 const struct sram_channel *ch, unsigned int bpl,
393 u32 risc);
394
395extern int cx25821_riscmem_alloc(struct pci_dev *pci,
396 struct cx25821_riscmem *risc,
397 unsigned int size);
398extern int cx25821_risc_buffer(struct pci_dev *pci, struct cx25821_riscmem *risc,
399 struct scatterlist *sglist,
400 unsigned int top_offset,
401 unsigned int bottom_offset,
402 unsigned int bpl,
403 unsigned int padding, unsigned int lines);
404extern int cx25821_risc_databuffer_audio(struct pci_dev *pci,
405 struct cx25821_riscmem *risc,
406 struct scatterlist *sglist,
407 unsigned int bpl,
408 unsigned int lines, unsigned int lpi);
409extern void cx25821_free_buffer(struct cx25821_dev *dev,
410 struct cx25821_buffer *buf);
411extern void cx25821_sram_channel_dump(struct cx25821_dev *dev,
412 const struct sram_channel *ch);
413extern void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev,
414 const struct sram_channel *ch);
415
416extern struct cx25821_dev *cx25821_dev_get(struct pci_dev *pci);
417extern void cx25821_print_irqbits(char *name, char *tag, char **strings,
418 int len, u32 bits, u32 mask);
419extern void cx25821_dev_unregister(struct cx25821_dev *dev);
420extern int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
421 const struct sram_channel *ch,
422 unsigned int bpl, u32 risc);
423
424extern void cx25821_set_pixel_format(struct cx25821_dev *dev, int channel,
425 u32 format);
426
427#endif
428
