1
2
3
4#include <linux/module.h>
5#include <linux/netdevice.h>
6#include <linux/etherdevice.h>
7#include <linux/pci.h>
8
9#include "ionic.h"
10#include "ionic_bus.h"
11#include "ionic_lif.h"
12#include "ionic_debugfs.h"
13
14
15static const struct pci_device_id ionic_id_table[] = {
16 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) },
17 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) },
18 { 0, }
19};
20MODULE_DEVICE_TABLE(pci, ionic_id_table);
21
22int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
23{
24 return pci_irq_vector(ionic->pdev, num);
25}
26
27const char *ionic_bus_info(struct ionic *ionic)
28{
29 return pci_name(ionic->pdev);
30}
31
32int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
33{
34 return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
35 PCI_IRQ_MSIX);
36}
37
38void ionic_bus_free_irq_vectors(struct ionic *ionic)
39{
40 if (!ionic->nintrs)
41 return;
42
43 pci_free_irq_vectors(ionic->pdev);
44}
45
46static int ionic_map_bars(struct ionic *ionic)
47{
48 struct pci_dev *pdev = ionic->pdev;
49 struct device *dev = ionic->dev;
50 struct ionic_dev_bar *bars;
51 unsigned int i, j;
52
53 bars = ionic->bars;
54 ionic->num_bars = 0;
55
56 for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
57 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
58 continue;
59 bars[j].len = pci_resource_len(pdev, i);
60
61
62 if (j > 0) {
63 bars[j].vaddr = NULL;
64 } else {
65 bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
66 if (!bars[j].vaddr) {
67 dev_err(dev,
68 "Cannot memory-map BAR %d, aborting\n",
69 i);
70 return -ENODEV;
71 }
72 }
73
74 bars[j].bus_addr = pci_resource_start(pdev, i);
75 bars[j].res_index = i;
76 ionic->num_bars++;
77 j++;
78 }
79
80 return 0;
81}
82
83static void ionic_unmap_bars(struct ionic *ionic)
84{
85 struct ionic_dev_bar *bars = ionic->bars;
86 unsigned int i;
87
88 for (i = 0; i < IONIC_BARS_MAX; i++) {
89 if (bars[i].vaddr) {
90 iounmap(bars[i].vaddr);
91 bars[i].bus_addr = 0;
92 bars[i].vaddr = NULL;
93 bars[i].len = 0;
94 }
95 }
96}
97
98void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
99{
100 return pci_iomap_range(ionic->pdev,
101 ionic->bars[IONIC_PCI_BAR_DBELL].res_index,
102 (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
103}
104
105void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
106{
107 iounmap(page);
108}
109
110static void ionic_vf_dealloc_locked(struct ionic *ionic)
111{
112 struct ionic_vf *v;
113 dma_addr_t dma = 0;
114 int i;
115
116 if (!ionic->vfs)
117 return;
118
119 for (i = ionic->num_vfs - 1; i >= 0; i--) {
120 v = &ionic->vfs[i];
121
122 if (v->stats_pa) {
123 (void)ionic_set_vf_config(ionic, i,
124 IONIC_VF_ATTR_STATSADDR,
125 (u8 *)&dma);
126 dma_unmap_single(ionic->dev, v->stats_pa,
127 sizeof(v->stats), DMA_FROM_DEVICE);
128 v->stats_pa = 0;
129 }
130 }
131
132 kfree(ionic->vfs);
133 ionic->vfs = NULL;
134 ionic->num_vfs = 0;
135}
136
137static void ionic_vf_dealloc(struct ionic *ionic)
138{
139 down_write(&ionic->vf_op_lock);
140 ionic_vf_dealloc_locked(ionic);
141 up_write(&ionic->vf_op_lock);
142}
143
144static int ionic_vf_alloc(struct ionic *ionic, int num_vfs)
145{
146 struct ionic_vf *v;
147 int err = 0;
148 int i;
149
150 down_write(&ionic->vf_op_lock);
151
152 ionic->vfs = kcalloc(num_vfs, sizeof(struct ionic_vf), GFP_KERNEL);
153 if (!ionic->vfs) {
154 err = -ENOMEM;
155 goto out;
156 }
157
158 for (i = 0; i < num_vfs; i++) {
159 v = &ionic->vfs[i];
160 v->stats_pa = dma_map_single(ionic->dev, &v->stats,
161 sizeof(v->stats), DMA_FROM_DEVICE);
162 if (dma_mapping_error(ionic->dev, v->stats_pa)) {
163 v->stats_pa = 0;
164 err = -ENODEV;
165 goto out;
166 }
167
168
169 (void)ionic_set_vf_config(ionic, i, IONIC_VF_ATTR_STATSADDR,
170 (u8 *)&v->stats_pa);
171 ionic->num_vfs++;
172 }
173
174out:
175 if (err)
176 ionic_vf_dealloc_locked(ionic);
177 up_write(&ionic->vf_op_lock);
178 return err;
179}
180
181static int ionic_sriov_configure(struct pci_dev *pdev, int num_vfs)
182{
183 struct ionic *ionic = pci_get_drvdata(pdev);
184 struct device *dev = ionic->dev;
185 int ret = 0;
186
187 if (num_vfs > 0) {
188 ret = pci_enable_sriov(pdev, num_vfs);
189 if (ret) {
190 dev_err(dev, "Cannot enable SRIOV: %d\n", ret);
191 goto out;
192 }
193
194 ret = ionic_vf_alloc(ionic, num_vfs);
195 if (ret) {
196 dev_err(dev, "Cannot alloc VFs: %d\n", ret);
197 pci_disable_sriov(pdev);
198 goto out;
199 }
200
201 ret = num_vfs;
202 } else {
203 pci_disable_sriov(pdev);
204 ionic_vf_dealloc(ionic);
205 }
206
207out:
208 return ret;
209}
210
211static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
212{
213 struct device *dev = &pdev->dev;
214 struct ionic *ionic;
215 int num_vfs;
216 int err;
217
218 ionic = ionic_devlink_alloc(dev);
219 if (!ionic)
220 return -ENOMEM;
221
222 ionic->pdev = pdev;
223 ionic->dev = dev;
224 pci_set_drvdata(pdev, ionic);
225 mutex_init(&ionic->dev_cmd_lock);
226
227
228 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN));
229 if (err) {
230 dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting. err=%d\n",
231 err);
232 goto err_out_clear_drvdata;
233 }
234
235 ionic_debugfs_add_dev(ionic);
236
237
238 err = pci_enable_device_mem(pdev);
239 if (err) {
240 dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err);
241 goto err_out_debugfs_del_dev;
242 }
243
244 err = pci_request_regions(pdev, IONIC_DRV_NAME);
245 if (err) {
246 dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err);
247 goto err_out_pci_disable_device;
248 }
249
250 pcie_print_link_status(pdev);
251
252 err = ionic_map_bars(ionic);
253 if (err)
254 goto err_out_pci_disable_device;
255
256
257 err = ionic_setup(ionic);
258 if (err) {
259 dev_err(dev, "Cannot setup device: %d, aborting\n", err);
260 goto err_out_unmap_bars;
261 }
262 pci_set_master(pdev);
263
264 err = ionic_identify(ionic);
265 if (err) {
266 dev_err(dev, "Cannot identify device: %d, aborting\n", err);
267 goto err_out_teardown;
268 }
269 ionic_debugfs_add_ident(ionic);
270
271 err = ionic_init(ionic);
272 if (err) {
273 dev_err(dev, "Cannot init device: %d, aborting\n", err);
274 goto err_out_teardown;
275 }
276
277
278 err = ionic_port_identify(ionic);
279 if (err) {
280 dev_err(dev, "Cannot identify port: %d, aborting\n", err);
281 goto err_out_reset;
282 }
283
284 err = ionic_port_init(ionic);
285 if (err) {
286 dev_err(dev, "Cannot init port: %d, aborting\n", err);
287 goto err_out_reset;
288 }
289
290
291 err = ionic_lif_size(ionic);
292 if (err) {
293 dev_err(dev, "Cannot size LIF: %d, aborting\n", err);
294 goto err_out_port_reset;
295 }
296
297 err = ionic_lif_alloc(ionic);
298 if (err) {
299 dev_err(dev, "Cannot allocate LIF: %d, aborting\n", err);
300 goto err_out_free_irqs;
301 }
302
303 err = ionic_lif_init(ionic->lif);
304 if (err) {
305 dev_err(dev, "Cannot init LIF: %d, aborting\n", err);
306 goto err_out_free_lifs;
307 }
308
309 init_rwsem(&ionic->vf_op_lock);
310 num_vfs = pci_num_vf(pdev);
311 if (num_vfs) {
312 dev_info(dev, "%d VFs found already enabled\n", num_vfs);
313 err = ionic_vf_alloc(ionic, num_vfs);
314 if (err)
315 dev_err(dev, "Cannot enable existing VFs: %d\n", err);
316 }
317
318 err = ionic_lif_register(ionic->lif);
319 if (err) {
320 dev_err(dev, "Cannot register LIF: %d, aborting\n", err);
321 goto err_out_deinit_lifs;
322 }
323
324 err = ionic_devlink_register(ionic);
325 if (err) {
326 dev_err(dev, "Cannot register devlink: %d\n", err);
327 goto err_out_deregister_lifs;
328 }
329
330 return 0;
331
332err_out_deregister_lifs:
333 ionic_lif_unregister(ionic->lif);
334err_out_deinit_lifs:
335 ionic_vf_dealloc(ionic);
336 ionic_lif_deinit(ionic->lif);
337err_out_free_lifs:
338 ionic_lif_free(ionic->lif);
339 ionic->lif = NULL;
340err_out_free_irqs:
341 ionic_bus_free_irq_vectors(ionic);
342err_out_port_reset:
343 ionic_port_reset(ionic);
344err_out_reset:
345 ionic_reset(ionic);
346err_out_teardown:
347 del_timer_sync(&ionic->watchdog_timer);
348 pci_clear_master(pdev);
349
350
351
352 return 0;
353
354err_out_unmap_bars:
355 ionic_unmap_bars(ionic);
356 pci_release_regions(pdev);
357err_out_pci_disable_device:
358 pci_disable_device(pdev);
359err_out_debugfs_del_dev:
360 ionic_debugfs_del_dev(ionic);
361err_out_clear_drvdata:
362 mutex_destroy(&ionic->dev_cmd_lock);
363 ionic_devlink_free(ionic);
364
365 return err;
366}
367
368static void ionic_remove(struct pci_dev *pdev)
369{
370 struct ionic *ionic = pci_get_drvdata(pdev);
371
372 if (!ionic)
373 return;
374
375 del_timer_sync(&ionic->watchdog_timer);
376
377 if (ionic->lif) {
378 ionic_devlink_unregister(ionic);
379 ionic_lif_unregister(ionic->lif);
380 ionic_lif_deinit(ionic->lif);
381 ionic_lif_free(ionic->lif);
382 ionic->lif = NULL;
383 ionic_bus_free_irq_vectors(ionic);
384 }
385
386 ionic_port_reset(ionic);
387 ionic_reset(ionic);
388 pci_clear_master(pdev);
389 ionic_unmap_bars(ionic);
390 pci_release_regions(pdev);
391 pci_disable_device(pdev);
392 ionic_debugfs_del_dev(ionic);
393 mutex_destroy(&ionic->dev_cmd_lock);
394 ionic_devlink_free(ionic);
395}
396
397static struct pci_driver ionic_driver = {
398 .name = IONIC_DRV_NAME,
399 .id_table = ionic_id_table,
400 .probe = ionic_probe,
401 .remove = ionic_remove,
402 .sriov_configure = ionic_sriov_configure,
403};
404
405int ionic_bus_register_driver(void)
406{
407 return pci_register_driver(&ionic_driver);
408}
409
410void ionic_bus_unregister_driver(void)
411{
412 pci_unregister_driver(&ionic_driver);
413}
414
